JPS5758338A - Semiconductor integrated device - Google Patents

Semiconductor integrated device

Info

Publication number
JPS5758338A
JPS5758338A JP13305780A JP13305780A JPS5758338A JP S5758338 A JPS5758338 A JP S5758338A JP 13305780 A JP13305780 A JP 13305780A JP 13305780 A JP13305780 A JP 13305780A JP S5758338 A JPS5758338 A JP S5758338A
Authority
JP
Japan
Prior art keywords
film
substrate
wires
groove
wire
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13305780A
Other languages
Japanese (ja)
Other versions
JPS6262466B2 (en
Inventor
Shigeru Kawamata
Yoshitaka Sugawara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP13305780A priority Critical patent/JPS5758338A/en
Publication of JPS5758338A publication Critical patent/JPS5758338A/en
Publication of JPS6262466B2 publication Critical patent/JPS6262466B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE:To enable the formation of the maximum thickness of a surface protective film of an insulating film between crossover wires in a crosscover wire by contacting the buried wire with an isolation insulating film and forming it along the film. CONSTITUTION:An Si oxidized film 22 is formed on an n type single crystalline Si substrate 21, and an isolating groove 23 is thereafter formed on the substrate 21. Then, the film 22 is once removed, and an n<+> type diffused region 24 is formed on the surface. This region 24 is used as the buried wire of the crossover wire part and a channel stopper. Thereafter, an insulation isolating Si oxidized film 22 is formed on the main surface including the region 24. Subsequently, a polycrystalline Si 25 is accumulated deeper than the depth of the groove 23. Then, the substrate 21 is removed to the depth designated by chain line to reach the bottom of the groove 23. From the above steps, there can be obtained a substrate 20 having a plurality of single crystalline Si islands 26 isolated by insulation from each other on one main surface. A functional element is formed on the island 26. Then, wires 28, 29 are formed. Since the thickness of the insulating film 27A can be increased in this manner, high potential can be applied between the wires.
JP13305780A 1980-09-26 1980-09-26 Semiconductor integrated device Granted JPS5758338A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13305780A JPS5758338A (en) 1980-09-26 1980-09-26 Semiconductor integrated device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13305780A JPS5758338A (en) 1980-09-26 1980-09-26 Semiconductor integrated device

Publications (2)

Publication Number Publication Date
JPS5758338A true JPS5758338A (en) 1982-04-08
JPS6262466B2 JPS6262466B2 (en) 1987-12-26

Family

ID=15095808

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13305780A Granted JPS5758338A (en) 1980-09-26 1980-09-26 Semiconductor integrated device

Country Status (1)

Country Link
JP (1) JPS5758338A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58218141A (en) * 1982-06-11 1983-12-19 Hitachi Ltd High dielectric-strength semiconductor integrated device
JPS6095939A (en) * 1983-10-31 1985-05-29 Matsushita Electronics Corp Manufacture of semiconductor integrated circuit
US4923820A (en) * 1985-09-18 1990-05-08 Harris Corporation IC which eliminates support bias influence on dielectrically isolated components
JPH053192A (en) * 1991-10-25 1993-01-08 Matsushita Electron Corp Semiconductor integrated circuit
US5426073A (en) * 1988-10-07 1995-06-20 Fujitsu Limited Method of fabricating semiconductor devices using an intermediate grinding step

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58218141A (en) * 1982-06-11 1983-12-19 Hitachi Ltd High dielectric-strength semiconductor integrated device
JPS6095939A (en) * 1983-10-31 1985-05-29 Matsushita Electronics Corp Manufacture of semiconductor integrated circuit
US4923820A (en) * 1985-09-18 1990-05-08 Harris Corporation IC which eliminates support bias influence on dielectrically isolated components
US5426073A (en) * 1988-10-07 1995-06-20 Fujitsu Limited Method of fabricating semiconductor devices using an intermediate grinding step
JPH053192A (en) * 1991-10-25 1993-01-08 Matsushita Electron Corp Semiconductor integrated circuit

Also Published As

Publication number Publication date
JPS6262466B2 (en) 1987-12-26

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