JPS57109353A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS57109353A
JPS57109353A JP18686980A JP18686980A JPS57109353A JP S57109353 A JPS57109353 A JP S57109353A JP 18686980 A JP18686980 A JP 18686980A JP 18686980 A JP18686980 A JP 18686980A JP S57109353 A JPS57109353 A JP S57109353A
Authority
JP
Japan
Prior art keywords
wells
semiconductor devices
well
single crystalline
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18686980A
Other languages
Japanese (ja)
Other versions
JPS60951B2 (en
Inventor
Yoshihiro Arimoto
Masaru Ihara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP18686980A priority Critical patent/JPS60951B2/en
Publication of JPS57109353A publication Critical patent/JPS57109353A/en
Publication of JPS60951B2 publication Critical patent/JPS60951B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76229—Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE:To shorten the polishing time and to improve polishing accuracy by a method wherein the substrate surface is provided with an extra well in addition to the wells for semiconductor devices formation to accelerate single crystalline growth in the wells where semiconductor devices are to be formed. CONSTITUTION:An Si substrate 1 undergoes etching and a well is provided in a region 4 where no semiconductor devices is to be formed as well as in wells 2 and 3 where semiconductor devices are to be formed. Next, the substrate 1 is wholely covered with a single crystalline insulating film 5 and single crystalline Si films 6 and 7. Growth of Si in the wells 2 and 3 is accelerated due to the existence of the well 4. The Si films grown in the wells 2 and 3 are then polished to the extent where they are insulated by the insulating film 5, and circuit elements are formed in the wells 2 and 3.
JP18686980A 1980-12-26 1980-12-26 semiconductor equipment Expired JPS60951B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18686980A JPS60951B2 (en) 1980-12-26 1980-12-26 semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18686980A JPS60951B2 (en) 1980-12-26 1980-12-26 semiconductor equipment

Publications (2)

Publication Number Publication Date
JPS57109353A true JPS57109353A (en) 1982-07-07
JPS60951B2 JPS60951B2 (en) 1985-01-11

Family

ID=16196088

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18686980A Expired JPS60951B2 (en) 1980-12-26 1980-12-26 semiconductor equipment

Country Status (1)

Country Link
JP (1) JPS60951B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6261359A (en) * 1985-09-11 1987-03-18 Sanyo Electric Co Ltd Manufacture of semiconductor device
JPH0320044A (en) * 1989-03-24 1991-01-29 Internatl Business Mach Corp <Ibm> Integrated circuti device and manufacture thereof

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61287285A (en) * 1985-06-14 1986-12-17 Hitachi Ltd Laser oscillation tube

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6261359A (en) * 1985-09-11 1987-03-18 Sanyo Electric Co Ltd Manufacture of semiconductor device
JPH0320044A (en) * 1989-03-24 1991-01-29 Internatl Business Mach Corp <Ibm> Integrated circuti device and manufacture thereof

Also Published As

Publication number Publication date
JPS60951B2 (en) 1985-01-11

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