TW309651B - - Google Patents

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Publication number
TW309651B
TW309651B TW085102408A TW85102408A TW309651B TW 309651 B TW309651 B TW 309651B TW 085102408 A TW085102408 A TW 085102408A TW 85102408 A TW85102408 A TW 85102408A TW 309651 B TW309651 B TW 309651B
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TW
Taiwan
Prior art keywords
metal
bump
substrate
item
semiconductor wafer
Prior art date
Application number
TW085102408A
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English (en)
Original Assignee
Ibm
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Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of TW309651B publication Critical patent/TW309651B/zh

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    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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    • H01L21/321—After treatment
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509651 at _____ B7 經濟部中央標準局貞工消费合作.杜印製 五、發明説明（1 ) 發明範疇 本發明係有關於用以將半導體晶片與封裝基質在電氣上 相連的烊料凸塊之結構及其形成方法，特別有關於僅將焊 料凸塊形成於半導體晶片表面之上的結構，藉此提高此種 連線或諸如此類之連線的壽命。 發明背景 具有電路元件形成在其上之半導體晶片係封裝在一用以 將晶片們電氣連接之封裝基質之上，當封裝時，必須將半 導禮晶片的電極與形成在封裝夸質上的電接彼此電氣連接 。作爲一種達成此一目的之方法，吾人通常使用如圖i所顯 示之倒裝法（flip-chip)技術/以此-種技術行之，焊料球3會 形成在晶片1的外部輸出端子上。另一方面，焊_料凸塊12會 形成在封裝基質10之線路11上，而且凸塊與基質是以回流 連接。此處，半導體晶片1上的焊料球3是以炫點高於有關 於焊料凸塊12之焊料的熔fi的焊料製成的而且不會被回流 溶化。例如’焊料凸塊12是由共晶（eutectic)焊料（63%重量 百分比的錫以及37%重量百分比的鉛）製得的，然而焊料球 3是溶點較高的焊料（97%重量百分比的錫以及3%重量百分 比的鋁）製成的。此外，封裝基質上的線路11即使在回流過 後也不會熔化，因其通常是以金或銅製成的。作爲封裝基 質10用’吾人經常使用多層的要刷電路板.，例如由堆建 (Buildup)製法所形成之表面層化電路（Surface Laminated Circuitry, SLC)。 . » 以此方式’若要使用以封裝基質上的倒裝晶片技術將半 ^— {請先Μ讀背面之注意事項ί \寫本頁) 訂 本紙铢尺度適用中國國家標準（CNS ) Α4规格（2丨0Χ297公釐） 3〇9651 at ^ Β7 翅濟部中央棣準局男工消費合作社印裝 五、發明説明（2 ) 導«晶片與封裝基質連接的方法，就必須在封装基質的表 面上形成供連接用之焊料12 »這是因爲半導體晶片1與封 裝基質10問的空間Η在實施软焊後必須加以確保β 間距Η係一種供產品之連線毒命用之參數。亦即，連線 壽命是以Nf=M . Η/(Δ α .卜AT)此式得到的，其中Μ是視 連線材料而定的連線常數；Δα是半導髏晶片與封裝基質間 的熱膨脹因子的差；！是半導體晶片之中心至最外週邊上的 凸塊間的距離；以及ΛΤ是熱循環中的溫度範圍。當用作連 .線（影響Μ )的材料（例如烊料）、半導體晶片之設計與封裝 基質（影響1及△«〇、以及供半導鳢晶片用之封裝本體（影饗 △Τ)都相同時，連線壽命視該半導體晶片與該封裝基質在 連接後之間距Η而定》因此，吾人需要將用以連接用之软 烊凸塊12形成於半導體基質上，以增加Η的値。 然而，形成用以連接之軟焊凸塊於半導體基質上會產生 如下之問題： _ 亦即，有需要在晶片的表面上形成焊料球3及在封裝基質 表面上形成垾料凸塊12，但是在多處地點提供烊料以便以 此方式達成單一的電氣連線會使製法複雜化，而從生產力 的觀點來看，也會產生問題。此外，形成此種焊料凸塊12 也會妨礙墊塊節距（pitch)的微小化，從而造成高密度封裝 基質實施上的困難》再者，焊株塊通常是用網印製法形. 成的，但是此製法中的光軍是筇贵的，而且在規格上作改 變很困難》 ., 有一種相關的技術已揭露在已公開未審査之專利申請案 • 5- 本紙乐尺度適用中國國家揉準（匚阳）戍4規格（2丨0\297公釐） (請先閲讀背面之注意事項ί \寫本頁) -裝· 訂 線
發明説明（3 經濟部中央標準局負工消費合作社印裝 (PUPA)第3 -62926中。其焊料凸塊的結構是將高熔點的 焊料層形成在一電極上而成的，而該電極係形成於基質上 而且其上有一低熔點焊料層。因爲高熔黠烊料層在软焊時 不會熔化’所以此種結構有個優點，就是可確保間距H — 定。然而，因爲位於表面之低熔點焊料層的厚度是小的， 所以高熔點烊料層必須形成得相當厚，就製法而言，此點 是相當困難的《此外’如所揭露之結構，具有寬帽蓋的兹 狀需要烊料凸塊彼此間的大節距，其會阻礙高密度的封裝 〇 另外’已公開未審査的專利申請案第5-243233號揭露一 種凸塊結構’其是藉由銅形成一亍層並將曝露於絕緣層上 的部分以金製的上層予以披復而成的。然而，此種發明的 金質鍍層是用來增強銅質下漕的穩定性，其目的並不是在 延長連線的毒命，也不是用來促進形成焊料凸塊於倒裝晶 片連線的生產力》 ~ 爲了確保連線的壽命，本發明的任務在於藉由只形成焊 料層於半導體晶片表面之上而不將焊料凸塊形成於封裝基 質表面之上來執行軟焊，同時保持封裝基質與半導髖晶片 間之間距超過一預定値。 本發明之目的在於提供一種不會妨礙封裝基質高度積髖 化同時能達成上述任務之用於速名、之焊料凸塊結構3爲達 此目的，必須要使用具有惰蓋部分於上層的結構及其製造 方法，而該帽蓋部分僅沿側邊散布極小段距離。 爲達成上述目的，本發明僅形成一種雙層的凸塊結構於 -6- 木紙伕尺度適用中國困家橾準（CNS ) A4规格（210 X 297公釐） fil先閑讀背面之注意事Iffiv寫本耳> .裝 -訂- 線 經濟部中央搮準局負工消费合作社印装 A7 ___ B7 五、發明説明（4 ) 晶片的表面上，而且在软焊時將它與封裝基質表面上的電 極相連’但是不會如習知方法那樣在封裝基質的表面上形 成焊料凸塊。此一雙層結構包括在软烊時不會熔化的下層 ’結果會具有一種能確保基質與晶片間之.間距Η—定的成 分。它的上層在软焊時實際上會熔化，以便將凸塊電氣性 地連接至封裝基質上的電極。此時，下層的熔點最好比上 層的熔點高至少2 0 °C。 囷式簡要説明 囷1係解説習知倒裝晶片技術中焊料層的形成； 圖2係使用如本發明之焊料凸塊結構所成之連線的示意圈； 囷3顯示如本發明之一實施例所&得之焊料凸塊的結構； 圖4顯示如本發明之一實施例之第一製造步驟祈製得之焊 料凸塊的剖面圖； 囷5顯示如本發明之一實施例之中間製造步樣所製得之评 料凸塊的剖面圖； ~ 圖6顯示如本發明之一實施例之半終製造步壤所製得之详 料凸塊的剖面圈； 圖7顯示如本發明之另一個實施例所製得之焊料凸塊結構; 及 圖8顯示如本發明之另一個實施例之製造步驟所製得之焊 料凸塊的剖面圖。 ‘ 明確而言，本發明的上述任務可藉由一種能將半導體基 質連接至封裝基質的凸塊來完成，而凸塊結構包括一第一 部分以及第二部分，該第一部分形成在該半導體晶片上而 {請先閲请背面之注f項ί. \寫本頁) -装 訂 線 本紙張尺度αλί中11®$：揉準（CNS) A4規格（21QX 297公着） 五、發明説明（5 装 且是由在軟焊時不會熔化的金屬製成，而該第二部分形成 在該第—部分上；以便在軟焊時熔化而能電氣性地連接至該 封裝基質。爲了確保連線的壽命，該第一部分必須具有一 定的高度；而在軟焊時會熔化的第二部分必須具有一定的禮 積’以便確保電氣連接。爲達此目的，吾人 及V2分別是第一部分及第二部分離表面的高度及雄積，同 時使關係式：HP30〆 m，H2>20" m，11^^2=0.3-2，以及 V/Vpl均被滿足。在這些條件下，實際上所實施的是軟焊 ，以便最好使得H=60至90 Am之間。 訂 如第2囷所示’本發明形成一包括下層3a及上層3b的凸塊 20。該上層是一在软焊時會溶化的焊料層3b，而在半導趙 晶片1上不會形成任何焊料層於封裝基質10的電-極^上。基 質與晶片間的距離Η可由軟焊時不會熔化的下層3a、软焊 時會熔化的上層讣、以及封裝基質表面上的電極η加以確 保。 " 線 經濟部中央標窣局兵工消費合作社印製 圖2係以凸塊作倒裝晶片連接期間的剖面圈。連接是以如 下的方式做成的：以回流使上層金屬3b棒化，覆蓋至該封 裝基質10上之電極11，以及復蓋至該半導體晶片1上之下 層金屬。此時，因爲下層金屬3a不會被回流所熔化，所以 一定的距離Η可以保持在該半導體晶片1及封裝基声1〇之 間β因此，連線壽命的提昇成爲"-能》
以此方式，用本發明之凸塊，只有上層金屬在回流時會 熔化。因此，下層金屬的熔點必0比上層金屬的稼點要高 到令人滿意之程度《從實驗得知：熔點的差至少要大於2(TC -8 本紙乐尺度適用中國國家標準（CNS > Α4说格（210Χ297公釐） 經濟部中央標準局員工消费合作社印製 A7 B7 五、發明説明（6 ) 。當溫差小於20 C時，下層金屬也會在回流時熔化，而使 確保丰導謹晶片與封裝基質間的必要距離Η變成不可能。 圖3顯示本發明之凸塊2〇的詳細結構。構成凸塊的下層 3a及上層3b經由電極22及屏障金層23而形成在半導體基 質上’同時凸塊的遇邊係披覆著絕緣層3〇。此—實施例被 塑型成上層3b形成一帽蓋，同時復蓋在下層3&上。以此方 式’藉由擴展上層3b’相關於上層的焊料用量可以變多。 上層金屬3b是於軟焊時實際會熔化的部分《因此，低熔 .點焊料化合物最好。例如，有二種二元共晶焊料（6 3 %重量 百分比的錫’ 37°/。重量百分的鉛）或一種含有銦的三元共晶 焊料（4 0 %重量百分比的銦，4 (Γ。/。重量百分比的錫，及 2〇 %重量百分比的鉛）。當作另一上層金屬用，如有一種 含有姻的二元共晶焊料’具II言之，其成份爲例如52 %重 量百分比的姻與48%重量百分比的錫，或者是75%重量百 分比的銦與25 %重量百分比的鉛，下層金屬3 a在软焊時不 會溶化，而且可用來確保基質與晶片間的距離Η。因此， 比上層3b溶點高的金屬最好。例如，高.共晶點坪料（3%重 量百分比的錫與97 %重量百分比的鉛），或諸如金、銅、鎳 或銀之金屬是適合的。 形成此種凸塊的方法將參考圈4以下之圈描述如下》從形 成在半導體基質1上的鋁電極2 化膜被射頻（RF)電漿 蝕刻製法去除。然後由複數層所組成的金屬膜23形成在整 個表面上》此一膜作爲稍後施行之電艘時之共同電極使用 。此一金屬膜23包括Ti-Cu，Ti-Ni-Au，Ti-Pd-Au或其類似 本紙伕尺度逋用中國國家標窣（CNS ) A4规格（210X297公釐） ---------tI <請先1背面之注意事項rk寫本頁 訂 線 經濟部中央揉準局員工消费合作社印製 A7 __B7 五、發明说明（7 ) 者。接著，作爲電鍍時之光軍的光阻24被用上。此後，關 於形成凸塊的位置，一開口設置在光阻中，而一下層金屬 25經由電鍍而形成，而藉由將金屬當成如圖5所示之共同電 鍍電極而使下層金屬25厚度與光阻層24之厚度相同。下層 金屬有助於確保基質與金屬問之距離Η。再者，如圖6所示 ，藉由將上層金屬26鍵在下層金屬25上，將可得到本發明 所期望之結構。之後，一旦藉由濕蝕刻的方式或類似方法 將光阻層24與金屬膜23去除，就可得到如圖2所示之凸塊》 此處，吾人令Η丨、\^、Η2及兄2分別是上層金屬及下層金 屬離表面的高度及髏積，本發明之較佳具體實施例的範園 如下： ’ H2>20#m，1^/1€2=0.3-2，以及vyvpl » 例如 ’當光阻是50 " m厚時，上述實施例具有以下各値： VjiO.Vx lO^mm3) m- V2：3.0 x lO^mm3) 1^:32(只 m)以及 H]:50( # m) 其中 Hi/HfOj，而且 V/VjMJ。 此處H/H2的値太大表示··下層金屬的高度Ηι極大；但是Ηι 的値是有限度的，因爲與上述之光阻的厚度有關。相反地 ’ H/H2的値太小’就無法充分反映本發明確保基質與晶片 間之距離的意囷。當VyV!太大時n在软焊時金屬已熔化的. 量變成大到使得软焊過程不穩定，而太小時可能因軟焊而 導致電氣連線出問題。 .》 另一個實施例如下： (·請先閱讀背面之注意事項^-'寫本頁) -裝 訂 線 -10- 本紙張尺度逋用中國國家橾準（CNS ) Α4規格（210Χ 297公慶） I5 ❹ 965! A7 ___ B7 五、發明説明（8 ) 經濟部中央棟率局貝工消費合作社印裝 νΙ：1.〇χ lO^mm3) V2：2.2 x lO^mm3) H!:50( a in)以及 H2:27( " m) 其中以及Va/Vf〗.〗。 無論在那一種情況，基質與晶片在软焊後的距離H之範圍 爲60-90 a m »由實驗結果可知m，H2>20 " m而且 '/V!〉1。爲了確保連線壽命，距離η是最重要的。H>60 # m 在計算上是有必要的《以上士及H2的條件對滿足最小値是 必要的。 接下來’囷7顯示另一個實施例，其中上層金屬不會像帽 蓋一樣復蓋在下層金屬上/藉由^一特徵，包括下金屬層 3a及上金屬層3b的凸塊20經由電極22及金屬膜23形成在 晶片的半導體基質1上，同時凸塊2〇的週邊係覆蓋著絕緣 層30»此一特徵不同於圖3之實施例之處在於上層金屬3b 與下層金屬3a有相同的斷面積。藉由此種凸塊特徵，水平 的（與基質表面平行）消耗面積是小的，結果可得到高密度 的封裝基質》 形成具有此種特徵的凸塊之方法係顯示在圖8中，圖8説 明與圖6有相同的步驟數，而圖6的方法會形成一帽蓋。就 圖4及圖5而論，它們的結構有共同之處。首先，爲達此目 的，必須形成一層比形成具有恨^之凸塊的方法還要厚的 光阻膜°在此情況中，光阻膜的厚度最好等於或大於70# m。再者，光阻膜是以以下方式形成的：下金屬層27的表面 '· 設置的比光阻層表面運要低，以便形成一上金屬層28。在 背 面 之 注 絮 訂 線 -11 - 本紙法尺度朗巾賴家@7^7^規格（2丨0X297公瘦） 經濟部中央搮準扃另工消费合作社印装 A7 B7 五、發明説明（9 ) 此情況中，假如上金屬層28的表面低於光阻24的表面，吾 人就能得到不帶有帽蓋的凸塊形狀》爲了形成這種形狀的 情蓋，必須將光阻的厚度設定成比平常所需者違要大。就 適當的實施例而言，光阻膜的厚度是100# m或者更大。 此外，本發明也能藉由形成一類似結構的凸塊在封裝基 質的表面上而得到。焊料凸塊通常是由網印製法形成的， 但是用於此一製法的光軍是筇贵的而且規格的修改很困難 。因此，將凸塊形成在較佳實施例的半導體晶片的表面上 〇 在，H2，V2這些參數中，達成本發明之優點的基 本因子是。首先，士是〒金屬層的厚度而且會影 響產品的連線壽命。因此，此一厚度至少必須是30 m。另 一方面，當士是大的時，對連線壽命有好處，但是卻會發 生光阻必須施加的厚些這種問題。此外，以電鍍形成下金 屬層時，高度上的變動很可能會隨著H!値的増高而發生， 而且可能會造成半導體晶片及封裝基質間的連線缺陷。將 上述問題加以考慮之後，h的合理範圍却下： 30^m<H1<90/^m.......(a) 接著，有關乂2/乂〗的檢脍結果將顯示於下文中。▽2/乂1代表 上層金屬對下層金屬的《I積比》當上鮝屬層的體積太大時 ，回流時的金屬熔化過的量變得大，結果會有如下的問 題：回流金屬溢滿於引起電路短路的複數個凸塊之間β另_ 方面，當V2/V1是小的時，儘管有回流，但是仍有可能連線 不足。考慮這些問題之後，V2/Vi&合理範圍如下： -12- 本紙張尺度適用中國國家標準（CNS ) Α4規為（210 X 29?公釐） ^1T-^ <請先M«背面之注意事項(寫本頁) 《 A 7 _______ _B7_____ 五、發明説明（1〇 ) 1 <V2/V1<5 . . .......(b) 在以上所提到的參數中，H2對凸塊的特性影響相當小9 然而，112與\^2/\^有關。 藉由只將焊料凸塊形成於半導體晶片上，形成焊料凸块 於封裝基質表面上之步樣就可以省略，因此生產力的增加 是可期的》此外，藉著將烊料凸塊的結構做成包括高熔點 金屬層與在软焊時實際上會熔化的金屬之雙層結構，晶片 與基質間的間距Η可以保持的很大，結果連線壽命會加長 。再者，所形成的凸塊具有球形尖端，所以在软焊之前不 需要以回流將尖端事先做成球形，結果就可以省略此一步 驟。藉由假設其帽蓋的一部分延异至少最低限度之結構， 處理高密度封裝就變得可能。 - (請先閱饋背面之注意事項！{>.寫本頁 訂 線 經濟部中央標準局貞工消費合作社印製 -13- 本紙張尺度適用中國國家樣率（CNS }八4規格（210X 297公釐）

Claims (1)

  1. A8 B8 C8 D8 *09651 '---- 、申請專利範圍 1 —種用以電氣連接半導饉晶片至封装基質之凸塊結構， 包括： 一第一部分，形成在該半導鱧晶片上，並且由在軟焊 時實質上不能溶化的金屬製成；以及 一第二部份，形成在該第一部分上，並且在軟焊時能 熔化以便電氣性地連接至該封裝基質β 2 如申請專利範圍$丨項之凸塊結構，其中該第—部分的 高度Η ^滿足下列氮式：90 111>1^>30只m。 3 ·如申請專利範圍凸多結構，其中該第二部分的 高度H2滿足下列關的値之範圍爲0.3-2。 4·如申請專利範圍第1 聲么塊g構，其中1此一 關係式被滿足，此處V^V2*別是該第一部-分之髏積與 該第二部分之體積。 5_如申請專利範圍第1項之凸塊結構，其中該第一部分是 由比有關於該第二部分之成份的熔點還要高出20"c之金 屬製成的。 6. 如申請專利範团第1項之凸塊結構，其中該第一部分是 由包含3 %重量百分比的金或錫與97%重量百分比的鉛 所製成的。 7. 如申请專利範困第1項之凸槐結構，其中該第二部分是 由二元系統共晶烊料合金或包_全銦之三元系統共晶焊料 合金所製成的。 8 .如申請專利範園第1項之凸塊結構，其中該第一部分的 斷面積與該第二部分的斷面積實質上是相同的。 •14- (CNS ) A4it#· ( 210X2974^# ) I--.-----(裝------訂------^,, (請先«讀背面之注意事項再填寫本頁) 經濟部中央標準局工消費合作社印製 A8 B8 C8
    、申請專利範圍 經濟部中央揉準局工消費合作社印製 9. —種用以形成多層凸塊的方法，包括以下步裸· 形成金屬膜於一電極上，而該電極係形成在該基質上； 形成光阻膜於該不包括該電極上之部分的基質上； 以該金屬膜作電極來電鍍該第一金屬； 將該金屬膜作爲電極用來電鍍第二金屬於該第一金屬 上；以及 去除該光阻膜。 10. 如申請專利範圍第9項之形成多層凸塊的方法，其中該 第一金屬比該光阻膜薄》 11，如申請專利範圍第9項之形成多層凸塊的方法，其中該 光阻膜包括高溶解度的絕緣塗射。 12.如申請專利範圍第9項之形成多層凸塊的方祛，其中該 弟一金屬不形成在該光阻膜上9 13·-種用於半導體晶片與封裝基質之封裝連接體，包括： 第一金屬部分，形成在該半導體晶片上； 第二金屬部分，形成在該封裝基質上；以及 第三金屬部分，至少部分設置在該第一金屬與該第二 金屬之間，以便供應電氣連接，其中 由該第一金屬部分所確保之該半導體晶片與該封裝基 質間的距離及該第二金屬部分與該第三金屬部分間的距 離等於或大於60Aim 〇 -15- 本紙張尺度逋用中國8家標率（CNS ) A4規格（210X297公釐） (请先《讀背面之注意事項鼻填离本筲) 装. 訂 Λ1
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6683375B2 (en) 2001-06-15 2004-01-27 Fairchild Semiconductor Corporation Semiconductor die including conductive columns
US7022548B2 (en) 2001-06-15 2006-04-04 Fairchild Semiconductor Corporation Method for making a semiconductor die package

Also Published As

Publication number Publication date
KR970018614A (ko) 1997-04-30
US6229220B1 (en) 2001-05-08
JPH0997791A (ja) 1997-04-08
EP0766310A2 (en) 1997-04-02
EP0766310A3 (en) 1999-03-03

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