TW202247367A - 半導體封裝及電子機器 - Google Patents

半導體封裝及電子機器 Download PDF

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Publication number
TW202247367A
TW202247367A TW111118463A TW111118463A TW202247367A TW 202247367 A TW202247367 A TW 202247367A TW 111118463 A TW111118463 A TW 111118463A TW 111118463 A TW111118463 A TW 111118463A TW 202247367 A TW202247367 A TW 202247367A
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TW
Taiwan
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semiconductor package
layer
bump
ubm
diameter
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TW111118463A
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English (en)
Chinese (zh)
Inventor
安川浩永
五十嵐浩一
重田博幸
大平光
酒井清久
細川広陽
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日商索尼半導體解決方案公司
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Publication of TW202247367A publication Critical patent/TW202247367A/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/482—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes for individual devices provided for in groups H10D8/00 - H10D48/00, e.g. for power transistors
    • H10W20/484—Interconnections having extended contours, e.g. pads having mesh shape or interconnections comprising connected parallel stripes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69—Insulating materials thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/221—Structures or relative sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/231—Shapes
    • H10W72/234—Cross-sectional shape, i.e. in side view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H10W72/242—Dispositions, e.g. layouts relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H10W72/244—Dispositions, e.g. layouts relative to underlying supporting features, e.g. bond pads, RDLs or vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/121—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by multiple encapsulations, e.g. by a thin protective coating and a thick encapsulation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W80/00—Direct bonding of chips, wafers or substrates
    • H10W80/701—Direct bonding of chips, wafers or substrates characterised by the pads after the direct bonding
    • H10W80/743—Direct bonding of chips, wafers or substrates characterised by the pads after the direct bonding having disposition changed during the connecting

Landscapes

  • Wire Bonding (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
TW111118463A 2021-05-25 2022-05-18 半導體封裝及電子機器 TW202247367A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2021087821 2021-05-25
JP2021-087821 2021-05-25

Publications (1)

Publication Number Publication Date
TW202247367A true TW202247367A (zh) 2022-12-01

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ID=84229743

Family Applications (1)

Application Number Title Priority Date Filing Date
TW111118463A TW202247367A (zh) 2021-05-25 2022-05-18 半導體封裝及電子機器

Country Status (6)

Country Link
US (1) US20250096087A1 (https=)
JP (1) JPWO2022249526A1 (https=)
KR (1) KR20240012398A (https=)
CN (1) CN117397017A (https=)
TW (1) TW202247367A (https=)
WO (1) WO2022249526A1 (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12582014B2 (en) * 2022-08-23 2026-03-17 Micron Technology, Inc. Semiconductor device assembly substrates with tunneled interconnects, and methods for making the same
KR20250018381A (ko) * 2023-07-21 2025-02-05 양쯔 메모리 테크놀로지스 씨오., 엘티디. 향상된 상호연결 볼 그리드 어레이 설계, 반도체 구조물 및 그 제조 방법
US20250300112A1 (en) * 2024-03-19 2025-09-25 Qualcomm Incorporated Integrated device comprising extended metallization region for pillar interconnects
WO2026078922A1 (ja) * 2024-10-08 2026-04-16 パナソニックＩｐマネジメント株式会社 電子部品

Family Cites Families (23)

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Publication number Priority date Publication date Assignee Title
JPS6038839A (ja) * 1983-08-12 1985-02-28 Hitachi Ltd フリツプチツプ型半導体装置
JPH0513601A (ja) * 1991-07-02 1993-01-22 Matsushita Electron Corp 半導体装置およびその製造方法
JP3291368B2 (ja) * 1993-07-06 2002-06-10 シチズン時計株式会社 ボールグリッドアレイ型半導体パッケージの構造
JPH11111771A (ja) * 1997-10-07 1999-04-23 Matsushita Electric Ind Co Ltd 配線基板の接続方法、キャリア基板および配線基板
JP3532450B2 (ja) * 1999-04-15 2004-05-31 シャープ株式会社 Ｂｇａ型半導体パッケージの実装構造およびその実装方法
JP2004207368A (ja) * 2002-12-24 2004-07-22 Fujikura Ltd 半導体装置とその製造方法及び電子装置
JP4722532B2 (ja) * 2005-04-07 2011-07-13 シャープ株式会社 半導体装置，電子機器および半導体装置の製造方法
JP2007048802A (ja) * 2005-08-08 2007-02-22 Tdk Corp 配線板
JP5065669B2 (ja) * 2006-12-27 2012-11-07 ローム株式会社 半導体装置
JP4959538B2 (ja) * 2007-12-17 2012-06-27 株式会社フジクラ 半導体装置とその製造方法及び電子装置
JP2010092974A (ja) * 2008-10-06 2010-04-22 Fujikura Ltd 半導体装置及びその製造方法、並びに電子装置
JP5544872B2 (ja) * 2009-12-25 2014-07-09 富士通セミコンダクター株式会社 半導体装置及びその製造方法
JP2012191123A (ja) * 2011-03-14 2012-10-04 Renesas Electronics Corp 半導体集積回路装置およびその製造方法ならびにそれを用いた電子システム
US8816505B2 (en) * 2011-07-29 2014-08-26 Tessera, Inc. Low stress vias
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US10141202B2 (en) * 2013-05-20 2018-11-27 Qualcomm Incorporated Semiconductor device comprising mold for top side and sidewall protection
US9484291B1 (en) * 2013-05-28 2016-11-01 Amkor Technology Inc. Robust pillar structure for semicondcutor device contacts
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US9935072B2 (en) * 2015-11-04 2018-04-03 Sfa Semicon Co., Ltd. Semiconductor package and method for manufacturing the same
JP6705592B2 (ja) * 2016-06-20 2020-06-03 住友電工デバイス・イノベーション株式会社 半導体装置の製造方法
KR101901411B1 (ko) 2016-12-27 2018-09-28 한국철도기술연구원 도어 어셈블리
JP2020074352A (ja) * 2017-03-13 2020-05-14 三菱電機株式会社 半導体装置
JP7176169B2 (ja) * 2019-02-28 2022-11-22 住友電工デバイス・イノベーション株式会社 半導体装置の製造方法及び半導体装置

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Publication number Publication date
KR20240012398A (ko) 2024-01-29
WO2022249526A1 (ja) 2022-12-01
US20250096087A1 (en) 2025-03-20
CN117397017A (zh) 2024-01-12
JPWO2022249526A1 (https=) 2022-12-01

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