TW201732969A - 半導體裝置及其製造方法 - Google Patents

半導體裝置及其製造方法 Download PDF

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Publication number
TW201732969A
TW201732969A TW105126408A TW105126408A TW201732969A TW 201732969 A TW201732969 A TW 201732969A TW 105126408 A TW105126408 A TW 105126408A TW 105126408 A TW105126408 A TW 105126408A TW 201732969 A TW201732969 A TW 201732969A
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Taiwan
Prior art keywords
semiconductor element
semiconductor
elastic modulus
semiconductor device
resin portion
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TW105126408A
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English (en)
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TWI637445B (zh
Inventor
Takeori Maeda
Masatoshi Fukuda
Ryoji Matsushima
Hideo Aoki
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Toshiba Kk
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Publication of TW201732969A publication Critical patent/TW201732969A/zh
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Publication of TWI637445B publication Critical patent/TWI637445B/zh

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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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    • H01L2924/3511—Warping

Abstract

本發明之實施方式提供一種能夠容易地獲得穩定之連接的半導體裝置及其製造方法。 實施方式之半導體裝置包含：配線基板、第1半導體元件、第2半導體元件、凸塊、接著部、及樹脂部。第2半導體元件設置於配線基板與第1半導體元件之間。凸塊設置於第1、第2半導體元件之間而將第1、第2半導體元件電性連接。接著部設置於第1、第2半導體元件之間而將第1、第2半導體元件接著，且具有第1彈性率。樹脂部具有較第1彈性率為高之第2彈性率。樹脂部之第1部分設置於第1、第2半導體元件之間。於樹脂部之第2部分與配線基板之間配置有第1、第2半導體元件。樹脂部之第3部分在與從配線基板往向第1半導體元件之第1方向相交叉之第2方向上和第1、第2半導體元件重疊。

Description

半導體裝置及其製造方法
本發明之實施方式係關於一種半導體裝置及其製造方法。
在半導體裝置中，例如有將複數個半導體晶片積層、且將其之間利用凸塊電性連接之構成。獲得穩定之電性連接乃所企盼者。
本發明之實施方式提供一種可容易地獲得穩定之連接的半導體裝置及其製造方法。 根據本發明之實施方式，半導體裝置包含：配線基板、第1半導體元件、第2半導體元件、凸塊、接著部、及樹脂部。前述第2半導體元件設置於前述配線基板與前述第1半導體元件之間。前述凸塊設置於前述第1半導體元件與前述第2半導體元件之間而將前述第1半導體元件與前述第2半導體元件電性連接。前述接著部設置於前述第1半導體元件與前述第2半導體元件之間而將前述第1半導體元件與前述第2半導體元件接著，且具有第1彈性率。前述樹脂部具有較前述第1彈性率為高之第2彈性率。前述樹脂部之第1部分設置於前述第1半導體元件與前述第2半導體元件之間。於前述樹脂部之第2部分與前述配線基板之間，配置有前述第1半導體元件及前述第2半導體元件。前述樹脂部之第3部分在與從前述配線基板往向前述第1半導體元件之第1方向相交叉之第2方向上和前述第1半導體元件及前述第2半導體元件重疊。
以下，一邊參照圖式一邊說明本發明之各實施方式。 圖式係示意性或概念性顯示者，各部分之厚度與寬度之關係、部分之間的大小之比例等並非一定與現實之實物相同。即便在表示相同部分之情形下，亦會有根據圖式而以彼此之尺寸或比例不同之方式顯示之情形。 在本發明申請案說明書與各圖中，針對已出現之圖式賦予與前述之要件相同的要件以相同的符號，而適宜省略詳細之說明。 圖1(a)及圖1(b)係例示實施方式之半導體裝置的示意性剖視圖。 圖1(a)係圖1(b)之A1-A2線剖視圖。圖1(b)係圖1(a)之B1-B2線剖視圖。 如圖1(a)及圖1(b)所示般，實施方式之半導體裝置110包含：配線基板40、複數個半導體元件10、凸塊21、接著部25、及樹脂部30。 複數個半導體元件10(例如半導體晶片)係在Z軸方向上積層。複數個半導體元件10可互不相同。在本例中，複數個半導體元件10係在Z軸方向上彼此隔開。於2個半導體元件10之間設置有凸塊21及接著部25。在本例中，進一步設置有引線框架16。於引線框架16與配線基板40之間配置有複數個半導體元件10。 複數個半導體元件10包含例如第1半導體元件11、第2半導體元件12及第3半導體元件13等。第1半導體元件11及第2半導體元件12係例如記憶體晶片。第3半導體元件13係用於將從連接構件45輸入之資料變換為可輸入半導體元件10之形式、或將從半導體元件10輸出之資料變換為可從連接構件45輸出之形式的介面。半導體元件10之機能為任意。例如，第3半導體元件13之尺寸與其他之半導體元件(例如第1半導體元件11)之尺寸不同。 例如，第2半導體元件12設置於配線基板40與第1半導體元件11之間。在本例中，第3半導體元件13設置於配線基板40與第2半導體元件12之間。複數個半導體元件10之數目為任意。 將從配線基板40往向第1半導體元件11之方向(第1方向)作為Z軸方向。將相對於Z軸方向而垂直之1個方向作為X軸方向。將相對於Z軸方向及X軸方向而垂直之方向作為Y軸方向。 配線基板40之主面例如平行於X-Y平面。配線基板40係例如沿X-Y平面擴展之板狀。複數個半導體元件10之各者係沿X-Y平面擴展之板狀。複數個半導體元件10之積層方向與Z軸方向相對應。 以下，說明複數個半導體元件10中之第1半導體元件11及第2半導體元件12。 凸塊21設置於第1半導體元件11與第2半導體元件12之間。凸塊21將第1半導體元件11與第2半導體元件12電性連接。 接著部25設置於第1半導體元件11與第2半導體元件12之間。接著部25將第1半導體元件11與第2半導體元件12接著。接著部25在X-Y平面內與凸塊21並排。接著部25具有第1彈性率。第1彈性率比較低。 如圖1(a)所示般，可設置複數個凸塊21。複數個凸塊21在X-Y平面內並排。例如，複數個凸塊21之一部分在X軸方向上並排，且複數個凸塊21之一部分在Y軸方向上並排。 如圖1(a)所示般，可設置複數個接著部25。複數個接著部25在X-Y平面內並排。例如，複數個接著部25之一部分在X軸方向上並排，且複數個接著部25之一部分在Y軸方向上並排。接著部25之尺寸可較凸塊21之尺寸大，亦可較其小，亦可相同。 例如，複數個半導體元件10與配線基板40藉由連接構件43電性連接。在本例中，配線基板40包含基板42與貫通電極41。貫通電極41貫通基板42。於配線基板40之下表面設置有連接構件45(凸塊等)。半導體裝置110經由連接構件45安裝於另一安裝部件(未圖示)等而被使用。 樹脂部30設置於複數個半導體元件10之周圍。樹脂部30亦設置於複數個半導體元件10之間的區域。 如圖1(b)所示般，樹脂部30之第1部分31設置於第1半導體元件11與第2半導體元件12之間。於樹脂部30之第2部分32與配線基板40之間配置有複數個半導體元件10(第1半導體元件11及第2半導體元件12)。樹脂部30之第3部分33在與Z軸方向(從配線基板40往向第1半導體元件11之第1方向)相交叉的第2方向(X-Y平面內之任意之方向)上，和第1半導體元件11及第2半導體元件12重疊。例如，第3部分33包圍複數個半導體元件10之側面。 樹脂部30具有第2彈性率。第2彈性率較接著部25之第1彈性率高。換言之，接著部25之第1彈性率較樹脂部30之第2彈性率低。於接著部25使用低彈性率之材料。另一方面，於樹脂部30使用高彈性率之材料。例如，於接著部25使用低彈性率之丙烯酸樹脂等。另一方面，於樹脂部30使用高彈性率之環氧樹脂等。 由於將複數個半導體元件10之周圍予以密封之樹脂部30係使用彈性率高之材料，故能夠抑制例如封裝之翹曲。例如，可提高對來自外部之應力之耐性。可保護半導體元件10免受來自外部之損傷。如此之密封用樹脂部30係例如塑模樹脂。 可知若將如此之彈性率比較高之塑模樹脂亦設置於複數個半導體元件10之間，可知在藉由設置於複數個半導體元件10之間的凸塊21進行之連接上會有不良發生。例如在凸塊21與半導體元件10之間的面上容易產生龜裂。亦有產生剝離之情形。或者，有在凸塊21所連接之半導體元件10之電極層等處，產生龜裂或剝離之情形。 根據本申請案發明人等之實驗可知：藉由在複數個半導體元件10之間設置接著部25，而將複數個半導體元件10彼此接著，連接不良之症狀會減輕。而且，可知藉由將接著部25之彈性率設定為比較低，而能夠抑制凸塊21之連接不良。 在實施方式中，係利用接著部25將複數個半導體元件10彼此接著，且將接著部25之第1彈性率設定為較樹脂部30之第2彈性率低。藉此，能夠抑制凸塊21之連接不良。在實施方式中，可提供一種易於獲得穩定之連接的半導體裝置。在實施方式中，抑制封裝之翹曲、並維持高之外部應力耐性，且可獲得穩定之電性連接。 如圖1(b)所示般，在實施方式中，樹脂部30之第4部分34可配置於配線基板40與第2半導體元件12之間。可抑制此部分之連接不良。樹脂部30之第5部分35可配置於配線基板40與第3半導體元件13之間。可抑制此部分之連接不良。例如，在複數個半導體元件10內，可在與配線基板40最近之半導體元件10和配線基板40之間，配置樹脂部30之一部分。例如，樹脂部30包圍複數個半導體元件10之周圍。複數個半導體元件10由樹脂部30密封而被保護。 圖2(a)～圖2(f)係例示半導體裝置之特性的示意性剖視圖。 該等圖係顯示在具有不同之構成的半導體裝置中翹曲之特性的例子。 圖2(a)及圖2(b)與實施方式之半導體裝置110相對應。在半導體裝置110中，於2個半導體元件10之間設置有凸塊21、上述之接著部25、及樹脂部30。圖2(c)及圖2(d)與第1參考例之半導體裝置118相對應。在半導體裝置118中，於2個半導體元件10之間設置有凸塊21與樹脂部30，但不設置接著部。圖2(e)及圖2(f)與第2參考例之半導體裝置119相對應。在半導體裝置119中亦然，於2個半導體元件10之間設置有凸塊21與樹脂部30，但不設置接著部。半導體裝置118中之凸塊21之數目(密度)較半導體裝置119中之凸塊21之數目(密度)多。 圖2(a)、圖2(c)及圖2(e)係與製造中途之高溫狀態HT相對應。此狀態係與例如凸塊21之連接及在樹脂部30之硬化之時的狀態相對應。高溫狀態HT之溫度為約150℃～約175℃。圖2(b)、圖2(d)及圖2(f)係與製造後之室溫狀態RT(常溫狀態)相對應。室溫狀態RT之溫度為例如約23℃。 如圖2(a)、圖2(c)及圖2(e)所示般，在製造中途之高溫狀態HT下，在任一半導體裝置中，在積層體(複數個半導體元件10)中翹曲實質上皆不存在。因此，凸塊21實質上未有應力施加。 如圖2(b)、圖2(d)及圖2(f)所示般，在室溫狀態RT下，積層體發生翹曲。此係基於例如在積層體(複數個半導體元件10)之熱膨脹係數之差異等。因翹曲而產生應力。如圖2(d)及圖2(f)所示般，在半導體裝置118及119中，與凸塊21連接之區域有應力加諸其上。因此，在凸塊21與半導體元件10之間產生龜裂或剝離。 相對於此，在半導體裝置110中，除了凸塊21以外，尚設置有低彈性率之接著部25。因翹曲而形成之應力導致半導體元件10中之與接著部25相接之部分變形。因變形而應力獲得緩和。因此，在半導體元件10中與凸塊21連接之區域，應力變小。在半導體元件10中與凸塊21連接之區域，翹曲變小。由於在半導體元件10中與凸塊21連接之區域應力變小，故可抑制在凸塊21處之龜裂或剝離。藉此，可獲得穩定之電性連接。 以下，說明本申請案發明人等所進行之實驗之結果的示例。 在以下所說明之實驗中，2種材料作為接著部25而被使用。第1材料在室溫(23℃)下之彈性率D1為0.2 GPa～10 GPa。第2材料在室溫(23℃)下之彈性率D1為約15 GPa。使用該等材料，接著部25之面積比例被變更。例如，設置複數個接著部25，而獲得複數個接著部25之面積(X-Y平面內之面積)之合計面積S25 。另一方面，將半導體元件10之1個之面積(X-Y平面內之面積)設為S10 。面積比例R1(%)為(S25 /S10 )×100(%)。進而，作為樹脂部30係使用4種材料。該等材料在室溫(23℃)下之彈性率D2為12 GPa、15 GPa、30 GPa或35 GPa。 針對上述之接著部25與面積比例R1及使用樹脂部30之試樣進行3種評價。在第1評價中，係評價吸濕及回流銲試驗中封裝裂痕之發生之有無。在第2評價中，係評價在溫度循環試驗中凸塊連接不良之有無。在第3評價中，係評價樹脂部30對複數個半導體元件10之間之未充填之有無。 圖3(a)及圖3(b)係例示有關半導體裝置之實驗結果的表。 圖3(a)顯示作為接著部25在使用第1材料(彈性率D1＝0.2 GPa～10 GPa)時之評價結果。圖3(b)顯示作為接著部25在使用第2材料(彈性率D1＝15 GPa)時之評價結果。在圖中(表中)，顯示有接著部25之面積比例R1及樹脂部30之彈性率D2。 評價結果E1係對應於第1評價，且「+」符號係對應於在吸濕及回流銲試驗中未檢測到封裝裂痕。「-」符號係對應於在吸濕及回流銲試驗中檢測到封裝裂痕。 評價結果E2係對應於第2評價，「+」符號係對應於在溫度循環試驗中未發生凸塊連接不良。「-」符號係對應於在溫度循環試驗中有發生凸塊連接不良。 評價結果E3係對應於第3評價，「+」符號係對應於未檢測到未充填。「-」符號係對應於檢測到未充填。 在該等表中之「/」符號表示無法實施評價。例如在第1評價中，對於在吸濕及回流銲試驗中已產生封裝裂痕之試樣，無法實施第2評價(溫度循環試驗)。 在該等圖中，「+」符號係對應於良好之結果。 如圖3(b)所示般，在接著部25之彈性率D1為15 GPa之高的情形下，獲得良好結果的條件狹窄。例如，在溫度循環試驗(第2評價結果E2)中容易發生凸塊連接不良。 相對於此，如圖3(a)所示般，在接著部25之彈性率D1為0.2 GPa～10 GPa之低之情形下，獲得良好結果之條件寬。例如，在溫度循環試驗(第2評價結果E2)中可抑制凸塊連接不良之發生。在實施方式中，較佳的是接著部25在23℃下之彈性率D1(第1彈性率)為例如0.2 GPa以上10 GPa以下。 如圖3(a)所示般，在接著部25之彈性率D1為低之情形下，在面積比例R1為78.5%時，發生未充填(第3評價結果E3)。若面積比例R1過於高，則2個半導體元件10之間的空間之寬度(樹脂部30之充填路徑之面積)變窄。因此，樹脂部30難以進入2個半導體元件10之間的空間。較佳的是面積比例R1未達78.5%。更佳的是面積比例R1在39.3%以下。 另一方面，在接著部25之彈性率D1為低之情形下，面積比例R1在4.9%或8.6%時，在溫度循環試驗(第2評價結果E2)中容易發生凸塊連接不良。若面積比例R1過於低，則因設置接著部25而發揮之應力緩和的效果為小。較佳的是面積比例R1較8.6%高。更佳的是面積比例R1在11%以上。 如圖3(a)所示般，在接著部25之彈性率D1為低之情形下，在樹脂部30之彈性率D2為12 GPa時，在吸濕及回流銲試驗(第1評價結果E1)中有封裝裂痕發生。在樹脂部30之彈性率D2為15 GPa、30 GPa或35 GPa時，在吸濕及回流銲試驗(第1評價結果E1)中未發生封裝裂痕。 例如，樹脂部30在23℃下之彈性率D2為15 GPa以上30 GPa以下時，在吸濕及回流銲試驗(第1評價結果E1)、溫度循環試驗(第2評價結果E2)、及未充填試驗(第3評價結果E3)中可獲得良好之結果。在實施方式中，較佳的是例如樹脂部30在23℃下之彈性率D2(第2彈性率)為15 GPa以上30 GPa以下。 較佳的是例如樹脂部30在23℃下之第2彈性率為接著部25在23℃下之第1彈性率的1.5倍以上60倍以下。在第1～第3評價結果E1～E3中，可獲得良好之結果。在第2彈性率與第1彈性率之差為大之情形下，第2彈性率之測定法與第1彈性率之測定法可互不相同。 圖4(a)～圖4(f)係例示實施方式之另一半導體裝置的示意性剖視圖。 如圖4(a)所示般，如實施方式之另一半導體裝置111般，第1半導體元件11及第2半導體元件12之組合之位置在複數個半導體元件10之中為任意。在本例中，第1半導體元件11在複數個半導體元件10之中為最上層。 如圖4(b)所示般，在實施方式之又一半導體裝置112中，未設置第3半導體元件13(尺寸不同之元件)。 如圖4(c)所示般，在實施方式之又一半導體裝置113中，省略引線框架16(參照圖1(b))。 如圖4(d)所示般，在實施方式之又一半導體裝置114中，於第3半導體元件13(尺寸不同之元件)與配線基板40之間，配置有第1半導體元件11及第2半導體元件12。 如圖4(e)所示般，在實施方式之又一半導體裝置115中，未設置第3半導體元件13(尺寸不同之元件)，且省略引線框架16。 如圖4(f)所示般，在實施方式之又一半導體裝置116中，於第3半導體元件13(尺寸不同之元件)與配線基板40之間，配置有第1半導體元件11及第2半導體元件12。而且，複數個半導體元件10之1個與配線基板40實質上相接。 如此般，在實施方式中，複數個半導體元件10之構成可進行各種變化。 以下，說明實施方式之半導體裝置之製造方法之例子。以下，說明製造半導體裝置110之情形。 圖5(a)～圖5(d)係例示實施方式之半導體裝置之製造方法的依步驟順序示意性剖視圖。 如圖5(a)所示般，將複數個半導體元件10積層而形成積層體15。在該等之間設置有凸塊21及接著部25。在本例中，積層體15設置於引線框架16之上。 如圖5(b)所示般，準備配線基板40。在本例中，於配線基板40之一部分之上設置有連接構件43。連接構件43亦可設置於積層體15。 如圖5(c)所示般，將積層體15與配線基板40積層。該等之間藉由連接構件43電性連接。藉此，獲得加工體110A。本實施方式之半導體裝置之製造方法可包含準備如此之加工體110A之步驟。 加工體110A包含：第1半導體元件11、第2半導體元件12、凸塊21、及接著部25。第2半導體元件12設置於配線基板40與第1半導體元件11之間。凸塊21設置於第1半導體元件11與第2半導體元件12之間，而將第1半導體元件11與第2半導體元件12電性連接。接著部25設置於第1半導體元件11與第2半導體元件12之間，而將第1半導體元件11與第2半導體元件12接著。接著部25具有第1彈性率。 如圖5(d)所示般，在如此之加工體110A之第1半導體元件11與第2半導體元件12之間、及第1半導體元件11與第2半導體元件12之周圍，形成樹脂部30。樹脂部30具有較第1彈性率高之第2彈性率。 其後根據需要，形成連接構件45。藉此，可形成半導體裝置110。根據實施方式，可提供一種易於獲得穩定之連接的半導體裝置之製造方法。 根據實施方式，可提供一種能夠容易地獲得穩定之連接的半導體裝置及其製造方法。 並且，在本申請案說明書中，「垂直」及「平行」不僅是嚴密之垂直及嚴密之平行，且係例如包含在製造步驟中之誤差者，只要是實質上垂直及實質上平行即可。 以上一邊參照具體例一邊說明了本發明之實施方式。然而，本發明之實施方式並非限定於該等之具體例。例如，有關半導體裝置所包含之配線基板、半導體元件、凸塊、接著部及樹脂部等之各要素之具體構成，只要係本領域技術人員藉由從周知之範圍內進行適宜選擇而可同樣地實施本發明，並獲得同樣之效果者，均包含於本發明之範圍內。 又，將各具體例之任意2個以上之要素在技術上可能之範圍內組合者，只要包含本發明之要旨，均包含於本發明之範圍內。 另外，基於作為本發明之實施方式而於上文敘述之半導體裝置及其製造方法，本領域技術人員可進行適宜設計變更而實施之所有的半導體裝置及其製造方法，只要包含本發明之要旨亦屬本發明之範圍內。 此外，在本發明之思想之範疇內，只要係本領域技術人員就能想到各種變更例及修正例，應理解為該等變更例及修正例亦屬本發明之範圍內。 雖然說明了本發明之若干個實施方式，但該等實施方式係作為例子而提出者，並非意欲限定發明之範圍。該等新穎之實施方式可利用其他各種方式予以實施，在不脫離發明之要旨範圍內，可進行各種省略、置換、變更。該等實施方式及其變化，包含於發明之範圍及要旨內，且包含於專利申請之範圍所記載之發明及其均等之範圍內。 [相關申請案] 本申請案享有以日本專利申請案2016-48898號(申請日：2016年3月11日)為基礎申請案之優先權。本申請案因參照該基礎申請案而包含基礎申請案之全部之內容。
10‧‧‧半導體元件
11‧‧‧第1半導體元件
12‧‧‧第2半導體元件
13‧‧‧第3半導體元件
15‧‧‧積層體
16‧‧‧引線框架
21‧‧‧凸塊
25‧‧‧接著部
30‧‧‧樹脂部
31‧‧‧(樹脂部)之第1部分
32‧‧‧(樹脂部)之第2部分
33‧‧‧(樹脂部)之第3部分
34‧‧‧(樹脂部)之第4部分
35‧‧‧(樹脂部)之第5部分
40‧‧‧配線基板
41‧‧‧貫通電極
42‧‧‧基板
43‧‧‧連接構件
45‧‧‧連接構件(凸塊等)
110‧‧‧半導體裝置
110A‧‧‧加工體
111‧‧‧半導體裝置
112‧‧‧半導體裝置
113‧‧‧半導體裝置
114‧‧‧半導體裝置
115‧‧‧半導體裝置
116‧‧‧半導體裝置
118‧‧‧半導體裝置
119‧‧‧半導體裝置
A1-A2‧‧‧線
B1-B2‧‧‧線
D1‧‧‧彈性率
D2‧‧‧彈性率
E1‧‧‧評價結果/第1評價結果
E2‧‧‧評價結果/第2評價結果
E3‧‧‧評價結果/第3評價結果
HT‧‧‧高溫狀態
R1‧‧‧面積比例
RT‧‧‧室溫狀態(常溫狀態)
X‧‧‧軸
Y‧‧‧軸
Z‧‧‧軸
+‧‧‧符號
-‧‧‧符號
圖1(a)及圖1(b)係例示實施方式之半導體裝置的示意性剖視圖。 圖2(a)～圖2(f)係例示半導體裝置之特性的示意性剖視圖。 圖3(a)及圖3(b)係例示關於半導體裝置之實驗結果的表。 圖4(a)～圖4(f)係例示實施方式之另一半導體裝置的示意性剖視圖。 圖5(a)～圖5(d)係例示實施方式之半導體裝置之製造方法的依步驟順序之示意性剖視圖。
10‧‧‧半導體元件
11‧‧‧第1半導體元件
12‧‧‧第2半導體元件
13‧‧‧第3半導體元件
16‧‧‧引線框架
21‧‧‧凸塊
25‧‧‧接著部
30‧‧‧樹脂部
31‧‧‧(樹脂部)之第1部分
32‧‧‧(樹脂部)之第2部分
33‧‧‧(樹脂部)之第3部分
34‧‧‧(樹脂部)之第4部分
35‧‧‧(樹脂部)之第5部分
40‧‧‧配線基板
41‧‧‧貫通電極
42‧‧‧基板
43‧‧‧連接構件
45‧‧‧連接構件
110‧‧‧半導體裝置
A1-A2‧‧‧線
B1-B2‧‧‧線
X‧‧‧軸
Y‧‧‧軸
Z‧‧‧軸

Claims (7)

  1. 一種半導體裝置，其具備： 配線基板； 第1半導體元件； 第2半導體元件，其設置於前述配線基板與前述第1半導體元件之間； 凸塊，其設置於述第1半導體元件與前述第2半導體元件之間，而將前述第1半導體元件與前述第2半導體元件電性連接； 接著部，其設置於前述第1半導體元件與前述第2半導體元件之間，而將前述第1半導體元件與前述第2半導體元件接著，且具有第1彈性率；及 樹脂部，其具有較前述第1彈性率為高之第2彈性率；且 前述樹脂部之第1部分設置於前述第1半導體元件與前述第2半導體元件之間； 於前述樹脂部之第2部分與前述配線基板之間，配置有前述第1半導體元件及前述第2半導體元件； 前述樹脂部之第3部分在與從前述配線基板往向前述第1半導體元件之第1方向相交叉之第2方向上和前述第1半導體元件及前述第2半導體元件重疊。
  2. 如請求項1之半導體裝置，其中前述樹脂部之第4部分配置於前述配線基板與前述第2半導體元件之間。
  3. 如請求項1或2之半導體裝置，其中前述接著部之面積之相對於前述第1半導體元件之面積的比為11%以上未達78.5%。
  4. 如請求項1或2之半導體裝置，其中前述接著部在23℃下之前述第1彈性率為0.2 GPa以上10 GPa以下。
  5. 如請求項1或2之半導體裝置，其中前述樹脂部在23℃下之前述第2彈性率為15 GPa以上30 GPa以下。
  6. 如請求項1或2之半導體裝置，其中前述樹脂部在23℃下之前述第2彈性率為前述接著部在23℃下之前述第1彈性率的1.5倍以上60倍以下。
  7. 一種半導體裝置之製造方法，其包含：準備加工體之步驟，該加工體包含：配線基板；第1半導體元件；第2半導體元件，其設置於前述配線基板與前述第1半導體元件之間；凸塊，其設置於前述第1半導體元件與前述第2半導體元件之間，而將前述第1半導體元件與前述第2半導體元件電性連接；及接著部，其設置於前述第1半導體元件與前述第2半導體元件之間，而將前述第1半導體元件與前述第2半導體元件接著，且具有第1彈性率；以及 在前述第1半導體元件與前述第2半導體元件之間、及在前述第1半導體元件與前述第2半導體元件之周圍，形成具有較前述第1彈性率為高之第2彈性率之樹脂部的步驟。
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