TW200531249A - Resin-encapsulated semiconductor device and lead frame, and method for manufacturing the same - Google Patents

Resin-encapsulated semiconductor device and lead frame, and method for manufacturing the same Download PDF

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Publication number
TW200531249A
TW200531249A TW094105705A TW94105705A TW200531249A TW 200531249 A TW200531249 A TW 200531249A TW 094105705 A TW094105705 A TW 094105705A TW 94105705 A TW94105705 A TW 94105705A TW 200531249 A TW200531249 A TW 200531249A
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TW
Taiwan
Prior art keywords
resin
terminals
semiconductor device
lead frame
semiconductor element
Prior art date
Application number
TW094105705A
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English (en)
Inventor
Toshiyuki Fukuda
Masanori Minamio
Hiroaki Fujimoto
Ryuichi Sahara
Kenichi Itou
Original Assignee
Matsushita Electric Ind Co Ltd
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Publication date
Application filed by Matsushita Electric Ind Co Ltd filed Critical Matsushita Electric Ind Co Ltd
Publication of TW200531249A publication Critical patent/TW200531249A/zh

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    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Description

200531249 九、發明說明： 【發明所屬之技術領域】 本發明係關於樹脂封裝型半導體裝置，其將半導體元 件透過凸塊接合於導線架之内引腳上，並以樹脂封裝其外 圍，且能將其他半導體裝置或電阻等之功能性零件沿垂直 方向積層。 【先前技術】
近年來’為了要對應電子機器之小型化、高密度化， 要求樹脂封裝型半導體裝置等半導體零件之高密度構裝， 伴隨此’半導體零件則朝向小型、薄型化進展。例如，逐 漸從週邊封裝（peripheral package，外部端子位於半導體裝 置週邊）轉往面陣列封裝（^^ array package，外部端子: ，子狀位於半導體裝置之構裝面）發展。又，在維持小型且 薄型下’亦朝多接腳（pin)化進展。 以下，說明習知之樹脂封裝型半導體裝置。近年來， 關於小型、薄型之樹脂封裝型半導體裝置，已開發實質上 單面模製之所謂QFN(Quad心N〇]ead 四方扁 平無接腳封裝）之樹脂封裝型半導體I置（例如參照日本特 開2001-77277號公報）。 關於習知之樹脂封裝型半導體裝置，首先，說明晶粒 墊露出於封裝體底面之QFN型樹脂封農型半導體裝置。圖 18A〜18D，係表示習知之型樹脂封裝型半導體裝置， 圖刚係俯視圖，圖18A係圖⑽之w截面圖。又將一 般所常用之外部端子突出於封裝樹脂之周緣之QFp(Quad ^ 200531249
Flat Package，四方扁平封裝） 18C係截面圖，18D係俯視圖 併表示於圖 18C、18D。 裝置，係在導線架之晶粒墊5ι v N里樹脂封裝型半導體 數個内引聊部53，以前端相^接合半導體元件52 ’複 ^向的方式排列於晶粒墊51。 + V肢兀件52之電極與内y腳 細線54作電氣連接。半導 <表面’係藉由金屬
在封裝體底面及側面，内 3:’面：曰55封褒。 從封奘抖日, 53之底面及外方側面係 仗封地55露出’而作為外部端子56。 又如圖18C、18D所；^ - j： 體裝置，也是在導線竿之:位塾：QFP型樹脂封裝型半導 複數個内引聊部58二:：57上接合半導體元件52, ”。半導體元件二向的方式排列於晶粒整 入该 之電極與内引腳部58之表面，係藉由 田線Μ作電氣連接。半導體元件52、晶粒墊57、内 封裝"：及，屬細、線59之外圍領域，則以封裝樹脂6〇 、。引腳部58之終端從封裝樹脂60露出， 立而子61排列於封褒體外方側面。 又雖去：Ffl — 、曾加〃 _不，使用於習知之樹脂封裝型半導體裝置之 中、、I心…、備·晶粒墊5 1，配置於框部之開口領域之大致 、 芯吊引腳部62，一端連接於晶粒墊$ 1之各角部， 另一端遠接於4广 、王部來支撐晶粒墊5 1 ;及複數個内引腳部 53 ’以前诚}日非丄 對向的方式排列於晶粒墊5 1之各邊。 ^ W知封裝型半導體裝置之構造，為謀求小型化、 6 ^ 200531249 回岔度化，逐漸從將外部端 m ^ „ 而子排列於半導體裝置週邊之週 邊型QFN等之半導體裝置， — 地 ^ Λ. 朝更回岔度化進展，而使用將 卜部端子以格子狀排列於半導 等體哀置底面之BGA(Ball Grid
Array)等之半導體裝置。妙 罝然而，基於待構裝之基板之線距 及線寬（配線圖案之設計）在加 汉之線距 之限制，或使用焊料之 熔焊法在構裝方法上之限制， 關於取小外部端子間距（為將 此导半導體裝置構裝於基板），在 土败）在QFN專週邊型之半導體 衣置之情形為〇.4mm之外部端子門 I鳊于間距，在BGA等面陣列 型之半導體裝置之情形為0以 ， 、 罝〈㈣為0·65贿之外部端子間距，此間 巨以下之小型化、尚密度之構裝會有困難。 又，半導體裝置，亦必須對應機器（以行動電話等為代 表）之二機能化。以行動電話為例，為了要實現安定之通訊、 或大容量之數據通訊，1GHz以上之頻帶已使用於現在之 移動體通訊（行動電話、PDA # )基蜚由^ . 寻）屋業中。又此預測今後越 來越需要高頻帶之信號通訊。 【發明内容】 本發明之目的在於提供一種樹脂封裝型半導體裝置， 其在半導體裝置内能收納複數個半導體元件、或輔助半導 體元=功能之線圈或電阻零件，且能作成半導體裝置之積 層構造；並提供該樹脂封裝型+導體裝置之製造方法。 本發明之樹脂封裝型半導體裝置，係具備：導線架， 具有i配置於一平面上之複數個第1外部端子部；内引腳 部:藉由該第1外部端子部之背面來形成且排列成框狀； 及第2外部端子部，藉由配置於該内引腳部之外側之凸部 7 -200531249 瑕面來开/成，半導體几件，其連接塾透過凸塊 引腳部覆晶連接；及封裝樹脂，將包含該内引腳部、及挟 持該凸塊之連接部之半導體元件之外圍領域封裝；在該封 裝樹脂之下面領域沿其周緣排列該第丨外部端子部，該第 2外部端子部露出於該封裝樹脂之上面。其特徵在於·具 有複數個電氣導通用之端子，以格子狀排列於該第1外部 端子部之㈣領域，露出於㈣裝樹脂之下面。 本發明之導線架係具備：配置於—平面上之複數個第 1外部端子部；内⑽部’藉由該第1外部端子部之背面 形成而等間隔排列成框狀；及第2外部端子部，藉由配置 於該内引腳部之外側端部之凸部之最上面所形成，·其特徵 在於：具有複數個電氣導通用之端子，以格子狀排列於該 内引腳部之内部領域。 本發明之樹脂封裝型半導體裝置之製造方法具有以下 製程：準備上述構成之導線架之製程；在半導體元件電極 上形成導電性凸塊之製程；將該半導體元件之電極與該内 引腳部及言亥t氣導通用《端子之既定&置藉由該接導電性 凸塊連接之製程；將該内引腳、該半導體元件及該導電性 凸塊樹脂封裝之製程；及將該封裝體分離之製程。 本發明之導線架之製造方法，係用以製造上述構成之 導線架之方法，包含：準備其待獨立之端子間彼此連結之 導線架之製程；在該導線架形成鍍敷層之製程；在該待獨 立之端子間彼此連結之導線架之單面貼附保護片之製程； 將待獨立之端子間之連結部分分離之製程；及在框狀排列 8 200531249 之該内引腳之内側領域將電氣導通用之端子配置複數個之 製程。 【實施方式】 依據本發明之樹脂封裝型半導體裝置，可在外部端子 排列於半導體裝置週邊之週邊型樹脂封裝型半導體裝置之 上下面，形成外部端子，進一步，能在半導體裝置内配置 線圈或電阻，亦能將接腳數不相同之半導體裝置等自由地 積層。 本發明之樹脂封裝型半導體裝置較佳為，前述電氣導 通用之端子’係使用於GND，且其面積比其他端子大。 或’電氣導通用端子中4 2個端子，分別為螺旋狀線圈之 起點及終點。或’在前述電氣導通用中之2個端子間，失 設高介電常數之樹脂。 又，前述半導體元件亦可為，在比覆晶接合領域更内 側之領域具有複數個電極塾，在該電極塾上，$一步將第
2半導體元件(比前述内引腳部之内端之内側領域小且比前 34導㈣之前述⑺丨腳部之厚度薄）作覆晶接合。 ^ ’可在^述第2外部端子部上將第3半導體元件之 置、1Γ黏者μ接合，在比前述㈣腳部更外側之領域配 置復數個内引腳；f:主，命、 夕· 别述内？丨腳柱與前述第3半導體元件 :: = f屬細線連接，使前述内弓1腳柱之相反側露 出於則述封裝樹脂之下面領域。 本發明之導線架能椟 腳部之内側領域具有；::Γ 。例如，纟前述内引 ”疋狀之配線，使前述電氣導通用之 9 ' 200531249 立而子形成於前汗 帝5 f紅狀之配線之始端與終端。或，在前述 %氣¥通用中， 個端子間夹設具有高介電常數之樹脂。 又’能將以上播士 >、含上 成之導線架，形成於絕緣性之保護片上。 在本毛明之樹脂封裝型半導體裝置之製造方法，可進 :’、備準備第2半導體元件之製程，該第2半導體元 :比y述内？丨腳部之内端之内側領域小且比前述導線架 恭，述内引腳°卩之厚度薄；在前述半導體元件之比前述導 修制 後日日接合領域更内側之領域，形成複數個電極墊之 衣耘，在°亥半導體元件處於晶圓狀態之階段，將該第2半 $體元件覆晶接合於該内側領域之電極墊之製程；及將前 述曰曰圓为吾彳成前述半導體元件單位之製程；且將連接前述 第2半^r體元件之前述半導體元件，供給至連接製程，以 將4述電極與前述半導體元件内引腳部及前述電氣導通用 立而子之既定位置藉由前述導電性墊連接。 本發明之導線架之製造方法能包含：將電氣導通用之 _ 埏子配置2個、在前述2個端子間將高介電常數之樹脂注 入硬化之製程。或，使前述内引腳，在半導體裝置裝載領 域之周緣呈等間隔配置，進一步在其内側領域配置具有2 個端子之電阻零件，使前述電阻零件之2個端子之上面之 領域，具有供凸塊接合之充分之寬度。 以下’參照圖式說明本發明之實施形態之樹脂封裝型 半導體裝置，及使用於該裝置之導線架。 (實施形態1) 圖1A，係表示實施形悲1之樹脂封裝型半導體裝置的 ‘200531249 俯視圖，圖1B係仰視圖，圖lc係圖Μ之 、 此樹脂封裝型半導體裝置，如圖化 A、A截面圖。 架1之上面，將第i半導體元件2藉由:’係在導線 接合來構裝，導線架i與第i半導體元件2棟3以覆晶 由封裝樹脂4封裝。 之連接部，藉 5,配置於一平面上；及内引腳部6,形成於第部
祁夂側之面再者，在配置於内引腳部 八 之凸部之最上面，如圖1A、lc所示， " 部7。内引腳部6’等間隔排列成框狀。導線架广部：： 包含複數個電氣導通用之端子8,配置於内弓I腳部6進之： 側領域。第i外部端子部5、第2外部端子部？及端子8, 係從封裝樹脂4露出。 在此，在半導體裝置令，用來傳達高頻電氣信號之距 離越短越好’依半導體元件2之設計佈局，只要將端子8 配置於更直接傳達信號之位置，即可獲得良好之電氣特 性。依半導體元件2之設計佈局，同樣地配置電源接地之 位置。 圖2A〜2F，係表示圖ία〜1C之樹脂封裝型半導體裝置 之义知之一部分的圖。圖2A，係導線架1之俯視圖。圖2B， 係该製程所製造之樹脂封裝型半導體之仰視圖，圖2c〜2F， 係各製程之截面圖，表示圖2B之B_B截面。 首先如圖2C所示，準備導線架1。導線架1之下面， 藉由導線架保持片1 a來保持。其次如圖2D所示，將半導 11 -200531249 體元件2構裝於導線架1。即，將丰暮 ， »肘牛¥體兀件2之電極墊 2a與導線架1之内引腳部6 ,藉由凸塊3來連接。
其次如圖2E所示，將半導體元件2與導線架^之内 引腳部6,藉由封裝樹脂來施以樹脂封裝。即，將已接人 有半導體元件2之導線架丨，配置於樹脂封裝模具％、二 之間，再填充封裝樹脂。雖在圖僅表示丨個半導體裝置， 實際上，將相鄰接而以格子狀排狀樹脂封裳料導體裝 置，實施區塊狀樹脂封裝。此時，亦可介設封裝用片 在此，使導線架1之第〖外部端子部5、第2外部端子部 7及端子8露出於樹脂表面。封裝用樹脂，例如使用@熱^ 性之壞氧樹脂，樹脂成形溫度係設在15〇〜25〇它之範圍。
樹脂封裝後’如圖2F戶斤示，將相鄰接之樹脂封裝型 半導體I置’沿分割線分割。在此製I，若樹脂封裝型半 導體裝置之總厚度係〇jmm以下則能使用雷射切割。另一 方面，右係超過0.2mm之厚度時，從分割時間（指標）問題 或品質面，雷射切割面之金屬熔解之渣滓處理則成為問 題’故使用鋸之分割方法。 ^封裝時，如圖2E所示，若在導線架1之單面貼附封 裝用片10，在樹脂封裝時因會抵接於構成第2外部端子部 7之部分，故能獲得防止樹脂毛邊之效果。又因導線架丄 會稍侵入封裝用片1〇，故會產生陷入距離（sUnd 。例 如使用30# m厚之封裝用片1〇時，其陷入距離為2从㈤〜⑺ Vm。但是，即使不使用封裝用片1〇時，因導線架i之材 料厚度成為樹脂封裝型半導體裝置之總厚度，故能施加安 12 ' 200531249 定之樹脂封裝模具之緊壓力。因此，藉由一般採用之藥品 去除樹脂毛邊法，而完全去除毛邊。 圖3，係表示在本實施形態所使用之一例之導線架之 一部分的俯視圖。此導線架丨丨，在短邊方向之兩端具有複 數個定位孔（圓孔）12與定位孔（長孔）13。定位孔12、13之 内部領域係當作樹脂封裝領域14，在比其更内部的領域， 形成排列呈格子狀之複數個元件裝載領域1 5。元件裝載領 域15之排列數，依半導體裝置之尺寸而改變。又元件裝 載領域1 5内部之外部端子數（接腳數）、設計，係依所收納 之半導體元件之尺寸、輸出入端子數等而改變其規格。 在此，本實施形態之導線架11之尺寸，例如，在短邊 方向30〜60mm，長邊方向50〜260mm，厚度0.1〜0·4πιιη之 範圍使用。又導線架11之材質，使用Fe-Ni材料或Cu合 金等。排列之樹脂封裝型半導體裝置之尺寸，通常，係3 〇 x3·0mm〜20.0x20.0mm 之範圍。 在本實施形態之導線架1 1材質之Fe-Ni材料或Cu合 金等上’要施加與半導體元件之接合或構裝所需之鑛敷。 關於鍍敷材質，可使用鍍Ag、鍍Au、或鍍Ni-Pd等。但 是，特別在鍍Ag時，僅對内引腳施加鍍Ag，在半導體裝 置製造之後製程對内引腳部之對向面之構成外部端子部之 部分，必須鍍Sn-Pb或鍍Sn-Bi。施加於導線架1 1之鍍層 厚度，鍍Au、鍍Pd時係1 // m以下，鍍Ag時係數# m以 下。雖在圖3未圖示’為了要使半導體裝置之組裝製程安 定進行，有時候會在導線架11之半導體元件接合側之對 13 200531249 向面，暫時貼附耐熱性聚醯亞胺或鋁箔等的基材。 圖4A〜4E顯示，導線架n之元件裝㈣域Μ 腳附近之截面、與附設有凸塊3之半導體元件2之电人 圖4A，係表示第i例之内引腳部^。又，從口腳 部16a之前端部遠離之領域，具有f 〇卜部端子部”，立 呈矩形、橢圓形、或圓筒形，係與内引㈣— ：
等，或寬度狹窄之凸部。又，内引㈣W之前端二 有比第1外部端子部U之引腳寬度寬廣之領域。在内^ 腳部…前端之廣域部之平面上，形成高高突出之圓角梯 形之凸部i9a。凸部19a，以對應附設於半導體元件2之電 極墊2a的凸塊3之位置之方式配置。圖4b，係表示附凸 塊3之半導體兀件2接合於凸部丨9a之狀態。 圖4C，係表示第2例之内引腳部Ub。此内引腳部_ 其凸部19b之形狀，與第"列不相同。其他形狀則與第ι 例同樣。凸部19b，其上端面呈凹狀。圖4d，係表示附凸 塊3之半導體元件2接合於凸部1 9b之狀態。 圖4E’係表示第3例之内引腳部16c。内引腳部n 除具有圓形凹部19e(具有比上面低之尖狀凸部）以外，係盘 第W相同。圓形凹部19c之特徵為，當與凸塊3接合日卜、 中央之尖狀凸部會呈楔狀咬入凸塊3。 本實施形態之第丨外部端子部18之長度，例如為 〇々2〜〇.5mm。内引腳部16a〜i6c之長度，例如為〇 5〜2 〇爪功， 寬度例如為0.1〜0.4mm，内引腳部16a〜16c之厚度，例如 為0.1〜〇.20_。若包含形成第2外部端子部17之内弓^ 14 •200531249 部16a〜1 6c之凸部，則為〇· 1〜〇.4mm。此厚度大致係樹脂 封叙型半導體裝置之樹脂厚度之範圍。又，内引腳部 16a〜16c前端之凹凸之突起物 19a、19b之高度係 0.02〜0· 1mm，尺寸係φ〇·〇3〜〇· 1mm程度。又半導體元件2 之尺寸通常在l.〇xl.〇mm〜12.〇xl2.0mm之範圍，半導體元 件2之厚度為〇·〇5〜〇j5mm程度。圖4E之内引腳部16c 之圓形凹部19c之段差為〇·〇2〜0.10mm左右。
圖5 A〜5C，係表示將半導體元件積層時之樹脂封裝型 半導體裝置之一例，圖5A係俯視圖，圖5β係仰視圖，圖 5C係圖5A之C-C截面圖。 此樹脂封裝型半導體裝置，係在導線架20之上面構裝 第1半導體元件2,在帛丨半導體元件2之下面構裝第: 丰導體元件2卜導線架20與第1半導體元件2之連接部、 I”來I:半t體元件Η彼此之連接部’藉由封裝 第"二:：：導線架2〇,如圖5B所示，具有：複數個 部"一於:二:端子 形成，腳部6,係等間隔排列成=㈠之最上面所 如圖5C所示，筮本 一 覆晶接合於内引腳Λ ——兀2 ’藉由金屬凸塊3作 晶接合部之内側6之丽端。在第1半導體元件2之覆 ”導體元件預先咖 设晶接合。第彳；^ | 1 之積層體之厚度，係設半導體元件2、2! 之，、此收納於導線架20之她 15 ‘200531249 厚度内。 導線架20之底面、上面及外方側面從封裝樹脂*露出， 藉此形成第1外部端子部5及第2外部端子部7。如圖5 A、 5B所示，藉由使第1外部端子部5與第2外部端子部7露 出於封裝樹脂4之表面，即可積層複數個對應於相同外部 端子位置之半導體裝置。
圖6A〜6D，係表示將圖5A〜5C所示之樹脂封裝型半導 體裝置之製程一部分、即第丨半導體元件與第2半導體元 件覆晶接合之製程。圖6八及6B係表示製程的立體圖，圖 6C係將圖6A之一部分放大表示的立體圖，圖係將圖 6C之一部分放大表示的側視圖。 百先如圖6A及圖6C所示，在已預先檢查妥之半導體 晶圓22上之第i半導體元件2之電極墊，形成Au柱凸 塊，將第2半導體元件21覆晶接合。其後如圖6b所示， 將已覆晶_ 2半導體元件21之半導體晶圓22,以刀 片23沿圖6D所示之分割線24切割，而分割成各第^半 導體元件2。此時，半導體晶圓22，則以保持環25及切 割片2 6保持。 形成於第1半導體元件2之電極墊2a之凸塊3,例如， 平面形狀之直徑係帅〜〇.lmm程度，高度係〇〇2〜〇1_ 程度。第1、第2半導體元件？ y a 仵2 21，係在單結晶矽材料 之半導體基板表面形成電路後，例 _ 文例如進仃30nm〜100〇nm厚 之Cu配線圖案化，連接於任意之電極墊。 電極墊2a，為了要保持在盥么 "、内引腳則端接合時的接合 16 200531249 可靠性（财超音波、負載或熱等之衝擊）、或組裝後之接入 可靠性，係設置以w、Tl、TlN料通之複數層（3〜4層^ AlCu層，在最表面藉由CVD法等被覆八卜或pd、心等 來形成。凸塊3之材質’在電鍍法使用祕，在機械方法 使用所謂柱凸塊之純度99.99%以上之Au等。若在凸塊3 使用Au時’為了要使接合更確實，在對内引胳p 6前端之 接合時，可使用AgPd糊劑等之導電性糊劑。 (實施形態2)
圖7A，係表示實施形態2之樹脂封裝型半導體裝置的 俯視圖，圖7B係仰視圖，圖7C係圖7八之d_d截面圖。 圖8A〜8G，係表示圖7A〜7Ci樹脂封裝型半導體裝置之製 程0 在本貫施形怨，如圖7C所示，導線架27之第2外部 端子部28之形狀稍微與上述實施形態不相同，具有寬廣 之面積，附設焊球29。又，藉由封裝樹脂3〇樹脂封裝之 方去，在圖2E之情形係使用射出成形方法，相對於此， 在本貫施形恶如圖8E所示，採用澆灌（p〇uing)之封裝方 法。再者，如圖9A、9B所示，使用研削製程。 圖8A，係導線架27的俯視圖。圖8B ,係藉由此製程 所製造之樹脂封裝型半導體的俯視圖。圖8c〜g，係各製 程的截面圖，表示圖8B之E_E截面。 ’先，如圖8C所示，準備導線架27、及附設凸塊3 之半導體兀件2。其次如圖8D所示，將半導體元件2構裝 ;V線采27。即’將半導體元件2之電極墊2a與導線架w 17 * 200531249 之内引腳部6，藉由凸塊3連接。 其次如圖8E所示，將半導體元件2與導線架27之内 引腳部6 ’藉由逢灌製程以樹脂3 〇封裝。在此，使 2 7之弟1外部端子部5，第2外邱☆山工加0 fc ^、 外。Μ而子部8與樹脂％露 出於表面。藉由使用澆灌法，不需要昂貴之樹脂封裝模呈， 在工件上配置接合半導體元件之導線架’㈣灌方法填充 樹脂30。其後，例如以150°c，熱硬化2小時。 '
其次如圖8F所示’以研削製程去除不要之樹脂部分。 其後，如圖8G所示，亦可附加焊球29。 圖9A、9B，係將用以去除不要之樹脂部分之研削势 程之例，更具體地表示σ目9A ’係截面圖，目9b，係^ 示研削後之半導體裝置的俯視圖。如圖9A所示，使用^ 削皮帶31之皮帶研削方法。將在表面塗布含浸研削劑之 研削皮帶31，以7000rpm〜30〇〇〇rpm之高速旋轉。又半導 體裝置2設置於研削台32 ,使研削台32左右往復驅動。 習知，在金屬物之研削係使用切削油，但在半導體之情形， 則使用洗淨水。研削皮帶3 1，以數#瓜步進下降，來研削 封裝树知3 0。又’皮帶研削方法，相較於一般研削半導體 晶圓所使用之研削磨輪之背面研削（backgrounci)法，要研 削如已封裝樹脂之導線架等之長方形工件時，則非常有效 率 〇 又雖未圖示，在樹脂封裝製程，亦能使用習知之藉由 印刷封I方法’係省知所使用之橡皮幸昆（squeegee)法。在印 刷封裝方法，不要之樹脂在硬化前能以橡皮滾去除，故不 18 • 200531249 需要研削製程。一般而言，與射出成形所使用之含有氧化 石夕之熱硬化性環氧樹脂相比較，使用於Μ方法或印刷方 法之樹脂，其耐濕性或物理耐強度稍差。但是，因半導體 裝置比起習知大幅薄型化，所使用之封裝樹脂量少，澆灌 方法或印刷方法用之樹脂之使用可能性變大。 圖10Α、10Β，係表示圖7A〜7C之樹脂封裝型半導體 之構裝例’圖1GA係截面圖，圖刚係仰視圖。在本實施 形‘％之半導體裝置33上，係構裝有小接腳之s〇p (⑽州 outline package)之半導體裝置μ、及QFp之半導體裝置 35。如此般，可簡單地積層市售之半導體裝置，藉此，與 將複數個半導體TG件收納於半導體裝置内之情形比較，能 獲得廉價之半導體裝置。 (實施形態3) 圖11A，係表示實施形態3之樹脂封裝型半導體的俯 視圖，圖11B係仰視圖，圖llc係圖nA之F_F截面圖。 此樹脂封裝型半導體裝置，基本上具有與圖1A〜lc所示者 同樣之構造。本實施形態之特徵，在於將高介電常數樹脂 37夾住於配置在内引腳6之内側領域之2個端子36間。 藉由如此構成，能形成電阻零件。一般而言，電阻零 件（方型），係在氧化鋁陶瓷基板上印刷厚膜糊劑並經熱處 理來製作。電阻體之厚膜糊劑，係使用氧化釕（RU〇2)系列 之糊劑。本實施形態之高介電常數樹脂37亦同樣，能使 用氧化釕（Ru〇2)系列之糊劑，以分配器方式注入於2端子 間後，使之硬化。圖12A〜12F表示其製程。 19 * 200531249 圖 12 A，係墓έ令加 ，、冷線木38之俯視圖。圖12Β，係以此 所製造之樹脂封梦刑主 裂矛王
ί衣i + v體的仰視圖。圖12C〜l2F 製程之截面圖。首杏 係各 σ圖12C所示，準備導線架38。導 438之下面，雜士道。 ' 糟“線架保持片39來保持。在導線架38 巧而、3 ^例如將氧化釕（Ru〇2)系列之糊劑40以分配 °° 41 /主入。错由使其硬化，形成高介電常數樹脂37。下 圖12D〜12F所示之各製程，係與圖2d〜2f同樣。
又替代在2個端子36間配置高介電常數樹脂37，亦 月&配置2端子之雷ρ且愛^土 » . 罨ί1々件。在此情形，電阻零件之2個端 子’要使電阻零件上面之領域，具有供凸塊接合之充分廣 寬度。又替代電阻零件，亦能配置電容零件。曰曰曰片型電容 :的情形’係使用介電常數高之電介質材料。電介質材料， 能使用氧化鈦或鈦酸鋇等各種材料m電容器的情 形，必須使電介質之厚度薄而增大容量，同時使電介質與 電極材料交替積層’因此，比起在前述之2端子間注入高 介電常數樹脂的構成，配置市售之電容器反而能降低成 〇 (實施形態4) 圖13 A，係表示實施形態4之樹脂封裝型半導體裝置 的俯視圖，圖13B係仰視圖，圖13c係圖13A之G_G截 面圖。此樹脂封裝型半導體裝置，基本上具有與圖1Α〜ιε 所示者同樣之構造。本實施形態之特徵，在於配置在内引 腳6之内側領域之2個端子42，係作為線圈43之起點、 終點。 20 200531249 藉由形成線圈43，能使代表高頻特性之電感器Q值升 高，能提高信號輸出特性。並且，藉由將起點與終點之2 立而子42直接凸塊接合於半導體元件2之電極墊仏，與習 知之藉由金屬細線接合時比較，例如電氣信號之高頻係 2GHz之驅動器之情形，輸出會提高5dB。但是線圈43， 因可能會影響其他電氣信號，故必須將半導體元件2之設 計圖案之佈局或配置線圈之位置適切設定。在圖14，表示 頻率（GHz)與電感器q值之關係之例。若增加線圈之匝數、 厚度，此曲線之Q值則上升。 圖1 5，係表不使用於本實施形態之樹脂封裝型半導體 裝置之製造之導線架的俯視圖。形成内引腳部6、第2外 部端子部7等之周緣部之形狀，係與圖2a所示者相同。 在内引腳部6之内側領域配置端子42及線圈43，這點則 與圖2A所示者不相同。使用此導線架，藉由圖i6a〜 所示之製輊，此製造圖1 3 A〜i 3 C之樹脂封裝型半導體裝 置。圖16A〜16F，係表示沿圖13A之G_G線的截面圖，表 不圖13A〜13C之樹脂封裝型半導體裝置之製程。 首先，如圖16A所示，準備在端子42之間設有線圈 之導線架44。導線架44之下面，藉由導線架保持片45來 保持。其次如16B所示，將半導體元件2構裝於導線架 44。即，將半導體元件2之電極墊&與導線架之内引 腳部6，藉由凸塊3連接。 其次，將半導體元件2與導線架44之内引腳部6，以 封裝樹脂來樹脂封裝。即，如圖16C所示，將已接合妥半 21 200531249 導體元件2之導線架44，配置於槲#心# θ9 直於树月日封裝模具46a、46b 之間’填充封裝樹脂。此時，亦 m t 丁7丨入封裝用片47〇將從 Μ月曰封裝模具46a、46b取出之如ρ!〗^ % <如圖16D所示之成形體， 如圖16E所示沿分割線24以刀片 # 月23切割，如圖16F所示 擭得各別之樹脂封裝型半導體裝置。 (實施形態5 ) 圖1 7A，係表示實施形態5之抖日匕仏赴t 之树知封裝型半導體裝置 的截面圖。圖1 7 A之截面圖，係表干 一 你衣不圖17B之fi-H截面。 本貫施形態之特徵在於，配置在圖 甘圚5A~5C所示構造之半導 體裝置之周緣的第2外部端子部7上 一 I/上面，進一步藉由黏著
劑來黏著弟3半導體元件48，進一步尤笙〇 L ^ 少在弟2外部端子部7 外側配置端子（内引腳柱）5〇。第3本邋 y 禾J牛導體το件48與端子50， 係以金屬細線作電氣連接。 又依據IEC(國際電氣標準規格）或JITA(日本電子技術 產業協會規格）之半導體裝置外形規格，來設計外部端子 β，亦可將市售之電子零件、或半導體裝置構裝於本發明 之樹脂封裝型半導體裝置上。 【圖式簡單說明】 圖1A，係表示實施形態丨之樹脂封裝型半導體裝置的 俯視圖，圖⑺係仰視圖，圖lc係圖^之A_A截面圖。 圖2 A，係表示該樹脂封裝型半導體裝置之局部製程之 導線架的俯視圖，圖2B，係該製程所製造之樹脂封裝型半 導體的仰視圖，圖2C〜2F，係各製程之截面圖。 圖3，係表示使用於該樹脂封裝型半導體裝置之導線 22 • 200531249 架之一部分的俯視圖。 圖4A〜4E，係表示導線架之内引腳部分之形狀例的戴 面圖。 圖5 A ’係積層半導體元件時之樹脂封裝型半導體裝置 之一例的俯視圖，圖5B係仰視圖，圖5C係圖5A之 截面圖。 圖6A〜6D，係表示該樹脂封裝型半導體裝置之製裎之 一部分’圖6A及圖6B係表示製程之立體圖，圖6C係將 圖6A之一部分放大表示的立體圖，圖6D將圖6c之一部 分放大表示的側視圖。 圖7 A，係表示實施形態2之樹脂封裝型半導體裝置的 俯視圖，圖7B係仰視圖，圖7C係圖7A之d-d截面圖。 圖8A，係表示該樹脂封裝型半導體裝置之局部製程之 導線架的俯視圖，圖8B，係該製程所製造之樹脂封裝型半 導體的仰視圖，圖8C〜8G，係各製程之截面圖。 圖9A，係將圖8F之製程詳細表示的截面圖，圖 係俯視圖。 θ 10Α，係表示圖7Α〜7C之樹脂封裝型半導體裝置之 構裝例的截面圖，圖10Β係仰視圖。 圖11A，係表示實施形態3之樹脂封裝型半導體裝置 的俯視圖，圖11B係仰視圖，圖uc係圖uA之f_f載面 圖〇 _ ，係表示 ------w……〜π 土丁斧體裝置之製程之一 部分之導線架的俯視圖，圖12Β’係該製程所製造之樹脂 23 200531249 封裝型半導體的仰視圖，圖12C〜12F，係各製程之*石 面圖。 圖13A，係表示實施形態4之樹脂封裝型半導體裝置 的俯視圖，圖13B係仰視圖，圖13C係圖UA之G七截 圖14，係表示頻率（GHz)與電感器q值之關係。 圖1 5，係表示使用於實施形態4之樹脂封裝型半導體 裝置之製造之導線架的俯視圖。 圖16A〜16F，係表示該樹脂封裝型半導體裝置之製程 之一部分的截面圖。 圖1 7 A，係表示實施形態5之樹脂封裝型半導體裝置 的戴面圖，圖WB係俯視圖。 圖18A〜18D，係表示習知之樹脂封裝型半導體裝置， 圖18A及圖18C係截面圖’圖18B及圖18D係仰視圖。 【元件代表符號】 導線架 導線架保持片 第1半導體元件 凸塊 封裴樹脂 第1外部端子部 内引腳部 第2外部端子部 電氣導通用端子 樹脂封裝模具
卜 1卜 20、27、38、44 la 、 39 、 45 2 3 4 、 30 、 55 、 60 5、18 6 、 16a〜16c 、 53 、 58 7 、 17 、 28 8 、 36 、 42 9a 、 9b 、 46a 、 46b 24 200531249
10、47 封裝用片 12、13 定位孔 14 樹脂封裝領域 15 元件裝載領域 19a〜19b 凸部 19c 凹部 21 第2半導體元件 33 、 34 、 35 半導體裝置 37 高介電常數樹脂 40 糊劑 41 分配器 43 線圈 48 第3半導體元件 49 黏著劑 50 端子 51、57 晶粒塾 52 半導體元件 54、59 金屬細線 25

Claims (1)

  1. 200531249 十、申請專利範圍： 1· 一種樹脂封裝型半導體裝置，係具備： v線架’具有：配置於一平面上之複數個帛"卜部端 子部；内引腳部，藉由該第"卜部端子部之背面來形成， 規則地排列成框狀；及帛2外部端子部，藉由配置於該内 引腳部之外側之凸部之最上面來形成； 半導體元件，其連接塾透過凸塊與該内引腳部作覆晶 連接，及 封裝樹脂，將包含該内引腳部、及挟持該凸塊之連接 部之半導體元件之外圍領域封裝； 在該封裝樹脂之下面領域沿其周緣排列該第丨外部端 子部，該第2外部端子部露出於該封裝樹脂之上面，其特 徵在於： —具有複數個電氣導通用之端子，係呈格子狀排列於該 第1外部端子部之内部領且露出於該封裝樹脂之下面。 2.如申請專利範圍第1項之樹脂封裝型半導體裝置， 其中，°亥電氣導通用之端子，係使用於電源GND，其面積 比其他端子大。 •汝申明專利範圍弟1項之樹脂封裝型半導體裝置， 其中，孩電氣導通用端子中之2個端子，係分別形成螺旋 狀線圈之起點及終點。 4·如申請專利範圍第丨項之樹脂封裝型半導體裝置， 其中，在該電氣導通用中之2個端子間，夾設有高介電常 數之樹脂。 26 * 200531249 5.如申請專利範圍第1項之樹脂封裝型半導體裝置， 其中，該丰莫獅〜μ 命體70件，在比覆晶接合領域更内側之領域具 有複數個電極墊，在該電極墊，進-步覆晶接合第2半導 體凡件，其比該内引腳部之内端之内側領域小、且比哕暮 線架之該内引腳部之厚度薄。 μ 6·如申睛專利範圍第5項之樹脂封裝型半導體裝置， 其中，=該第2外部端子部上透過黏著劑接合第3半導體 兀件之月面，在比該内引腳部更外側的領域配置複數個内 引腳柱’该内引腳柱與該第3半導體it件之電極墊以金屬 細線作電氣連接’ $内引腳柱之相反面露出於該封裝樹脂 之下面領域。 種V線架，係具備：配置於一平面上之複數個第 1外部端子部；内引腳部，藉由該第"卜部端子部之背面 來形成’以等間隔排列成框狀；及第2外部端子部，藉由 配置於該内弓|腳部之外側端部之凸部之最上面來形成，盆 特徵在於： ^ 具有複數個電氣導通用之端子，係呈格子狀排列於該 内引腳部之内部領域。 8.如申請專利範圍第7項之導線架，其_，在該内引 腳部之内側領域具有螺旋狀之配線’該電氣導通用之端子 係形成該螺旋狀之配線之始端與終端。 9·如申請專利範圍第7項之導線架，其令，在該電氣 導通用中之2個端子間，夾設有高介電常數之樹脂。 10·如中請專利範圍第7至9項中任_項之導線架， 27 200531249 其形成於絕緣性之保護片上。 匕1. _種樹脂封裝型半導體裝置之製造方法，具有以 下製程： 準備導線架之製裎，爷邕绐加 表枉 Θ V線糸係具有：配置於一 上之複數個第1外部踹子邱. 十面 卜4鈿子邛，内引腳部，藉由該第1外邻 立而子部之背面來形忐楚 ^ 成以寺間隔排列成框狀；第2外部端 :和藉由配置於該内引腳部之外側端部之凸部之最上面 开:成’及複數個電氣導通用之端子，呈格子狀排 内引腳部之内部領域； 在半導體元件電極上形成導電性凸塊之製程； •連接製私，藉由該接導電性凸塊，將該半導體元件之 電極、與該内引腳部及該電氣導通用之端子之既定位置連 接； :内引腳、δ亥半導體元件及該導電性凸塊樹脂封带 之製程；及 i 將該封裝體分離之製程。 12·如申請專利範圍第11項之樹脂封裝型半導體裝置 之製造方法，纟中，進-步具備： 準備第2半導體元件之製程，該第2半導體元件，係 比該内弓丨胳卩立r i #之内端之内側領域小且比該導線架之該内引 腳部之厚度薄； :隹4半導體元件之比藉由該導電性凸塊覆晶接合之領 2、更内側的領域，形成複數個電極墊之製程； 在σ玄半導體元件處於晶圓狀態之階段，將該第2半導 28 200531249 體元件覆晶接合於該内側領域之電極墊之製程；及 將该晶圓依半導體元件單位分割之製程； 將連接有該第2半導體元件之半導體元件，供給至連 接製程，以藉由該導電性凸塊，將該半導體元件之電極、 與該内引腳部及該電氣導通用之端子之既定位置連接。 13· —種導線架之製造方法，所製造之導線架係具備： 配置於一平面上之複數個第丨外部端子部；内引腳部，以 該第1外部端子部之背面來形成，以等間隔排列成框狀； 驗第2外部端子部，藉由配置於該内引腳部之外側端部之凸 部之取上面來形成；2個端子，配置於該内引腳部之内側 領域；及高介電常數樹脂，夾設於該2個端子間； 該製造方法包含以下製程： 準備導線架之製程，該導線架上待獨立之端子間彼此 連結； 在該導線架形成鍍敷層之製程； 在該待獨立之端子間相連接之導線架之單面貼附保護 #片之製程； 將待獨立之端子間之連結部分分離之製程；及 在排列成框狀之該内引腳之内側領域配置複數個電氣 導通用端子之製程。 14·如申請專利範圍第13項之導線架之製造方法，其 中包含：配置2個電氣導通用之端子、並在該2個端子間 注入高介電常數之樹脂而使其硬化之製程。 15 ·如申請專利範圍第1 3項之導線架之製造方法，其 29 200531249 中該内引腳，係在半導體裝置裝載領域之周緣呈等間隔配 置，進一步在其内侧領域配置具有2個端子之電阻零件， 該電阻零件之2個端子之上面之領域，具有供凸塊接合之 充分的寬度。 十一、圖式： 如次頁。
    30 200531249 A 1— B i— c 1— 圖 □□□Π □□□□ □□□□ l f - - 1 Γ _ rj^ □□d □ □ □□□
    6,
    4 5
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CN1665023A (zh) 2005-09-07
US20050194676A1 (en) 2005-09-08
US20090130801A1 (en) 2009-05-21
JP3910598B2 (ja) 2007-04-25
US7495319B2 (en) 2009-02-24

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