TW200423262A - Apparatus for forming a high dielectric film, system for forming a dielectric film on a microelectronic substrate and method for forming a Ta2O5 film - Google Patents

Apparatus for forming a high dielectric film, system for forming a dielectric film on a microelectronic substrate and method for forming a Ta2O5 film Download PDF

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Publication number
TW200423262A
TW200423262A TW093116121A TW93116121A TW200423262A TW 200423262 A TW200423262 A TW 200423262A TW 093116121 A TW093116121 A TW 093116121A TW 93116121 A TW93116121 A TW 93116121A TW 200423262 A TW200423262 A TW 200423262A
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Taiwan
Prior art keywords
film
temperature
reaction chamber
wafer
forming
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TW093116121A
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English (en)
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TWI248137B (en
Inventor
Young-Wook Park
Moon-Yong Lee
Kyung-Hun Kim
In-Sung Park
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Samsung Electronics Co Ltd
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Publication of TW200423262A publication Critical patent/TW200423262A/zh
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02183—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing tantalum, e.g. Ta2O5
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40—Oxides
    • C23C16/405—Oxides of refractory metals or yttrium
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/46—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for heating the substrate
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/56—After-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H01L21/0234—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02345—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to radiation, e.g. visible light
    • H01L21/02348—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to radiation, e.g. visible light treatment by exposure to UV light
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31604—Deposition from a gas or vapour
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31691—Inorganic layers composed of oxides or glassy oxides or oxide based glass with perovskite structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02197—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides the material having a perovskite structure, e.g. BaTiO3
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/55—Capacitors with a dielectric comprising a perovskite structure material

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
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  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Formation Of Insulating Films (AREA)
  • Chemical Vapour Deposition (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)

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200423262 玖、發明說明：
I：發明戶斤屬之技術領域I 本發明為有關於在半導體記憶裝置之電容器中形成 做為高介電性膜的氧化鈕(Ta2〇5)之方法及其裝置，尤其為 5 有關於形成一 Ta2〇5之方法，其中不純物及氧缺陷減少且通 量增加，及其裝置。 I：先前技術1 發明背景 因同具有電容器及電晶體組成的記憶元件之DRAMS 10 變得更集成，電容器的面積變得更小且操作電壓降低。然 而識別信號所需的電價比原來要更高，故在電容器中要誘 導出比預先情形更高的電價變得更困難。 電容器的電價Q為電容C與操作電壓V之乘積。因此欲 產生一高於預定量之電價而操作電壓較低時，則必須提高 15 其電容。 因電容器的有效面積增加，絕緣體的介電常數增加或 是絕緣體厚度減小都可使電容增大。一種比一般廣泛使用 的Si〇2薄膜具有更高介電常數且被推行為使用於DRAMs中 介電薄膜的物質為Ta2〇5薄膜。Ta2〇5的介電常數會隨沈積狀 20 況及沈積方法的不同而改變，而大約為20-50。因此，當使 用Ta205薄膜為電容器中的介電膜時，電容器下層電極的有 效面積減小而電容仍然維持甚或提升，此時並可降低生產 成本。 上述使用Ta2〇5薄膜的電容器其一般製造過程的流程 圖不於第1圖。參考第1圖’電容器的製成包括了電容器 之下層電_形成触(S1)，清訂層電極的表面以移除表 面自然形成的氧化層（S2)，快速熱處理(S3)，Ta2Q5薄膜的 沈=S4) ’經過·〇3的退火處理(S5)，〇2下退火處理⑼) 及最後電容器的上層電極的形成(S7)。其中快速熱處理幻 =的在於消除在連續減理打層電減氧化纽層界面 叫乳化的障礙。辦1^03的退火處理用以消除Ta2〇5薄膜 中氧的空缺，〇2的退火處理S6是用以消除Ta2〇5薄膜中之差 在製造具有Ta2〇5薄膜沈積之電容器的方法中，在一獨 立的沈;職置中使用退火劑及清潔劑。因此，在Ta2〇5沈殿 過程中具有下列幾個問題。第-，在製財由了响薄膜形 成之介電膜是暴露於空氣巾，因此會《水份及游離碳， 造成成品電容器的品質不良。第二，不論已置人或未置入 ㈣圓’在每—裝置之每—製程中的傳送，加熱或冷卻過 程並非有效率的，因此降低了生產率。 C發明内容3 發明概要 因此，本發明的目的即為提供了—種形成Ta2〇5薄膜方 法’其在製程之前或之後可在—單—反應室巾原位進行。 “本發明的另一目的為提供在單-反應室中形成Ta2〇5 薄膜及UV-〇3退火處理的裝置。 為完成上述目的提供如申請—專· 項之裝 200423262 較適用的如申請專利範圍第2及3項。 為較好的如申請專利範圍第5及6項。 仍然較好的一申請專利範圍第7及8項。 較佳地，反應室可提供U V燈及〇3注入器或是R F發電機 5 及03注入器。 且，亦可裝入電漿形成裝置於反應室中。 為完成上述發明提供如申請專利範圍第9項之裝置。 較適用的如申請專利範圍第10及11項。 較好的如申請專利範圍第12、13及14項。 10 較好的一申請專利範圍第15及16項。 仍然為較好的如申請專利範圍第第17、18、19及20項。 為完成上述沈積過程，提供如申請專利範圍第21項之 裝置。 較好的如申請專利範圍第22及23項。 15 根據本發明，沈積製程及UV-〇3(或電漿-臭氧）的退火 過程可以由適當的改變溫度而連續的在單一個反應管或反 應室中進行。由上所述，製程可被改進且傳統方法所產生 的問題：如由於介電層暴露在空氣中而會吸水及游離碳的 問題可被避免。再者，由於在第一室及第二室之沈積及退 20 火的製程中溫度可被控制，故不需要在沈積之後改變溫度。 圖式簡單說明 上述本發明的目的及優點可由附圖具體化的說明描 寫而變得更明白清楚，其中 第1圖為一般製造電容器之流程圖，其中Ta2〇5薄膜為 向介電層； 第2圖顯示根據本發 程序的順序圖； 在Wa2〇5_方法時不同 第3圖顯不根據本發 τ伽時，不同程序的順序:另/、…例中形成 構^=及弟5圖根據本發明形成Ta2〇5薄膜的裝置結 稱的截面圖。 【方式】 幸父佳實施例之詳細說明 10 15 〜根據本發明形成Ta办薄膜的方法，沈積及退火Ta205 賴的製程在單—反應室存位中進行。此即如第2圖所 不，必方法包含了下列步驟··將依序進行沈積及退火Ta2〇5 薄膜的反應室升溫至350到45〇如12);在反應室中形成 丁响缚膜⑻3);在沈積反應之㈣反應室溫度降低至， 至35〇C(S14)，之後經過uv_〇3退火處理以填補在2則5〇 1於反應室中沈積形成之Ta2〇5薄膜上氧缺陷之沈積的後 製程及將反應室再度降溫（Sl6)。 根據本發明之退火過程，可用uv_〇3退火或是電浆_氧 氣退火’其中使用υν·ο_退火需要紫外線燈，而電漿_氧氣 20 退火則需以RF為動力的電漿形成裝置。 且依本發明形成Ta2〇5薄膜的方法，只進行Ta2〇5沈積的 第一反應态及只進行退火反應的第二反應器被置於單一反 應至，故形成第3圖Ta2〇5薄膜S13之製程及第3圖S15之 UV-〇3下退火處理可分別在不同群中進行。在此，在移動 13 200423262 已沈積形成Ta2〇5薄膜之晶圓（S23)需降溫（S13)，且在紫外 線-臭氧退火處理之前必需要升溫（S25)。在第3圖中相同於 第2圖的步驟使用相同的參考代碼，因此省略其等之描述。 參考第4及第5圖，如本發明所述之形成Ta2〇5薄膜的 5 裝置，Ta205膜的沈積及UV-〇3退火處理（或是電漿-氧氣的 退火處理，已知可以電漿-氧來代替UV-〇3的退火處理）均在 單一反應室中依序完成，如此可以改善Ta2〇5薄膜的生產率 及性質。裝置中具有可發出紫外光的光源11，紫外光可穿 透的石英窗12及預先設定的氣體，如氧氣，晶圓13及可置 10 放晶圓的感應器14。在此，放射出紫外光的光源11可以電 漿形成裝置（未顯示）取代以進行電漿-氧氣退火處理。製造 Ta2〇5薄膜的裝置中尚包括可以控制晶圓運送或是放置晶 圓至適當位置之高度的升降轴15，可加熱感應器14及晶圓 13的熱源17及一可以旋轉晶薄片13的旋轉軸17，用來提高 15 沈積Ta2〇5薄膜的均勻度。為了使沈積Ta2〇5薄膜及退火處理 可以皆在反應室中進行，可裝設〇3注入器（未示出）及RF動 力發電機（未示出）。各適當的元件在反應器中可以彼此連結 裝設以使沈積及退火製程可在不同溫度下連續完成。較佳 地為了完成如第3圖所示的程序，只進行Ta205薄膜沈積的 20 第一反應室及只進行程序即退火程序的第2反應室是分離 的。在這個例子中，第一及第二反應室分別包含了感應器 14、升降轴15、熱源16及石英窗12。第一反應室更包含了 一旋轉轴17以使沈積面平滑，第二反應室更包含了一光源 11以作退火處理。第一及第二反應器可被裝設在同一反應 14 200423262 室中，以避免在第一室完成沈積的晶圓在傳送時接觸到空 氣。 參考第2到5圖，描述依本發明之TaA薄膜形成方法 及用於其之裝置的操作。 5 首先，如第1圖所示，以丁七〇5薄膜為高介電層的電容 為一般製^私序，包括了 ·電谷器中下層電極的形成（以）， 下層電極表面的清潔（S2)，快速熱處理（S3)，形成丁七〇5薄 膜層（S4)，UV-〇3退火處理（S5)，〇2退火處理（S6)。本發明 只限於Ta2〇5薄膜的形成過程及退火處理步驟以。 10 由一般形成Ta2〇5薄膜的方法，液態Ta(OC2H5)5與〇2在 350-450°C反應生成用來沈積的Ta2〇5 (S13)。以uV_〇3或電 漿-〇2退火處理中（S15)中，由臭氧發生器（未顯示）生成的臭 氧被波長254nm的紫外光燈（或電漿形成裝置）解以產 生〇2 ’其可填補具有氧空缺之Ta2〇5薄膜内側。在此退火處 15 理的溫度為250-350°C。 根據本發明，由於UV-O3的退火處理（S15)溫度在可控 制的範圍内，故Ta2〇5薄膜的沈積S13及UV-03退火處理S15 可以在具有反應管的單一室中完成。也就是說為使本發明 間便的元成’ uv燈11可裝設在形成Ta2〇5薄膜的反應室 20 中，且〇3在外部的〇3供應器供給。 詳言之，當丁a2〇5薄膜沈積時（S13)，UV燈11是未開啟 且〇3未被注入。但在沈積反應之後，放置晶圓13的感應器 14溫度改變5°C至10°C間，然後打開UV燈及注入〇3，以進 行退火處理（SI5)。因此Ta205薄膜的沈積作用S13及UV-〇3 200423262 退火處理S15是依序在同一反應室中進行故不需要移動晶 圓13。爹考第2圖，升高溫度S12以得適於Ta2〇5薄膜沈積 S13之溫度，降低溫度S14以得適於UV-〇3退火處理S15之溫 度，及在UV·03退火處理SIS後的降溫S16的製程是必需要 5 的。 根據前述本發明形成Ta2〇5薄膜的方法，Ta2〇5薄膜沈積 作用（S13)及UV-O3退火處理（S15)可依序在同一反應室中 完成而不需要移動任一被處理的物件。如此，生產率可提 升且吸收溼氣及游離碳吸附的問題可被避免。 10 茶考第3圖，顯示本發明另一實施例之形成Ta2〇5薄膜 的方法，Ta2〇5薄膜的沈積作用S13及υν-03退火處理S15並 不在同一反應室中進行，然而兩群反應室是在單一裝置（單 一反應室中）中。也就是說，兩個分別用於丁七仏薄膜沈積 S13及UV-〇3退火處理815的小反應室是獨立的裝設在單一 15 裂置中’然後在作完Ta2〇5薄膜沈積作用S13後，薄片即被 移送至作UV-〇3退火處理S15(S23)的反應室中，在此，因傳 送晶圓的氣氛在單一反應室中，傳統吸收溼氣及游離碳的 問通並不會發生。 根據前述另一實施例，在沈積及退火處理的各自反應 20中’溫度是可以分別控制的。因此，在沈積反應之後，溫 度不需像第2圖一樣改變至退火處理之溫度。也就是說， 在第一反應器設定沈積反應之溫度；在第二反應器設定退 火處理的溫度。 參考第4及第5圖，參考標號π表示UV燈或是電漿形 200423262 成κ j而標號12表示—石英f。石英窗^來使紫外光 穿透至晶圓及供給氧氣。標號13表晶“《14代表可放 置晶圓的感應器14。感應器14加熱晶圓13至一預設溫度’ ⑽Μ是可㈣的’故可將晶圓13由感應器14分離至_ 預設距離，使晶圓13的溫度下降。標號16表—可將反應器 或晶圓加熱的熱源。對熱源16而言，通常使料火線圈或 是燈。標號17表示可_晶圓13的_提高形錢膜的均 勻度。 並 '寺卜'皿卩使注入反應氣體時可以進行穩定的反 應。感應器14較佳由選擇自透明的石英、不透明且高熱傳 導率2金屬及其金屬化合物、陶纽外覆料的材料所形 成_ \表示用於傳送或安置晶圓13的升降軸。由於軸
ίο 同才參考第4及第5目，在沈積Ta2〇5薄膜反應的例 子中放置在感應斋14上的晶圓13由感應器丨4下方的熱源 15 16加熱。加熱晶圓13之溫度控制在300-550。<3。當晶圓13達
到適當溫度之後，Ta(OC2H5)5由晶圓13側注入，氧氣由預 先叹定的氧氣注入器（未顯示）注入石英窗12中，至丁^〇5 相形成處。如第5圖所示，為了消除存在於薄膜中之氧 缺陷，〇3由預先設定之臭氧注入器（未顯示）注入反應管中。 2〇為使注入〇3消除氧缺陷，需要相對沈積反應時較低的溫 度。即，當〇3>主入至南溫之晶圓時，A不能藉紫外線分解 為活躍之氧原子，但會被重新結合為穩定的氧分子。因此， 氧缺陷無法被消除。故當A注入時，溫度維持低M35〇t 。 且如第5圖所示，晶圓]3由預先設定的升降軸15升高至離 π 開感應器14 一特定距離，以降低感應器14的熱傳。如此， 晶圓溫度可較快速降低。接著由A產生器產生之〇3由反應 官外經過石英窗12注入以完成在反應管中〇3之退火處理。 如上所述，沈積反應及退火處理均在同一個反應室中 5完成，不需在不同溫度及不同時間下移動晶圓。然而，根 據另一實施例，沈積反應及退火處理亦可在分別的反應室 中元成，換言之，即第一及第二反應室。即沈積反應在具 如第4圖之裝置但除了光源反應室中完成，退火處理 在具如第4圖之裝置之反應室中進行。如前所述，在所欲 10的程序中並不需要改變溫度。 根據如上所述之本發明，一高介電薄膜之沈積及 UV-03退火處理在—反應室於不同溫度下完成，以形成高 介電薄膜層。因此’製程可被簡化並生產出高品質之產品。 必須了解的是，本發明並未受說明狀實施例限制，且 15由i此技蟄者可在本發明範圍内改變及修飾。 【圖式簡單說^明】 ^第1圖為一般製造電容器之流程圖，其中τ々ο5薄膜為 高介電層； ” 第2圖顯示根據本發明在形成τ々〇5薄膜方法時不同 2〇 程序的順序圖； 第3圖_示根據本發明的另—具體實施例中形成 Ta205薄膜時’不同程序的順序圖； 第4圖及第5圖根據本發明形成丁七〇5薄膜的裝置結 構的截面圖。 ]8 200423262 【圖式之主要元件代表符號表】 11紫外光光源/電漿形成裝置 15升降軸 12石英窗 16熱源 13晶圓 17旋轉軸 14感應器

Claims (1)

10 15 20 拾、申請專利範圍： L 一種用來形成高介電薄膜之裝置，其中沈積Ta2〇5膜以 作為半導體記憶體中電容器之高介電薄膜，其包含了一 僅用來沈積該咼介電薄膜之第一反應室及僅在該同一 裝置内，用來在該沈積後退火該高介電薄膜之第二反鹿 室， ~ —'其中該第-反應室包含一置放一預定之晶圓的第 —感應n、用以控制該晶圓之位置及移動的第—升降裝 置、用以將該晶圓及該感應器加熱至第—溫度並維持該 第—溫度的第-加熱裳置、以及一用來將_預定光與一 預定氣體傳送至該晶圓的第—石英t，且其t該第二反 應室包含用來產生紫外紐之紫外光產生U、_用來 放置自該第-反應室傳送來之晶圓的第二感應器、一用 來將該紫外光與-氣體傳送至該晶圓之第二石英窗、用 來控制該晶圓之位置與移動的第二升降裳置、用來將古亥 晶圓與該第二感應器加熱至第二溫度並維持該第二、： 度之第二加熱裝置。 2·如申請專利範圍第！項之形成高介電薄膜之裝置，其中 該第一溫度係於350。(：至45〇艺之範圍間。 /、 如申％專利|巳圍第1項之形成高介電薄膜之裝置， 该第二溫度係於250。(：：至35〇艺之範圍間。 /、 4·=於一微電子基材上形成一介電薄膜的系統，該系统
一加工反應室，其係將其 一内部與一 外部氣氛隔 20 5 離； 〜、土 乐一田U夂應室，其係收知 2 _亥底材上沈積介電薄膜，其中該介電薄膜包 二選自由Ta2〇5、BaSr™3(BST)及p咖Q雜)所 成之組群中的材料；及 —於該加工反應室内之第二副反應室，其係收納 该底材並將該介電薄膜退火，以使得該 間，曝露至空氣的量得以減少。 人』 5.如申清專利範圍第4項之系統， 10 •方；該加工反應室内之第
其中忒第一副反應室包含一收納該底材之第一感 絲、-將該底材加熱至_第—溫度之第_加熱源 —供應—第—反應物氣體之第-氣體來源，以沈積該介 電薄膜；及
、，其中該第二副反應室包含一產生紫外光線之紫外 光產生器、-收納具該介電薄膜之底材的第二感應器、 «該紫外光狀石英t、—供H反應物氣體 之第二氣體來源、及一將該底材加熱至一第二溫度之第 一加熱源，以使該介電薄膜退火。 6·如申請專利範圍第4項之系統，其中該第一溫度係於 350至45CTC之範圍，而該第二溫度係於25〇至35〇。〇 之範圍。 7· 一種形成Ta2〇5薄膜之方法，其包含下列步驟： 於第一溫度下，在一獨立地裝設於處理晶圓之單一 反應室内部之m應室内，將該Ta2G5_沈積於該 2] 423262 ^上，亥Ta2〇5薄膜在半導體記憶體之電容器中係作為 一高介電膜層； 在叹有屋氣吸收與游離碳發生下，將該晶圓傳送至 獨立地裝設於該單-反應室内部之第二副反應室 及 —於k第-溫度為低之第二溫度下，在該第二副反應 至内，使形成於該晶圓上iTa2〇5薄膜退火。 8:如申請專利範圍第7項之形成Ta2〇5薄膜之方法，其中該 k火步驟係由UV-〇3退火方法及電漿-〇2退火方法中之 一者進行。 •如申請專利範圍第7項之形成Ta205薄膜之方法，其中進 订該第一溫度係在35(rc-45(rc之範圍間。 1〇·如申請專利範圍第7項之形成加〇5薄膜之方法，其中進 行该第二溫度係在25〇1-35〇1之範圍間。 22
TW093116121A 1995-11-28 1996-08-06 Apparatus for forming a high dielectric film, system for forming a dielectric film on a microelectronic substrate and method for forming a Ta2O5 film TWI248137B (en)

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