SG55416A1 - Virtual channel memory system - Google Patents

Virtual channel memory system

Info

Publication number
SG55416A1
SG55416A1 SG1997004068A SG1997004068A SG55416A1 SG 55416 A1 SG55416 A1 SG 55416A1 SG 1997004068 A SG1997004068 A SG 1997004068A SG 1997004068 A SG1997004068 A SG 1997004068A SG 55416 A1 SG55416 A1 SG 55416A1
Authority
SG
Singapore
Prior art keywords
memory system
virtual channel
channel memory
virtual
memory
Prior art date
Application number
SG1997004068A
Other languages
English (en)
Inventor
Jeffrey H Lee
Manabu Ando
Original Assignee
Nec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corp filed Critical Nec Corp
Publication of SG55416A1 publication Critical patent/SG55416A1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/084—Multiuser, multiprocessor or multiprocessing cache systems with a shared cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0844—Multiple simultaneous or quasi-simultaneous cache accessing
    • G06F12/0846—Cache with multiple tag or data arrays being simultaneously accessible
    • G06F12/0848—Partitioned cache, e.g. separate instruction and operand caches
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Dram (AREA)
  • Memory System (AREA)
SG1997004068A 1996-11-18 1997-11-17 Virtual channel memory system SG55416A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/746,829 US6167486A (en) 1996-11-18 1996-11-18 Parallel access virtual channel memory system with cacheable channels

Publications (1)

Publication Number Publication Date
SG55416A1 true SG55416A1 (en) 1998-12-21

Family

ID=25002524

Family Applications (1)

Application Number Title Priority Date Filing Date
SG1997004068A SG55416A1 (en) 1996-11-18 1997-11-17 Virtual channel memory system

Country Status (7)

Country Link
US (3) US6167486A (zh)
EP (1) EP0843261A3 (zh)
JP (1) JPH10326225A (zh)
KR (1) KR100268321B1 (zh)
CN (1) CN1081360C (zh)
SG (1) SG55416A1 (zh)
TW (1) TW384426B (zh)

Families Citing this family (97)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6167486A (en) * 1996-11-18 2000-12-26 Nec Electronics, Inc. Parallel access virtual channel memory system with cacheable channels
JP3133004B2 (ja) * 1996-11-21 2001-02-05 株式会社日立製作所 ディスクアレイ装置およびその制御方法
US6118462A (en) 1997-07-01 2000-09-12 Memtrax Llc Computer system controller having internal memory and external memory control
US6577317B1 (en) 1998-08-20 2003-06-10 Apple Computer, Inc. Apparatus and method for geometry operations in a 3D-graphics pipeline
WO2000010372A2 (en) 1998-08-20 2000-03-02 Apple Computer, Inc. System, apparatus and method for spatially sorting image data in a three-dimensional graphics pipeline
US6771264B1 (en) 1998-08-20 2004-08-03 Apple Computer, Inc. Method and apparatus for performing tangent space lighting and bump mapping in a deferred shading graphics processor
US6182183B1 (en) * 1998-11-13 2001-01-30 Sonics, Inc. Communications system and method with multilevel connection identification
US6442666B1 (en) * 1999-01-28 2002-08-27 Infineon Technologies Ag Techniques for improving memory access in a virtual memory system
KR100594198B1 (ko) * 1999-05-14 2006-07-03 삼성전자주식회사 다중채널 램버스 시스템
EP1059588A1 (en) * 1999-06-09 2000-12-13 Texas Instruments Incorporated Multi-channel dma with request scheduling
JP2001014840A (ja) 1999-06-24 2001-01-19 Nec Corp 複数ラインバッファ型メモリｌｓｉ
DE19951046A1 (de) * 1999-10-22 2001-04-26 Siemens Ag Speicherbaustein für ein Mehrprozessorsystem und Mehrprozessorsystem
US6539487B1 (en) * 1999-11-09 2003-03-25 International Business Machines Corporation System for dynamically selecting maximum number of accessible banks of memory per cycle by monitoring actual power to each of the banks to determine the number of accessible banks
US6708254B2 (en) * 1999-11-10 2004-03-16 Nec Electronics America, Inc. Parallel access virtual channel memory system
DE19956829A1 (de) * 1999-11-25 2001-06-07 Siemens Ag Speichereinrichtung für Prozessorsysteme
US6791555B1 (en) 2000-06-23 2004-09-14 Micron Technology, Inc. Apparatus and method for distributed memory control in a graphics processing system
US6973542B1 (en) * 2000-07-18 2005-12-06 International Business Machines Corporation Detecting when to prefetch inodes and then prefetching inodes in parallel
US6546461B1 (en) * 2000-11-22 2003-04-08 Integrated Device Technology, Inc. Multi-port cache memory devices and FIFO memory devices having multi-port cache memory devices therein
US6892279B2 (en) 2000-11-30 2005-05-10 Mosaid Technologies Incorporated Method and apparatus for accelerating retrieval of data from a memory system with cache by reducing latency
US6587920B2 (en) 2000-11-30 2003-07-01 Mosaid Technologies Incorporated Method and apparatus for reducing latency in a memory system
US6981073B2 (en) * 2001-07-31 2005-12-27 Wis Technologies, Inc. Multiple channel data bus control for video processing
DE10151733A1 (de) * 2001-10-19 2003-04-30 Infineon Technologies Ag Prozessor-Speicher-System
US6839797B2 (en) 2001-12-21 2005-01-04 Agere Systems, Inc. Multi-bank scheduling to improve performance on tree accesses in a DRAM based random access memory subsystem
US7389387B2 (en) * 2001-12-31 2008-06-17 Intel Corporation Distributed memory module cache writeback
WO2003081454A2 (de) * 2002-03-21 2003-10-02 Pact Xpp Technologies Ag Verfahren und vorrichtung zur datenverarbeitung
ITRM20020281A1 (it) * 2002-05-20 2003-11-20 Micron Technology Inc Metodo ed apparecchiatura per accesso rapido di memorie.
US7133972B2 (en) 2002-06-07 2006-11-07 Micron Technology, Inc. Memory hub with internal cache and/or memory access prediction
US7200024B2 (en) 2002-08-02 2007-04-03 Micron Technology, Inc. System and method for optically interconnecting memory devices
US7117316B2 (en) 2002-08-05 2006-10-03 Micron Technology, Inc. Memory hub and access method having internal row caching
US7254331B2 (en) 2002-08-09 2007-08-07 Micron Technology, Inc. System and method for multiple bit optical data transmission in memory systems
US6754117B2 (en) 2002-08-16 2004-06-22 Micron Technology, Inc. System and method for self-testing and repair of memory modules
US7149874B2 (en) 2002-08-16 2006-12-12 Micron Technology, Inc. Memory hub bypass circuit and method
US7836252B2 (en) 2002-08-29 2010-11-16 Micron Technology, Inc. System and method for optimizing interconnections of memory devices in a multichip module
US6820181B2 (en) 2002-08-29 2004-11-16 Micron Technology, Inc. Method and system for controlling memory accesses to memory modules having a memory hub architecture
US7102907B2 (en) 2002-09-09 2006-09-05 Micron Technology, Inc. Wavelength division multiplexed memory module, memory system and method
AU2003271629A1 (en) * 2002-09-30 2004-04-19 Telefonaktiebolaget Lm Ericsson (Publ) Method and memory controller for scalable multi-channel memory access
US7990390B2 (en) 2002-10-22 2011-08-02 Broadcom Corporation Multi-pass system and method supporting multiple streams of video
US7395538B1 (en) * 2003-03-07 2008-07-01 Juniper Networks, Inc. Scalable packet processing systems and methods
US7360020B2 (en) * 2003-03-31 2008-04-15 Sun Microsystems, Inc. Method for improving cache-miss performance
US7245145B2 (en) 2003-06-11 2007-07-17 Micron Technology, Inc. Memory module and method having improved signal routing topology
US7120727B2 (en) 2003-06-19 2006-10-10 Micron Technology, Inc. Reconfigurable memory module and method
US7428644B2 (en) 2003-06-20 2008-09-23 Micron Technology, Inc. System and method for selective memory module power management
US7107415B2 (en) 2003-06-20 2006-09-12 Micron Technology, Inc. Posted write buffers and methods of posting write requests in memory modules
US7260685B2 (en) 2003-06-20 2007-08-21 Micron Technology, Inc. Memory hub and access method having internal prefetch buffers
US7389364B2 (en) 2003-07-22 2008-06-17 Micron Technology, Inc. Apparatus and method for direct memory access in a hub-based memory system
CN100343827C (zh) * 2003-07-28 2007-10-17 华为技术有限公司 基于二层的虚拟专用网业务介质访问控制地址收敛方法
US7210059B2 (en) 2003-08-19 2007-04-24 Micron Technology, Inc. System and method for on-board diagnostics of memory modules
US7133991B2 (en) 2003-08-20 2006-11-07 Micron Technology, Inc. Method and system for capturing and bypassing memory transactions in a hub-based memory system
US20050050237A1 (en) * 2003-08-28 2005-03-03 Jeddeloh Joseph M. Memory module and method having on-board data search capabilities and processor-based system using such memory modules
US7136958B2 (en) 2003-08-28 2006-11-14 Micron Technology, Inc. Multiple processor system and method including multiple memory hub modules
US7310752B2 (en) 2003-09-12 2007-12-18 Micron Technology, Inc. System and method for on-board timing margin testing of memory modules
US7194593B2 (en) 2003-09-18 2007-03-20 Micron Technology, Inc. Memory hub with integrated non-volatile memory
US7356648B2 (en) * 2003-10-02 2008-04-08 International Business Machines Corporation Shared buffer having hardware controlled buffer regions
TW200515147A (en) * 2003-10-17 2005-05-01 Matsushita Electric Ind Co Ltd Semiconductor memory device, controller, and read/write control method thereof
US7120743B2 (en) 2003-10-20 2006-10-10 Micron Technology, Inc. Arbitration system and method for memory responses in a hub-based memory system
US7216196B2 (en) 2003-12-29 2007-05-08 Micron Technology, Inc. Memory hub and method for memory system performance monitoring
US7330992B2 (en) 2003-12-29 2008-02-12 Micron Technology, Inc. System and method for read synchronization of memory modules
US7042792B2 (en) * 2004-01-14 2006-05-09 Integrated Device Technology, Inc. Multi-port memory cells for use in FIFO applications that support data transfers between cache and supplemental memory arrays
US7188219B2 (en) 2004-01-30 2007-03-06 Micron Technology, Inc. Buffer control system and method for a memory system having outstanding read and write request buffers
US7412574B2 (en) * 2004-02-05 2008-08-12 Micron Technology, Inc. System and method for arbitration of memory responses in a hub-based memory system
US7181584B2 (en) 2004-02-05 2007-02-20 Micron Technology, Inc. Dynamic command and/or address mirroring system and method for memory modules
US7788451B2 (en) 2004-02-05 2010-08-31 Micron Technology, Inc. Apparatus and method for data bypass for a bi-directional data bus in a hub-based memory sub-system
US7366864B2 (en) * 2004-03-08 2008-04-29 Micron Technology, Inc. Memory hub architecture having programmable lane widths
US7257683B2 (en) 2004-03-24 2007-08-14 Micron Technology, Inc. Memory arbitration system and method having an arbitration packet protocol
US7120723B2 (en) 2004-03-25 2006-10-10 Micron Technology, Inc. System and method for memory hub-based expansion bus
US7447240B2 (en) 2004-03-29 2008-11-04 Micron Technology, Inc. Method and system for synchronizing communications links in a hub-based memory system
US7213082B2 (en) 2004-03-29 2007-05-01 Micron Technology, Inc. Memory hub and method for providing memory sequencing hints
US6980042B2 (en) 2004-04-05 2005-12-27 Micron Technology, Inc. Delay line synchronizer apparatus and method
US7590797B2 (en) 2004-04-08 2009-09-15 Micron Technology, Inc. System and method for optimizing interconnections of components in a multichip memory module
US7120753B2 (en) * 2004-04-20 2006-10-10 International Business Machines Corporation System and method for dynamically adjusting read ahead values based upon memory usage
US7162567B2 (en) 2004-05-14 2007-01-09 Micron Technology, Inc. Memory hub and method for memory sequencing
US7222213B2 (en) 2004-05-17 2007-05-22 Micron Technology, Inc. System and method for communicating the synchronization status of memory modules during initialization of the memory modules
US7363419B2 (en) 2004-05-28 2008-04-22 Micron Technology, Inc. Method and system for terminating write commands in a hub-based memory system
JP4656862B2 (ja) * 2004-05-28 2011-03-23 ルネサスエレクトロニクス株式会社 半導体装置
US7310748B2 (en) 2004-06-04 2007-12-18 Micron Technology, Inc. Memory hub tester interface and method for use thereof
US7519788B2 (en) 2004-06-04 2009-04-14 Micron Technology, Inc. System and method for an asynchronous data buffer having buffer write and read pointers
US7339592B2 (en) * 2004-07-13 2008-03-04 Nvidia Corporation Simulating multiported memories using lower port count memories
US7392331B2 (en) 2004-08-31 2008-06-24 Micron Technology, Inc. System and method for transmitting data packets in a computer system having a memory hub architecture
JPWO2006051780A1 (ja) * 2004-11-10 2008-05-29 松下電器産業株式会社 不揮発性メモリ装置および不揮発性メモリ装置のアクセス方法
US7555682B2 (en) * 2005-05-13 2009-06-30 Texas Instruments Incorporated Distributed width trace receiver
US9298311B2 (en) 2005-06-23 2016-03-29 Apple Inc. Trackpad sensitivity compensation
US8032688B2 (en) * 2005-06-30 2011-10-04 Intel Corporation Micro-tile memory interfaces
WO2007057726A1 (en) * 2005-11-17 2007-05-24 Freescale Semiconductor, Inc. Multi-port high-level cache unit and a method for retrieving information from a multi-port high-level cache unit
JP5157207B2 (ja) 2007-03-16 2013-03-06 富士通セミコンダクター株式会社 半導体メモリ、メモリコントローラ、システムおよび半導体メモリの動作方法
US20100058016A1 (en) * 2008-08-26 2010-03-04 Jari Nikara Method, apparatus and software product for multi-channel memory sandbox
JP5752686B2 (ja) 2009-08-20 2015-07-22 ラムバス・インコーポレーテッド 原子メモリ装置
US8375173B2 (en) * 2009-10-09 2013-02-12 Qualcomm Incorporated Accessing a multi-channel memory system having non-uniform page sizes
US8631207B2 (en) * 2009-12-26 2014-01-14 Intel Corporation Cache memory power reduction techniques
TWI456579B (zh) * 2010-03-26 2014-10-11 Silicon Motion Inc 提昇錯誤更正能力之方法以及相關之記憶裝置及其控制器
JP5585171B2 (ja) * 2010-03-31 2014-09-10 富士通株式会社 ストレージ制御装置、ストレージシステム及びストレージ制御方法
US10838886B2 (en) * 2011-04-19 2020-11-17 Micron Technology, Inc. Channel depth adjustment in memory systems
US20130111149A1 (en) * 2011-10-26 2013-05-02 Arteris SAS Integrated circuits with cache-coherency
US9336129B2 (en) 2013-10-02 2016-05-10 Sandisk Technologies Inc. System and method for bank logical data remapping
CN107209718B (zh) * 2015-03-11 2021-11-19 拉姆伯斯公司 高性能非易失性存储器模块
US20210015708A1 (en) * 2018-03-28 2021-01-21 Cmc-Pharma Co., Ltd Two-component-mixing prefilled syringe kit
US11086526B2 (en) * 2018-06-07 2021-08-10 Micron Technology, Inc. Adaptive line width cache systems and methods
CN111428973B (zh) * 2020-03-11 2024-04-12 慧镕电子系统工程股份有限公司 一种能有效提高资源利用率的虚拟资源分配方法

Family Cites Families (112)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3740723A (en) * 1970-12-28 1973-06-19 Ibm Integral hierarchical binary storage element
US3898632A (en) * 1974-07-15 1975-08-05 Sperry Rand Corp Semiconductor block-oriented read/write memory
US4298929A (en) * 1979-01-26 1981-11-03 International Business Machines Corporation Integrated multilevel storage hierarchy for a data processing system with improved channel to memory write capability
US4354225A (en) * 1979-10-11 1982-10-12 Nanodata Computer Corporation Intelligent main store for data processing systems
US4330852A (en) * 1979-11-23 1982-05-18 Texas Instruments Incorporated Semiconductor read/write memory array having serial access
JPS5720983A (en) * 1980-07-15 1982-02-03 Hitachi Ltd Memory chip
CA1187198A (en) * 1981-06-15 1985-05-14 Takashi Chiba System for controlling access to channel buffers
US4608668A (en) * 1981-09-03 1986-08-26 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor device
US4541075A (en) * 1982-06-30 1985-09-10 International Business Machines Corporation Random access memory having a second input/output port
US4491915A (en) * 1982-11-30 1985-01-01 Rca Corporation Multiprocessor-memory data transfer network
JPS59180871A (ja) * 1983-03-31 1984-10-15 Fujitsu Ltd 半導体メモリ装置
JPH069114B2 (ja) * 1983-06-24 1994-02-02 株式会社東芝 半導体メモリ
JPS6050297A (ja) * 1983-08-30 1985-03-19 Matsushita Seiko Co Ltd 扇風機
US4646270A (en) * 1983-09-15 1987-02-24 Motorola, Inc. Video graphic dynamic RAM
US4663735A (en) * 1983-12-30 1987-05-05 Texas Instruments Incorporated Random/serial access mode selection circuit for a video memory system
JPH0760422B2 (ja) * 1983-12-30 1995-06-28 株式会社日立製作所 記憶ロツク方式
US4577293A (en) * 1984-06-01 1986-03-18 International Business Machines Corporation Distributed, on-chip cache
JPS60258792A (ja) * 1984-06-04 1985-12-20 Toshiba Corp ダイナミツクｒａｍ
US4794559A (en) * 1984-07-05 1988-12-27 American Telephone And Telegraph Company, At&T Bell Laboratories Content addressable semiconductor memory arrays
DE3582376D1 (de) * 1984-08-03 1991-05-08 Toshiba Kawasaki Kk Halbleiterspeicheranordnung.
US4725945A (en) * 1984-09-18 1988-02-16 International Business Machines Corp. Distributed cache in dynamic rams
JPH0793009B2 (ja) * 1984-12-13 1995-10-09 株式会社東芝 半導体記憶装置
DE3543911A1 (de) * 1984-12-14 1986-06-26 Mitsubishi Denki K.K., Tokio/Tokyo Digitale verzoegerungseinheit
JPS61160898A (ja) * 1985-01-05 1986-07-21 Fujitsu Ltd 半導体記憶装置
JPH0652632B2 (ja) * 1985-01-23 1994-07-06 株式会社日立製作所 ダイナミツク型ｒａｍ
US4731758A (en) * 1985-06-21 1988-03-15 Advanced Micro Devices, Inc. Dual array memory with inter-array bi-directional data transfer
JPS6238590A (ja) * 1985-08-13 1987-02-19 Fujitsu Ltd 半導体記憶装置
US4837746A (en) * 1985-12-04 1989-06-06 Advanced Micro Devices, Inc. Method and apparatus for resetting a video SRAM
JPH07114074B2 (ja) * 1985-12-18 1995-12-06 株式会社日立製作所 半導体記憶装置
JPH0642313B2 (ja) * 1985-12-20 1994-06-01 日本電気株式会社 半導体メモリ
US4829471A (en) * 1986-02-07 1989-05-09 Advanced Micro Devices, Inc. Data load sequencer for multiple data line serializer
JPH07111822B2 (ja) * 1986-03-07 1995-11-29 株式会社日立製作所 半導体記憶装置
US4719601A (en) * 1986-05-02 1988-01-12 International Business Machine Corporation Column redundancy for two port random access memory
JPH0740430B2 (ja) * 1986-07-04 1995-05-01 日本電気株式会社 メモリ装置
JPS6381692A (ja) * 1986-09-26 1988-04-12 Hitachi Ltd 半導体記憶装置
JPS63136391A (ja) * 1986-11-27 1988-06-08 Nec Corp 半導体メモリ装置
US4894770A (en) * 1987-06-01 1990-01-16 Massachusetts Institute Of Technology Set associative memory
AU2022188A (en) * 1987-07-30 1989-02-02 Alliant Computer Systems Corporation Parallel processing computer in which memory access priorities are varied
JP2714944B2 (ja) * 1987-08-05 1998-02-16 三菱電機株式会社 半導体記憶装置
US5179687A (en) * 1987-09-26 1993-01-12 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device containing a cache and an operation method thereof
JPH01159891A (ja) * 1987-12-17 1989-06-22 Mitsubishi Electric Corp 半導体記憶装置
US5226147A (en) * 1987-11-06 1993-07-06 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device for simple cache system
US4943944A (en) * 1987-11-25 1990-07-24 Kabushiki Kaisha Toshiba Semiconductor memory using dynamic ram cells
JPH01146187A (ja) * 1987-12-02 1989-06-08 Mitsubishi Electric Corp キヤッシュメモリ内蔵半導体記憶装置
JPH0748301B2 (ja) * 1987-12-04 1995-05-24 富士通株式会社 半導体記憶装置
US5214769A (en) * 1987-12-24 1993-05-25 Fujitsu Limited Multiprocessor control system
JPH0760595B2 (ja) * 1988-01-12 1995-06-28 日本電気株式会社 半導体メモリ
US5025366A (en) * 1988-01-20 1991-06-18 Advanced Micro Devices, Inc. Organization of an integrated cache unit for flexible usage in cache system design
US5184320A (en) * 1988-02-12 1993-02-02 Texas Instruments Incorporated Cached random access memory device and system
US5202968A (en) * 1988-03-30 1993-04-13 Kabushiki Kaisha Toshiba Expansion system
US5329489A (en) * 1988-03-31 1994-07-12 Texas Instruments Incorporated DRAM having exclusively enabled column buffer blocks
US4870622A (en) * 1988-06-24 1989-09-26 Advanced Micro Devices, Inc. DRAM controller cache
JPH0713857B2 (ja) * 1988-06-27 1995-02-15 三菱電機株式会社 半導体記憶装置
US5481496A (en) * 1988-06-27 1996-01-02 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device and method of data transfer therefor
JP2776841B2 (ja) * 1988-09-28 1998-07-16 株式会社日立製作所 ディスク制御装置におけるディスクアクセス制御方法
US4928246A (en) * 1988-10-21 1990-05-22 Iowa State University Research Foundation, Inc. Multiple channel data acquisition system
US5535359A (en) * 1988-12-02 1996-07-09 Mitsubishi Denki Kabushiki Kaisha Computer system with cache memory having address mask register
CN1016743B (zh) * 1988-12-03 1992-05-20 国际商业机器公司 虚拟存储器管理系统和方法
US4965717A (en) * 1988-12-09 1990-10-23 Tandem Computers Incorporated Multiple processor system having shared memory with private-write capability
US5202972A (en) * 1988-12-29 1993-04-13 International Business Machines Corporation Store buffer apparatus in a multiprocessor system
KR910009555B1 (ko) * 1989-01-09 1991-11-21 조경연 싱글 포트 듀얼 ram(spdram)
FR2642195B1 (fr) * 1989-01-20 1991-04-26 Centre Nat Rech Scient Dispositif et procede d'arbitrage des requetes et de resolution des conflits lies a l'acces aux memoires a bancs independants pour les machines informatiques
US5148396A (en) * 1989-02-27 1992-09-15 Nec Corporation Semiconductor integrated circuit memory enabling memory write masking
US4989180A (en) * 1989-03-10 1991-01-29 Board Of Regents, The University Of Texas System Dynamic memory with logic-in-refresh
US5060144A (en) * 1989-03-16 1991-10-22 Unisys Corporation Locking control with validity status indication for a multi-host processor system that utilizes a record lock processor and a cache memory for each host processor
US5193166A (en) * 1989-04-21 1993-03-09 Bell-Northern Research Ltd. Cache-memory architecture comprising a single address tag for each cache memory
CA2011518C (en) * 1989-04-25 1993-04-20 Ronald N. Fortino Distributed cache dram chip and control method
US5130922A (en) * 1989-05-17 1992-07-14 International Business Machines Corporation Multiprocessor cache memory system using temporary access states and method for operating such a memory
US5287484A (en) * 1989-06-21 1994-02-15 Hitachi, Ltd. Multi-processor system for invalidating hierarchical cache
JPH0350297A (ja) 1989-07-18 1991-03-04 Asahi Glass Co Ltd テトラフルオロエタン系冷凍機用組成物
US5214610A (en) * 1989-09-22 1993-05-25 Texas Instruments Incorporated Memory with selective address transition detection for cache operation
US4984214A (en) * 1989-12-05 1991-01-08 International Business Machines Corporation Multiplexed serial register architecture for VRAM
JP2777247B2 (ja) * 1990-01-16 1998-07-16 三菱電機株式会社 半導体記憶装置およびキャッシュシステム
JP2880547B2 (ja) * 1990-01-19 1999-04-12 三菱電機株式会社 半導体記憶装置
US5134616A (en) * 1990-02-13 1992-07-28 International Business Machines Corporation Dynamic ram with on-chip ecc and optimized bit and word redundancy
US5388243A (en) * 1990-03-09 1995-02-07 Mti Technology Corporation Multi-sort mass storage device announcing its active paths without deactivating its ports in a network architecture
JP2938511B2 (ja) * 1990-03-30 1999-08-23 三菱電機株式会社 半導体記憶装置
JP2862948B2 (ja) * 1990-04-13 1999-03-03 三菱電機株式会社 半導体記憶装置
US5289413A (en) * 1990-06-08 1994-02-22 Kabushiki Kaisha Toshiba Dynamic semiconductor memory device with high-speed serial-accessing column decoder
US5202973A (en) * 1990-06-29 1993-04-13 Digital Equipment Corporation Method of controlling a shared memory bus in a multiprocessor system for preventing bus collisions and for ensuring a full bus
US5359722A (en) * 1990-07-23 1994-10-25 International Business Machines Corporation Method for shortening memory fetch time relative to memory store time and controlling recovery in a DRAM
DE59009886D1 (de) * 1990-09-27 1995-12-21 Siemens Nixdorf Inf Syst Multiprozessorsystem mit gemeinsamem Speicher.
US5249282A (en) * 1990-11-21 1993-09-28 Benchmarq Microelectronics, Inc. Integrated cache memory system with primary and secondary cache memories
US5265235A (en) * 1990-11-30 1993-11-23 Xerox Corporation Consistency protocols for shared memory multiprocessors
EP0811979B1 (en) * 1990-12-25 2004-02-11 Mitsubishi Denki Kabushiki Kaisha A semiconductor memory device
JP2715004B2 (ja) * 1991-01-07 1998-02-16 三菱電機株式会社 半導体メモリ装置
US5594885A (en) * 1991-03-05 1997-01-14 Zitel Corporation Method for operating a cache memory system using a recycled register for identifying a reuse status of a corresponding cache entry
JPH04307495A (ja) * 1991-04-04 1992-10-29 Mitsubishi Electric Corp 半導体記憶装置
US5652723A (en) * 1991-04-18 1997-07-29 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device
US5349583A (en) * 1991-08-16 1994-09-20 International Business Machines Corporation Multi-channel token ring
AU2476192A (en) * 1991-08-16 1993-03-16 Multichip Technology High-performance dynamic memory system
CA2079690A1 (en) * 1991-10-03 1993-04-04 Frank M. Wanlass Architecture and method for combining static cache memory and dynamic main memory on the same chip (cdram)
JP3451099B2 (ja) * 1991-12-06 2003-09-29 株式会社日立製作所 外部記憶サブシステム
US5291444A (en) * 1991-12-23 1994-03-01 Texas Instruments Incorporated Combination DRAM and SRAM memory array
US5388237A (en) * 1991-12-30 1995-02-07 Sun Microsystems, Inc. Method of and apparatus for interleaving multiple-channel DMA operations
EP0552667B1 (en) 1992-01-22 1999-04-21 Enhanced Memory Systems, Inc. Enhanced dram with embedded registers
DE4391002T1 (de) 1992-03-06 1995-02-23 Rambus Inc Vor-heranholen in einen Cache-Speicher zum minimieren der Hauptspeicherzugriffszeit und der Cache-Speichergröße in einen Computersystem
US5390308A (en) * 1992-04-15 1995-02-14 Rambus, Inc. Method and apparatus for address mapping of dynamic random access memory
US5471601A (en) * 1992-06-17 1995-11-28 Intel Corporation Memory device and method for avoiding live lock of a DRAM with cache
JPH06103213A (ja) * 1992-09-18 1994-04-15 Hitachi Ltd 入出力装置
US5502828A (en) * 1992-12-18 1996-03-26 Advanced Micro Devices, Inc. Reducing memory access in a multi-cache multiprocessing environment with each cache mapped into different areas of main memory to avoid contention
US5649162A (en) * 1993-05-24 1997-07-15 Micron Electronics, Inc. Local bus interface
JP2894170B2 (ja) * 1993-08-18 1999-05-24 日本電気株式会社 メモリ装置
US5381370A (en) * 1993-08-24 1995-01-10 Cypress Semiconductor Corporation Memory with minimized redundancy access delay
US5619673A (en) * 1994-06-29 1997-04-08 Intel Corporation Virtual access cache protection bits handling method and apparatus
US5652724A (en) * 1994-12-23 1997-07-29 Micron Technology, Inc. Burst EDO memory device having pipelined output buffer
CN1077700C (zh) * 1995-02-17 2002-01-09 曼特亚克公司 可编程调控交插存取存储器管理系统
US5878240A (en) * 1995-05-11 1999-03-02 Lucent Technologies, Inc. System and method for providing high speed memory access in a multiprocessor, multimemory environment
US5875462A (en) * 1995-12-28 1999-02-23 Unisys Corporation Multi-processor data processing system with multiple second level caches mapable to all of addressable memory
US5895481A (en) * 1996-05-22 1999-04-20 Cypress Semiconductor Corp. Programmable VESA unified memory architecture (VUMA) row address strobe (RAS)
JP3142777B2 (ja) 1996-05-22 2001-03-07 帝人株式会社 芳香族ポリアミド剛毛
US6167486A (en) * 1996-11-18 2000-12-26 Nec Electronics, Inc. Parallel access virtual channel memory system with cacheable channels

Also Published As

Publication number Publication date
CN1184971A (zh) 1998-06-17
US6477621B1 (en) 2002-11-05
EP0843261A2 (en) 1998-05-20
US6327642B1 (en) 2001-12-04
US6167486A (en) 2000-12-26
EP0843261A3 (en) 2000-02-23
JPH10326225A (ja) 1998-12-08
CN1081360C (zh) 2002-03-20
TW384426B (en) 2000-03-11
KR100268321B1 (ko) 2000-10-16
KR19980042530A (ko) 1998-08-17

Similar Documents

Publication Publication Date Title
SG55416A1 (en) Virtual channel memory system
GB9614551D0 (en) Memory system
GB2313246B (en) Channel selecting system
PL334610A1 (en) Car-park mangaging system
GB9612777D0 (en) Storage system
EP0872847A4 (en) STORAGE
GB2313678B (en) Electronically-interlocked parallel-multiplexed control system
GB2319937B (en) Multi-integrated agent system
GB9621095D0 (en) Novel system
AU2513797A (en) Fifo memory system
GB2318148B (en) Partitioning system
GB9607900D0 (en) Control system
GB9626572D0 (en) Control system
GB2319953B (en) Storage system
GB2318812B (en) Partitioning system
GB9604908D0 (en) Storage system
GB9711521D0 (en) Channel allocation system
GB9411274D0 (en) Memory system
GB9614603D0 (en) Memory system
PL321036A1 (en) Gate system
DE69701493D1 (en) Photographisches system
GB9600017D0 (en) Access system
HU9601828D0 (en) Alarm-reporting system
GB9602526D0 (en) Flowguard system
GB9610446D0 (en) Brick-refacing system