GB9411274D0 - Memory system - Google Patents
Memory systemInfo
- Publication number
- GB9411274D0 GB9411274D0 GB9411274A GB9411274A GB9411274D0 GB 9411274 D0 GB9411274 D0 GB 9411274D0 GB 9411274 A GB9411274 A GB 9411274A GB 9411274 A GB9411274 A GB 9411274A GB 9411274 D0 GB9411274 D0 GB 9411274D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- memory system
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9411274A GB9411274D0 (en) | 1994-06-04 | 1994-06-04 | Memory system |
PCT/GB1995/001296 WO1996039662A1 (en) | 1994-06-04 | 1995-06-06 | Memory system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9411274A GB9411274D0 (en) | 1994-06-04 | 1994-06-04 | Memory system |
Publications (1)
Publication Number | Publication Date |
---|---|
GB9411274D0 true GB9411274D0 (en) | 1994-07-27 |
Family
ID=10756246
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9411274A Pending GB9411274D0 (en) | 1994-06-04 | 1994-06-04 | Memory system |
Country Status (2)
Country | Link |
---|---|
GB (1) | GB9411274D0 (en) |
WO (1) | WO1996039662A1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2324176B (en) * | 1996-11-19 | 2002-07-31 | United Microelectronics Corp | Method of compensating for defective memory associated with a decoder |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4937790A (en) * | 1987-08-31 | 1990-06-26 | Hitachi, Ltd. | Semiconductor memory device |
US5208782A (en) * | 1989-02-09 | 1993-05-04 | Hitachi, Ltd. | Semiconductor integrated circuit device having a plurality of memory blocks and a lead on chip (LOC) arrangement |
-
1994
- 1994-06-04 GB GB9411274A patent/GB9411274D0/en active Pending
-
1995
- 1995-06-06 WO PCT/GB1995/001296 patent/WO1996039662A1/en active Application Filing
Also Published As
Publication number | Publication date |
---|---|
WO1996039662A1 (en) | 1996-12-12 |
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