JPS5720983A - Memory chip - Google Patents

Memory chip

Info

Publication number
JPS5720983A
JPS5720983A JP9574380A JP9574380A JPS5720983A JP S5720983 A JPS5720983 A JP S5720983A JP 9574380 A JP9574380 A JP 9574380A JP 9574380 A JP9574380 A JP 9574380A JP S5720983 A JPS5720983 A JP S5720983A
Authority
JP
Japan
Prior art keywords
memory
information
array
address
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9574380A
Other languages
Japanese (ja)
Other versions
JPH0146946B2 (en
Inventor
Yoshito Mimura
Norihiko Sugimoto
Michihiro Ikeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP9574380A priority Critical patent/JPS5720983A/en
Publication of JPS5720983A publication Critical patent/JPS5720983A/en
Publication of JPH0146946B2 publication Critical patent/JPH0146946B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Static Random-Access Memory (AREA)
  • Bus Control (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To transfer information in a memory rapidly by simple constitution without fetching it to the outside, by transferring the information in the memory through an internal port and a latch circuit. CONSTITUTION:An address is applied to a memory cell array 6 through a direct memory access controller, and the gate of an internal port 8 is controlled according to a readout command. Then, information read out from a prescribed address of the array 6 is latched in a latch circuit 7. Further, similar addressing and control over the gate 10 corresponding to a write instruction writes the latch information in the circuit 7 into the specified address of the array 6, and it is transferred in the cell 6 on a direct access basis without being fetched out.
JP9574380A 1980-07-15 1980-07-15 Memory chip Granted JPS5720983A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9574380A JPS5720983A (en) 1980-07-15 1980-07-15 Memory chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9574380A JPS5720983A (en) 1980-07-15 1980-07-15 Memory chip

Publications (2)

Publication Number Publication Date
JPS5720983A true JPS5720983A (en) 1982-02-03
JPH0146946B2 JPH0146946B2 (en) 1989-10-11

Family

ID=14145965

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9574380A Granted JPS5720983A (en) 1980-07-15 1980-07-15 Memory chip

Country Status (1)

Country Link
JP (1) JPS5720983A (en)

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62242252A (en) * 1986-04-14 1987-10-22 Mitsubishi Electric Corp Data transfer method in semiconductor memory device
US6016280A (en) * 1997-09-16 2000-01-18 Nec Corporation Semiconductor integrated circuit device
US6101146A (en) * 1997-09-16 2000-08-08 Nec Corporation Semiconductor integrated circuit device
US6151256A (en) * 1997-09-16 2000-11-21 Nec Corporation Semiconductor integrated circuit device
US6167486A (en) * 1996-11-18 2000-12-26 Nec Electronics, Inc. Parallel access virtual channel memory system with cacheable channels
US6324104B1 (en) 1999-03-10 2001-11-27 Nec Corporation Semiconductor integrated circuit device
US6335873B1 (en) 1999-03-15 2002-01-01 Nec Corporation Semiconductor integrated circuit device
US6339817B1 (en) 1997-09-16 2002-01-15 Nec Corporation Semiconductor memory including main and sub memory portions having plural memory cell groups and a bidirectional data transfer circuit
US6343046B1 (en) 1999-03-15 2002-01-29 Nec Corporation Semiconductor integrated circuit device
US6377501B2 (en) 1997-09-16 2002-04-23 Nec Corporation Semiconductor integrated circuit device
US6473828B1 (en) 1998-07-03 2002-10-29 Nec Corporation Virtual channel synchronous dynamic random access memory
US6708254B2 (en) 1999-11-10 2004-03-16 Nec Electronics America, Inc. Parallel access virtual channel memory system
CN103019983A (en) * 2012-11-23 2013-04-03 北京宏思电子技术有限责任公司 USB interface control module and data transmission control method of USB equipment

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5371537A (en) * 1976-12-08 1978-06-26 Hitachi Ltd Information processor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5371537A (en) * 1976-12-08 1978-06-26 Hitachi Ltd Information processor

Cited By (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62242252A (en) * 1986-04-14 1987-10-22 Mitsubishi Electric Corp Data transfer method in semiconductor memory device
US6327642B1 (en) 1996-11-18 2001-12-04 Nec Electronics, Inc. Parallel access virtual channel memory system
US6167486A (en) * 1996-11-18 2000-12-26 Nec Electronics, Inc. Parallel access virtual channel memory system with cacheable channels
US6477621B1 (en) 1996-11-18 2002-11-05 Nec Electronics, Inc. Parallel access virtual channel memory system
US6252788B1 (en) 1997-09-16 2001-06-26 Nec Corporation Semiconductor integrated circuit device
US6339817B1 (en) 1997-09-16 2002-01-15 Nec Corporation Semiconductor memory including main and sub memory portions having plural memory cell groups and a bidirectional data transfer circuit
US6101146A (en) * 1997-09-16 2000-08-08 Nec Corporation Semiconductor integrated circuit device
US6735144B2 (en) 1997-09-16 2004-05-11 Nec Corporation Semiconductor integrated circuit device
US6016280A (en) * 1997-09-16 2000-01-18 Nec Corporation Semiconductor integrated circuit device
US6243279B1 (en) 1997-09-16 2001-06-05 Nec Corporation Semiconductor integrated circuit device
US6151256A (en) * 1997-09-16 2000-11-21 Nec Corporation Semiconductor integrated circuit device
US6377501B2 (en) 1997-09-16 2002-04-23 Nec Corporation Semiconductor integrated circuit device
US6473828B1 (en) 1998-07-03 2002-10-29 Nec Corporation Virtual channel synchronous dynamic random access memory
US6324104B1 (en) 1999-03-10 2001-11-27 Nec Corporation Semiconductor integrated circuit device
US6343046B1 (en) 1999-03-15 2002-01-29 Nec Corporation Semiconductor integrated circuit device
US6690615B2 (en) 1999-03-15 2004-02-10 Nec Electronics Corporation Semiconductor integrated circuit device
US6335873B1 (en) 1999-03-15 2002-01-01 Nec Corporation Semiconductor integrated circuit device
US6708254B2 (en) 1999-11-10 2004-03-16 Nec Electronics America, Inc. Parallel access virtual channel memory system
CN103019983A (en) * 2012-11-23 2013-04-03 北京宏思电子技术有限责任公司 USB interface control module and data transmission control method of USB equipment

Also Published As

Publication number Publication date
JPH0146946B2 (en) 1989-10-11

Similar Documents

Publication Publication Date Title
US6798710B2 (en) Synchronous flash memory with virtual segment architecture
JPS5725069A (en) Vector data processing equipment
JPS5720983A (en) Memory chip
JPS54129942A (en) Direct transfer system between sub-systems
HK1005492A1 (en) Data transfers method for a semiconductor memory and semiconductor memory to perform such a method
JPS6432491A (en) Semiconductor storage device
JPS56157520A (en) Dma system without cycle steal
JPS57195374A (en) Sequential access storage device
JPS57109055A (en) Readout control system for microinstruction
JPS55154623A (en) Input and output control system
JPS6486395A (en) Storage device
JPS56100586A (en) Ipl system in decentralized processing electronic exchanger
JPS54124644A (en) Data transfer system
JPS57207942A (en) Unpacking circuit
JPS6452284A (en) Memory chip
JPS57182865A (en) Microprocessor
JPS578980A (en) Memory device
JPS5578324A (en) Direct memory access system
JPS56164454A (en) Information processing device
JPS57176471A (en) Information processing system
FR2337917A1 (en) Direct access semiconductor memory - has input and output registers and column and row address registers (SW 4.7.77)
JPS55112661A (en) Memory control unit
JPS5734264A (en) Multiprocessor
JPS5362939A (en) Common information control system
JPS57176464A (en) Data transfer system