DE4391002T1 - Vor-heranholen in einen Cache-Speicher zum minimieren der Hauptspeicherzugriffszeit und der Cache-Speichergröße in einen Computersystem - Google Patents

Vor-heranholen in einen Cache-Speicher zum minimieren der Hauptspeicherzugriffszeit und der Cache-Speichergröße in einen Computersystem

Info

Publication number
DE4391002T1
DE4391002T1 DE4391002T DE4391002T DE4391002T1 DE 4391002 T1 DE4391002 T1 DE 4391002T1 DE 4391002 T DE4391002 T DE 4391002T DE 4391002 T DE4391002 T DE 4391002T DE 4391002 T1 DE4391002 T1 DE 4391002T1
Authority
DE
Germany
Prior art keywords
cache
fetch
computer system
memory access
access time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE4391002T
Other languages
English (en)
Inventor
Karnamadakala Krishnamohan
Paul Michael Farmwald
Frederick Abbott Ware
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rambus Inc
Original Assignee
Rambus Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rambus Inc filed Critical Rambus Inc
Publication of DE4391002T1 publication Critical patent/DE4391002T1/de
Ceased legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802Instruction prefetching
    • G06F9/3814Implementation provisions of instruction buffers, e.g. prefetch buffer; banks
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802Instruction prefetching
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60Details of cache memory
    • G06F2212/6022Using a prefetch buffer or dedicated prefetch cache
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60Details of cache memory
    • G06F2212/6026Prefetching based on access pattern detection, e.g. stride based prefetch
DE4391002T 1992-03-06 1993-03-03 Vor-heranholen in einen Cache-Speicher zum minimieren der Hauptspeicherzugriffszeit und der Cache-Speichergröße in einen Computersystem Ceased DE4391002T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US84730092A 1992-03-06 1992-03-06
PCT/US1993/001814 WO1993018459A1 (en) 1992-03-06 1993-03-03 Prefetching into a cache to minimize main memory access time and cache size in a computer system

Publications (1)

Publication Number Publication Date
DE4391002T1 true DE4391002T1 (de) 1995-02-23

Family

ID=25300300

Family Applications (1)

Application Number Title Priority Date Filing Date
DE4391002T Ceased DE4391002T1 (de) 1992-03-06 1993-03-03 Vor-heranholen in einen Cache-Speicher zum minimieren der Hauptspeicherzugriffszeit und der Cache-Speichergröße in einen Computersystem

Country Status (4)

Country Link
US (1) US5499355A (de)
JP (1) JPH07506921A (de)
DE (1) DE4391002T1 (de)
WO (1) WO1993018459A1 (de)

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Also Published As

Publication number Publication date
US5499355A (en) 1996-03-12
JPH07506921A (ja) 1995-07-27
WO1993018459A1 (en) 1993-09-16

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