KR930018611U - 메인 메모리 및 캐시 메모리 회로 - Google Patents

메인 메모리 및 캐시 메모리 회로

Info

Publication number
KR930018611U
KR930018611U KR2019920000640U KR920000640U KR930018611U KR 930018611 U KR930018611 U KR 930018611U KR 2019920000640 U KR2019920000640 U KR 2019920000640U KR 920000640 U KR920000640 U KR 920000640U KR 930018611 U KR930018611 U KR 930018611U
Authority
KR
South Korea
Prior art keywords
memory
circuit
cache
main memory
main
Prior art date
Application number
KR2019920000640U
Other languages
English (en)
Other versions
KR940004260Y1 (ko
Inventor
김경태
Original Assignee
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자 주식회사 filed Critical 삼성전자 주식회사
Priority to KR92000640U priority Critical patent/KR940004260Y1/ko
Publication of KR930018611U publication Critical patent/KR930018611U/ko
Application granted granted Critical
Publication of KR940004260Y1 publication Critical patent/KR940004260Y1/ko

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0877—Cache access modes
    • G06F12/0879—Burst mode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0877—Cache access modes
    • G06F12/0884—Parallel mode, e.g. in parallel with main memory or CPU
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0893—Caches characterised by their organisation or structure

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
KR92000640U 1992-01-17 1992-01-17 메인 메모리 및 캐시 메모리 회로 KR940004260Y1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR92000640U KR940004260Y1 (ko) 1992-01-17 1992-01-17 메인 메모리 및 캐시 메모리 회로

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR92000640U KR940004260Y1 (ko) 1992-01-17 1992-01-17 메인 메모리 및 캐시 메모리 회로

Publications (2)

Publication Number Publication Date
KR930018611U true KR930018611U (ko) 1993-08-21
KR940004260Y1 KR940004260Y1 (ko) 1994-06-25

Family

ID=19328026

Family Applications (1)

Application Number Title Priority Date Filing Date
KR92000640U KR940004260Y1 (ko) 1992-01-17 1992-01-17 메인 메모리 및 캐시 메모리 회로

Country Status (1)

Country Link
KR (1) KR940004260Y1 (ko)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100377625B1 (ko) * 2001-01-09 2003-03-26 엘지이노텍 주식회사 데이타 처리를 위한 양방향 래치회로
KR100423768B1 (ko) * 2000-02-16 2004-03-24 닛뽄덴끼 가부시끼가이샤 반도체 메모리 장치

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100423768B1 (ko) * 2000-02-16 2004-03-24 닛뽄덴끼 가부시끼가이샤 반도체 메모리 장치
KR100377625B1 (ko) * 2001-01-09 2003-03-26 엘지이노텍 주식회사 데이타 처리를 위한 양방향 래치회로

Also Published As

Publication number Publication date
KR940004260Y1 (ko) 1994-06-25

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