SG11201404871TA - Memory cell comprising first and second transistors and methods of operating - Google Patents
Memory cell comprising first and second transistors and methods of operatingInfo
- Publication number
- SG11201404871TA SG11201404871TA SG11201404871TA SG11201404871TA SG11201404871TA SG 11201404871T A SG11201404871T A SG 11201404871TA SG 11201404871T A SG11201404871T A SG 11201404871TA SG 11201404871T A SG11201404871T A SG 11201404871TA SG 11201404871T A SG11201404871T A SG 11201404871TA
- Authority
- SG
- Singapore
- Prior art keywords
- transistors
- operating
- methods
- memory cell
- cell
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/02—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding parasitic signals
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B99/00—Subject matter not provided for in other groups of this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/20—DRAM devices comprising floating-body transistors, e.g. floating-body cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
- G11C16/0433—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
- G11C16/3427—Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0804—Emitter regions of bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0821—Collector regions of bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/36—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/7302—Bipolar junction transistors structurally associated with other devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7841—Field effect transistors with field effect produced by an insulated gate with floating body, e.g. programmable transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/10—DRAM devices comprising bipolar components
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
- H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
- H10B41/41—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region of a memory region comprising a cell select transistor, e.g. NAND
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C2211/4016—Memory devices with silicon-on-insulator cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1004—Base region of bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/732—Vertical transistors
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Semiconductor Memories (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201261599425P | 2012-02-16 | 2012-02-16 | |
US201261621546P | 2012-04-08 | 2012-04-08 | |
US13/746,523 US9230651B2 (en) | 2012-04-08 | 2013-01-22 | Memory device having electrically floating body transitor |
PCT/US2013/026466 WO2013123415A1 (en) | 2012-02-16 | 2013-02-15 | Memory cell comprising first and second transistors and methods of operating |
Publications (1)
Publication Number | Publication Date |
---|---|
SG11201404871TA true SG11201404871TA (en) | 2014-09-26 |
Family
ID=50345157
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG11201404871TA SG11201404871TA (en) | 2012-02-16 | 2013-02-15 | Memory cell comprising first and second transistors and methods of operating |
Country Status (8)
Country | Link |
---|---|
US (1) | US11974425B2 (ko) |
EP (1) | EP2815402B1 (ko) |
JP (2) | JP6362542B2 (ko) |
KR (1) | KR102059884B1 (ko) |
CN (2) | CN104471648B (ko) |
SG (1) | SG11201404871TA (ko) |
TW (7) | TWI639223B (ko) |
WO (1) | WO2013123415A1 (ko) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9208880B2 (en) | 2013-01-14 | 2015-12-08 | Zeno Semiconductor, Inc. | Content addressable memory device having electrically floating body transistor |
US9275723B2 (en) | 2013-04-10 | 2016-03-01 | Zeno Semiconductor, Inc. | Scalable floating body memory cell for memory compilers and method of using floating body memories with memory compilers |
US9368625B2 (en) | 2013-05-01 | 2016-06-14 | Zeno Semiconductor, Inc. | NAND string utilizing floating body memory cell |
US10079301B2 (en) | 2016-11-01 | 2018-09-18 | Zeno Semiconductor, Inc. | Memory device comprising an electrically floating body transistor and methods of using |
US11404419B2 (en) | 2018-04-18 | 2022-08-02 | Zeno Semiconductor, Inc. | Memory device comprising an electrically floating body transistor |
IT201800004982A1 (it) * | 2018-05-02 | 2019-11-02 | Francesco Vilardo | DRAM memory one bit all in one united in a single device |
US11600663B2 (en) | 2019-01-11 | 2023-03-07 | Zeno Semiconductor, Inc. | Memory cell and memory array select transistor |
US11443819B2 (en) | 2020-07-24 | 2022-09-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Memory device, integrated circuit device and method |
WO2023162036A1 (ja) * | 2022-02-22 | 2023-08-31 | ユニサンティス エレクトロニクス シンガポール プライベート リミテッド | 半導体メモリ装置 |
WO2023170755A1 (ja) * | 2022-03-07 | 2023-09-14 | ユニサンティス エレクトロニクス シンガポール プライベート リミテッド | 半導体素子を用いたメモリ装置 |
Family Cites Families (139)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4300212A (en) | 1979-01-24 | 1981-11-10 | Xicor, Inc. | Nonvolatile static random access memory devices |
JP2685770B2 (ja) | 1987-12-28 | 1997-12-03 | 株式会社東芝 | 不揮発性半導体記憶装置 |
US6232822B1 (en) | 1988-01-08 | 2001-05-15 | Kabushiki Kaisha Toshiba | Semiconductor device including a bipolar transistor biased to produce a negative base current by the impact ionization mechanism |
JPH021158A (ja) * | 1988-01-29 | 1990-01-05 | Toshiba Corp | 半導体装置 |
US5844842A (en) | 1989-02-06 | 1998-12-01 | Hitachi, Ltd. | Nonvolatile semiconductor memory device |
JP2829088B2 (ja) * | 1990-03-30 | 1998-11-25 | 株式会社東芝 | 半導体記憶装置 |
GB2256735B (en) | 1991-06-12 | 1995-06-21 | Intel Corp | Non-volatile disk cache |
US5359573A (en) * | 1992-06-19 | 1994-10-25 | Lattice Semiconductor Corporation | Flash E2 PROM array with mingle polysilicon layer memory cell |
KR970000870B1 (ko) * | 1992-12-02 | 1997-01-20 | 마쯔시다덴기산교 가부시기가이샤 | 반도체메모리장치 |
JP3191549B2 (ja) * | 1994-02-15 | 2001-07-23 | 松下電器産業株式会社 | 半導体メモリ装置 |
KR100477034B1 (ko) | 1995-01-31 | 2005-03-21 | 가부시끼가이샤 히다치 세이사꾸쇼 | 반도체 메모리 장치 |
US6163048A (en) | 1995-10-25 | 2000-12-19 | Cypress Semiconductor Corporation | Semiconductor non-volatile memory device having a NAND cell structure |
US5581504A (en) | 1995-11-14 | 1996-12-03 | Programmable Microelectronics Corp. | Non-volatile electrically erasable memory with PMOS transistor NAND gate structure |
US5767549A (en) | 1996-07-03 | 1998-06-16 | International Business Machines Corporation | SOI CMOS structure |
US6021063A (en) * | 1997-01-13 | 2000-02-01 | Vanguard International Semiconductor Corporation | Method and structure for improving data retention in a DRAM |
JP3951443B2 (ja) | 1997-09-02 | 2007-08-01 | ソニー株式会社 | 不揮発性半導体記憶装置及びその書き込み方法 |
JP3492168B2 (ja) | 1997-10-21 | 2004-02-03 | シャープ株式会社 | 不揮発性半導体記憶装置 |
US6005818A (en) | 1998-01-20 | 1999-12-21 | Stmicroelectronics, Inc. | Dynamic random access memory device with a latching mechanism that permits hidden refresh operations |
US6229161B1 (en) | 1998-06-05 | 2001-05-08 | Stanford University | Semiconductor capacitively-coupled NDR device and its applications in high-density high-speed memories and in power switches |
CN1691331A (zh) | 1999-02-01 | 2005-11-02 | 株式会社日立制作所 | 半导体集成电路器件 |
US6356485B1 (en) | 1999-02-13 | 2002-03-12 | Integrated Device Technology, Inc. | Merging write cycles by comparing at least a portion of the respective write cycle addresses |
US6141248A (en) | 1999-07-29 | 2000-10-31 | Micron Technology, Inc. | DRAM and SRAM memory cells with repressed memory |
US6307781B1 (en) * | 1999-09-30 | 2001-10-23 | Infineon Technologies Aktiengesellschaft | Two transistor flash memory cell |
KR100323140B1 (ko) | 2000-01-17 | 2002-02-06 | 윤종용 | 낸드형 플래쉬 메모리소자 및 그 제조방법 |
DE10012105B4 (de) | 2000-03-13 | 2007-08-23 | Infineon Technologies Ag | Verfahren zum Auslesen von nichtflüchtigen Halbleiter-Speicheranordnungen |
JP2001274265A (ja) | 2000-03-28 | 2001-10-05 | Mitsubishi Electric Corp | 半導体装置 |
JP2001358313A (ja) | 2000-06-14 | 2001-12-26 | Hitachi Ltd | 半導体装置 |
US6881994B2 (en) | 2000-08-14 | 2005-04-19 | Matrix Semiconductor, Inc. | Monolithic three dimensional array of charge storage devices containing a planarized surface |
JP2002133878A (ja) | 2000-10-23 | 2002-05-10 | Hitachi Ltd | 不揮発性記憶回路および半導体集積回路 |
JP3884266B2 (ja) * | 2001-02-19 | 2007-02-21 | 株式会社東芝 | 半導体メモリ装置及びその製造方法 |
US6462359B1 (en) | 2001-03-22 | 2002-10-08 | T-Ram, Inc. | Stability in thyristor-based memory device |
AU2002252593A1 (en) | 2001-04-05 | 2002-10-21 | Hyun-Jin Cho | Data restore in thyristor-based memory |
TWI230392B (en) | 2001-06-18 | 2005-04-01 | Innovative Silicon Sa | Semiconductor device |
JP3808763B2 (ja) | 2001-12-14 | 2006-08-16 | 株式会社東芝 | 半導体メモリ装置およびその製造方法 |
US20030230778A1 (en) | 2002-01-30 | 2003-12-18 | Sumitomo Mitsubishi Silicon Corporation | SOI structure having a SiGe Layer interposed between the silicon and the insulator |
US6686624B2 (en) | 2002-03-11 | 2004-02-03 | Monolithic System Technology, Inc. | Vertical one-transistor floating-body DRAM cell in bulk CMOS process with electrically isolated charge storage region |
US6661042B2 (en) | 2002-03-11 | 2003-12-09 | Monolithic System Technology, Inc. | One-transistor floating-body DRAM cell in bulk CMOS process with electrically isolated charge storage region |
US6954377B2 (en) | 2002-03-19 | 2005-10-11 | O2Ic, Inc. | Non-volatile differential dynamic random access memory |
EP1355316B1 (en) | 2002-04-18 | 2007-02-21 | Innovative Silicon SA | Data storage device and refreshing method for use with such device |
JP2004079843A (ja) * | 2002-08-20 | 2004-03-11 | Renesas Technology Corp | 半導体記憶装置 |
US7042052B2 (en) | 2003-02-10 | 2006-05-09 | Micron Technology, Inc. | Transistor constructions and electronic devices |
US6956256B2 (en) | 2003-03-04 | 2005-10-18 | Micron Technology Inc. | Vertical gain cell |
US20040228168A1 (en) | 2003-05-13 | 2004-11-18 | Richard Ferrant | Semiconductor memory device and method of operating same |
US7085153B2 (en) * | 2003-05-13 | 2006-08-01 | Innovative Silicon S.A. | Semiconductor memory cell, array, architecture and device, and method of operating same |
US7227803B2 (en) | 2003-07-31 | 2007-06-05 | Brocade Communications Systems, Inc. | Apparatus for reducing data corruption in a non-volatile memory |
DE10350751B4 (de) | 2003-10-30 | 2008-04-24 | Infineon Technologies Ag | Verfahren zum Herstellen eines vertikalen Feldeffekttransistors und Feldeffekt-Speichertransistor, insbesondere FLASH-Speichertransistor |
US6969656B2 (en) | 2003-12-05 | 2005-11-29 | Freescale Semiconductor, Inc. | Method and circuit for multiplying signals with a transistor having more than one independent gate structure |
JP2005243709A (ja) | 2004-02-24 | 2005-09-08 | Toshiba Corp | 半導体装置およびその製造方法 |
JP4429036B2 (ja) * | 2004-02-27 | 2010-03-10 | 富士通マイクロエレクトロニクス株式会社 | 半導体装置の製造方法 |
JP4331053B2 (ja) | 2004-05-27 | 2009-09-16 | 株式会社東芝 | 半導体記憶装置 |
KR100621628B1 (ko) | 2004-05-31 | 2006-09-19 | 삼성전자주식회사 | 비휘발성 기억 셀 및 그 형성 방법 |
US7009887B1 (en) | 2004-06-03 | 2006-03-07 | Fasl Llc | Method of determining voltage compensation for flash memory devices |
CN1965404B (zh) * | 2004-06-09 | 2010-05-26 | 株式会社瑞萨科技 | 半导体存储装置 |
US7118986B2 (en) | 2004-06-16 | 2006-10-10 | International Business Machines Corporation | STI formation in semiconductor device including SOI and bulk silicon regions |
US7259420B2 (en) | 2004-07-28 | 2007-08-21 | International Business Machines Corporation | Multiple-gate device with floating back gate |
KR100843717B1 (ko) * | 2007-06-28 | 2008-07-04 | 삼성전자주식회사 | 플로팅 바디 소자 및 벌크 바디 소자를 갖는 반도체소자 및그 제조방법 |
US7145186B2 (en) | 2004-08-24 | 2006-12-05 | Micron Technology, Inc. | Memory cell with trenched gated thyristor |
US7253493B2 (en) | 2004-08-24 | 2007-08-07 | Micron Technology, Inc. | High density access transistor having increased channel width and methods of fabricating such devices |
KR100591770B1 (ko) | 2004-09-01 | 2006-06-26 | 삼성전자주식회사 | 반도체 핀을 이용한 플래쉬 메모리 소자 및 그 제조 방법 |
US7061806B2 (en) | 2004-09-30 | 2006-06-13 | Intel Corporation | Floating-body memory cell write |
KR100598109B1 (ko) | 2004-10-08 | 2006-07-07 | 삼성전자주식회사 | 비휘발성 기억 소자 및 그 형성 방법 |
JP4755405B2 (ja) * | 2004-10-13 | 2011-08-24 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US7391640B2 (en) * | 2004-12-10 | 2008-06-24 | Intel Corporation | 2-transistor floating-body dram |
US7301803B2 (en) | 2004-12-22 | 2007-11-27 | Innovative Silicon S.A. | Bipolar reading technique for a memory cell having an electrically floating body transistor |
US7307268B2 (en) | 2005-01-19 | 2007-12-11 | Sandisk Corporation | Structure and method for biasing phase change memory array for reliable writing |
KR100657148B1 (ko) * | 2005-03-18 | 2006-12-13 | 매그나칩 반도체 유한회사 | 플래시 메모리 및 그 레퍼런스 셀 제어 방법 |
US7504302B2 (en) | 2005-03-18 | 2009-03-17 | Freescale Semiconductor, Inc. | Process of forming a non-volatile memory cell including a capacitor structure |
US7602006B2 (en) | 2005-04-20 | 2009-10-13 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor flash device |
US7205601B2 (en) | 2005-06-09 | 2007-04-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | FinFET split gate EEPROM structure and method of its fabrication |
US7230846B2 (en) * | 2005-06-14 | 2007-06-12 | Intel Corporation | Purge-based floating body memory |
EP1739738A3 (fr) | 2005-06-30 | 2009-04-01 | STMicroelectronics (Crolles 2) SAS | Cellule mémoire à un transistor MOS à corps isolé à effet mémoire renforcé |
JP4660324B2 (ja) * | 2005-09-06 | 2011-03-30 | 株式会社東芝 | Fbcメモリ装置 |
FR2889356A1 (fr) * | 2005-07-26 | 2007-02-02 | St Microelectronics Crolles 2 | Cellule memoire a un transistor a corps isole a sensibilite de lecture amelioree |
US7285832B2 (en) | 2005-07-29 | 2007-10-23 | Hoefler Alexander B | Multiport single transistor bit cell |
JP2007067133A (ja) | 2005-08-31 | 2007-03-15 | Sony Corp | 半導体装置 |
TWI263310B (en) | 2005-09-28 | 2006-10-01 | Powerchip Semiconductor Corp | Non-volatile memory and fabricating method thereof |
KR100663366B1 (ko) | 2005-10-26 | 2007-01-02 | 삼성전자주식회사 | 자기 정렬된 부유게이트를 갖는 플래시메모리소자의제조방법 및 관련된 소자 |
US7209384B1 (en) | 2005-12-08 | 2007-04-24 | Juhan Kim | Planar capacitor memory cell and its applications |
US20070164352A1 (en) | 2005-12-12 | 2007-07-19 | The Regents Of The University Of California | Multi-bit-per-cell nvm structures and architecture |
US7683430B2 (en) | 2005-12-19 | 2010-03-23 | Innovative Silicon Isi Sa | Electrically floating body memory cell and array, and method of operating or controlling same |
JP2007194259A (ja) | 2006-01-17 | 2007-08-02 | Toshiba Corp | 半導体装置及びその製造方法 |
US7542345B2 (en) * | 2006-02-16 | 2009-06-02 | Innovative Silicon Isi Sa | Multi-bit memory cell having electrically floating body transistor, and method of programming and reading same |
US7535060B2 (en) | 2006-03-08 | 2009-05-19 | Freescale Semiconductor, Inc. | Charge storage structure formation in transistor with vertical channel region |
US7439594B2 (en) | 2006-03-16 | 2008-10-21 | Micron Technology, Inc. | Stacked non-volatile memory with silicon carbide-based amorphous silicon thin film transistors |
EP1835530A3 (en) | 2006-03-17 | 2009-01-28 | Samsung Electronics Co., Ltd. | Non-volatile memory device and method of manufacturing the same |
US7855417B2 (en) | 2006-08-07 | 2010-12-21 | Ememory Technology Inc. | Non-volatile memory with a stable threshold voltage on SOI substrate |
KR100810614B1 (ko) | 2006-08-23 | 2008-03-06 | 삼성전자주식회사 | 디램 셀 모드 및 비휘발성 메모리 셀 모드를 갖는 반도체메모리 소자 및 그 동작방법 |
JP4364227B2 (ja) | 2006-09-29 | 2009-11-11 | 株式会社東芝 | 半導体記憶装置 |
US8325530B2 (en) | 2006-10-03 | 2012-12-04 | Macronix International Co., Ltd. | Cell operation methods using gate-injection for floating gate NAND flash memory |
US8194451B2 (en) | 2007-11-29 | 2012-06-05 | Zeno Semiconductor, Inc. | Memory cells, memory cell arrays, methods of using and methods of making |
US8547756B2 (en) | 2010-10-04 | 2013-10-01 | Zeno Semiconductor, Inc. | Semiconductor memory device having an electrically floating body transistor |
US8077536B2 (en) | 2008-08-05 | 2011-12-13 | Zeno Semiconductor, Inc. | Method of operating semiconductor memory device with floating body transistor using silicon controlled rectifier principle |
US9601493B2 (en) | 2006-11-29 | 2017-03-21 | Zeno Semiconductor, Inc | Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making |
US9391079B2 (en) | 2007-11-29 | 2016-07-12 | Zeno Semiconductor, Inc. | Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making |
US7760548B2 (en) | 2006-11-29 | 2010-07-20 | Yuniarto Widjaja | Semiconductor memory having both volatile and non-volatile functionality and method of operating |
US8159868B2 (en) | 2008-08-22 | 2012-04-17 | Zeno Semiconductor, Inc. | Semiconductor memory having both volatile and non-volatile functionality including resistance change material and method of operating |
US8514622B2 (en) | 2007-11-29 | 2013-08-20 | Zeno Semiconductor, Inc. | Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making |
JP5078338B2 (ja) * | 2006-12-12 | 2012-11-21 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
KR100801707B1 (ko) | 2006-12-13 | 2008-02-11 | 삼성전자주식회사 | 플로팅 바디 메모리 및 그 제조방법 |
US7450423B2 (en) | 2007-01-03 | 2008-11-11 | Macronix International Co., Ltd. | Methods of operating non-volatile memory cells having an oxide/nitride multilayer insulating structure |
JP2008186838A (ja) | 2007-01-26 | 2008-08-14 | Toshiba Corp | 半導体装置、その製造方法及び不揮発性半導体記憶装置 |
US7898009B2 (en) | 2007-02-22 | 2011-03-01 | American Semiconductor, Inc. | Independently-double-gated transistor memory (IDGM) |
US7447068B2 (en) | 2007-03-19 | 2008-11-04 | Macronix International Co., Ltd. | Method for programming a multilevel memory |
JP2008263133A (ja) * | 2007-04-13 | 2008-10-30 | Toshiba Microelectronics Corp | 半導体記憶装置およびその駆動方法 |
US7452776B1 (en) | 2007-04-24 | 2008-11-18 | Promos Technoloies Pte. Ltd. | Integrated circuits with substrate protrusions, including (but not limited to) floating gate memories |
US9230651B2 (en) | 2012-04-08 | 2016-01-05 | Zeno Semiconductor, Inc. | Memory device having electrically floating body transitor |
US8085594B2 (en) | 2007-06-01 | 2011-12-27 | Micron Technology, Inc. | Reading technique for memory cell with electrically floating body transistor |
KR100843947B1 (ko) | 2007-07-04 | 2008-07-03 | 주식회사 하이닉스반도체 | 1-트랜지스터형 디램 |
JP2009037703A (ja) | 2007-08-02 | 2009-02-19 | Toshiba Corp | 抵抗変化メモリ |
US7674669B2 (en) | 2007-09-07 | 2010-03-09 | Micron Technology, Inc. | FIN field effect transistor |
CN101889340A (zh) * | 2007-10-01 | 2010-11-17 | 佛罗里达大学研究基金公司 | 双晶体管浮体动态存储单元 |
TWI351767B (en) | 2007-10-02 | 2011-11-01 | Nanya Technology Corp | Two-bit flash memory |
US7759715B2 (en) | 2007-10-15 | 2010-07-20 | Micron Technology, Inc. | Memory cell comprising dynamic random access memory (DRAM) nanoparticles and nonvolatile memory (NVM) nanoparticle |
US7847338B2 (en) | 2007-10-24 | 2010-12-07 | Yuniarto Widjaja | Semiconductor memory having both volatile and non-volatile functionality and method of operating |
US20090108351A1 (en) | 2007-10-26 | 2009-04-30 | International Business Machines Corporation | Finfet memory device with dual separate gates and method of operation |
US8174886B2 (en) | 2007-11-29 | 2012-05-08 | Zeno Semiconductor, Inc. | Semiconductor memory having electrically floating body transistor |
US10403361B2 (en) | 2007-11-29 | 2019-09-03 | Zeno Semiconductor, Inc. | Memory cells, memory cell arrays, methods of using and methods of making |
US8130547B2 (en) | 2007-11-29 | 2012-03-06 | Zeno Semiconductor, Inc. | Method of maintaining the state of semiconductor memory having electrically floating body transistor |
US8130548B2 (en) * | 2007-11-29 | 2012-03-06 | Zeno Semiconductor, Inc. | Semiconductor memory having electrically floating body transistor |
US8264875B2 (en) | 2010-10-04 | 2012-09-11 | Zeno Semiconducor, Inc. | Semiconductor memory device having an electrically floating body transistor |
US8331150B2 (en) | 2008-01-03 | 2012-12-11 | Aplus Flash Technology, Inc. | Integrated SRAM and FLOTOX EEPROM memory device |
US20090213641A1 (en) * | 2008-02-22 | 2009-08-27 | Heechoul Park | Memory with active mode back-bias voltage control and method of operating same |
JP2009252264A (ja) * | 2008-04-02 | 2009-10-29 | Toshiba Corp | 半導体記憶装置およびその駆動方法 |
US8014200B2 (en) | 2008-04-08 | 2011-09-06 | Zeno Semiconductor, Inc. | Semiconductor memory having volatile and multi-bit, non-volatile functionality and methods of operating |
US7701763B2 (en) | 2008-04-23 | 2010-04-20 | Micron Technology, Inc. | Leakage compensation during program and read operations |
KR101498873B1 (ko) | 2008-07-08 | 2015-03-04 | 삼성전자주식회사 | 디램 및 비휘발성 메모리 특성을 갖는 메모리 소자의 구동방법 |
US7933140B2 (en) | 2008-10-02 | 2011-04-26 | Micron Technology, Inc. | Techniques for reducing a voltage swing |
US7924630B2 (en) | 2008-10-15 | 2011-04-12 | Micron Technology, Inc. | Techniques for simultaneously driving a plurality of source lines |
KR101442177B1 (ko) | 2008-12-18 | 2014-09-18 | 삼성전자주식회사 | 커패시터 없는 1-트랜지스터 메모리 셀을 갖는 반도체소자의 제조방법들 |
KR101049600B1 (ko) * | 2008-12-23 | 2011-07-14 | 주식회사 하이닉스반도체 | 비활성 트랜지스터를 이용한 셀 격리 구조를 포함하는 반도체 메모리 소자 |
US8018007B2 (en) | 2009-07-20 | 2011-09-13 | International Business Machines Corporation | Selective floating body SRAM cell |
WO2011097592A1 (en) | 2010-02-07 | 2011-08-11 | Zeno Semiconductor , Inc. | Semiconductor memory device having electrically floating body transistor, and having both volatile and non-volatile functionality and method |
US9922981B2 (en) | 2010-03-02 | 2018-03-20 | Zeno Semiconductor, Inc. | Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making |
US10461084B2 (en) | 2010-03-02 | 2019-10-29 | Zeno Semiconductor, Inc. | Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making |
US10340276B2 (en) | 2010-03-02 | 2019-07-02 | Zeno Semiconductor, Inc. | Method of maintaining the state of semiconductor memory having electrically floating body transistor |
US8582359B2 (en) | 2010-11-16 | 2013-11-12 | Zeno Semiconductor, Inc. | Dual-port semiconductor memory and first-in first-out (FIFO) memory having electrically floating body transistor |
US8957458B2 (en) | 2011-03-24 | 2015-02-17 | Zeno Semiconductor, Inc. | Asymmetric semiconductor memory device having electrically floating body transistor |
US9025358B2 (en) | 2011-10-13 | 2015-05-05 | Zeno Semiconductor Inc | Semiconductor memory having both volatile and non-volatile functionality comprising resistive change material and method of operating |
US9208880B2 (en) | 2013-01-14 | 2015-12-08 | Zeno Semiconductor, Inc. | Content addressable memory device having electrically floating body transistor |
-
2013
- 2013-02-15 JP JP2014557836A patent/JP6362542B2/ja active Active
- 2013-02-15 SG SG11201404871TA patent/SG11201404871TA/en unknown
- 2013-02-15 EP EP13748573.6A patent/EP2815402B1/en active Active
- 2013-02-15 CN CN201380009774.4A patent/CN104471648B/zh active Active
- 2013-02-15 CN CN201710551426.XA patent/CN107331416B/zh active Active
- 2013-02-15 KR KR1020147025821A patent/KR102059884B1/ko active IP Right Grant
- 2013-02-15 WO PCT/US2013/026466 patent/WO2013123415A1/en active Application Filing
- 2013-02-18 TW TW106129176A patent/TWI639223B/zh active
- 2013-02-18 TW TW107127135A patent/TWI671886B/zh active
- 2013-02-18 TW TW110100657A patent/TWI761025B/zh active
- 2013-02-18 TW TW108123822A patent/TWI716927B/zh active
- 2013-02-18 TW TW111141656A patent/TWI812528B/zh active
- 2013-02-18 TW TW111109468A patent/TWI783887B/zh active
- 2013-02-18 TW TW102105596A patent/TWI605570B/zh active
-
2017
- 2017-06-12 JP JP2017115253A patent/JP6607882B2/ja active Active
-
2022
- 2022-05-12 US US17/743,248 patent/US11974425B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
JP2017195395A (ja) | 2017-10-26 |
TW202226540A (zh) | 2022-07-01 |
TWI671886B (zh) | 2019-09-11 |
TW201842652A (zh) | 2018-12-01 |
CN107331416A (zh) | 2017-11-07 |
TWI761025B (zh) | 2022-04-11 |
JP2015513216A (ja) | 2015-04-30 |
JP6362542B2 (ja) | 2018-07-25 |
CN107331416B (zh) | 2020-11-10 |
CN104471648A (zh) | 2015-03-25 |
TWI716927B (zh) | 2021-01-21 |
US11974425B2 (en) | 2024-04-30 |
TWI783887B (zh) | 2022-11-11 |
TW201401489A (zh) | 2014-01-01 |
TW201941405A (zh) | 2019-10-16 |
EP2815402A4 (en) | 2015-09-30 |
TWI639223B (zh) | 2018-10-21 |
TW201810624A (zh) | 2018-03-16 |
WO2013123415A1 (en) | 2013-08-22 |
CN104471648B (zh) | 2017-07-21 |
TWI812528B (zh) | 2023-08-11 |
TW202310358A (zh) | 2023-03-01 |
KR20150022744A (ko) | 2015-03-04 |
EP2815402A1 (en) | 2014-12-24 |
TW202119597A (zh) | 2021-05-16 |
US20220278104A1 (en) | 2022-09-01 |
JP6607882B2 (ja) | 2019-11-20 |
KR102059884B1 (ko) | 2019-12-27 |
EP2815402B1 (en) | 2020-11-25 |
TWI605570B (zh) | 2017-11-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP2923378A4 (en) | TRANSISTORS, MEMORY CELLS AND SEMICONDUCTOR CONSTRUCTIONS | |
HK1213016A1 (zh) | 細胞調節化合物及其用途 | |
HK1210494A1 (zh) | 用於細胞培養的裝置和方法 | |
EP2742416A4 (en) | JOURNALIZING LIFE AND SHARING MEMORY | |
EP2780944A4 (en) | Memory cells, integrated devices and methods for producing memory cells | |
SG11201404871TA (en) | Memory cell comprising first and second transistors and methods of operating | |
EP2805350A4 (en) | STORAGE CELLS AND METHOD FOR MANUFACTURING THESE STORAGE CELLS | |
EP2895935A4 (en) | METHOD AND DEVICE FOR PROTECTING MEMORY AREAS DURING LOW-POWER CONDITIONS | |
EP2801912A4 (en) | MESSAGE-BASED MEMORY ACCESS DEVICE AND ACCESS METHOD THEREOF | |
EP2761472A4 (en) | MEMORY CHANNEL TO SUPPORT SINGLE AND REMOTE MEMORY ACCESS | |
EP2901455A4 (en) | MEMORY CELL WITH PARTITIONED GATE WITH SUBSTRATE STRESSORREGION AND MANUFACTURING METHOD THEREFOR | |
EP2805351A4 (en) | STRUCTURES AND METHODS OF RESISTIVE MEMORY CELL | |
TWI560847B (en) | Semiconductor devices and memory system | |
HK1214412A1 (zh) | 電化學生物反應器模塊和使用所述模塊的方法 | |
EP2986710A4 (en) | AGE-MODIFIED CELLS AND METHOD FOR PRODUCING AGED-MODIFIED CELLS | |
EP2823402A4 (en) | Method for determining memory and detection parameters | |
EP2672514A4 (en) | THIN FILM TRANSISTOR STORAGE AND MANUFACTURING METHOD THEREFOR | |
SG11201504638RA (en) | Cancer cell isolation device and cancer cell isolation method | |
EP2737529A4 (en) | MEMORY CELLS AND METHOD FOR STORING INFORMATION | |
HK1215719A1 (zh) | 免疫抑制細胞及其製造和使用方法 | |
IL245272B (en) | pif-transfected cells and methods of use | |
EP2729935A4 (en) | DEVICES AND METHODS FOR PROGRAMMING MEMORY CELLS | |
EP2943982A4 (en) | MEMORY CELLS AND METHODS FOR FORMING MEMORY CELLS | |
HK1221260A1 (zh) | 擴增 細胞的方法 | |
EP2888740A4 (en) | DEVICES AND METHOD FOR ACCESSING DISTRIBUTED SUB-BLOCKS OF MEMORY CELLS |