SG10201403724PA - Semiconductor device and method of forming avertical interconnect structure for 3-d fo-wlcsp - Google Patents

Semiconductor device and method of forming avertical interconnect structure for 3-d fo-wlcsp

Info

Publication number
SG10201403724PA
SG10201403724PA SG10201403724PA SG10201403724PA SG10201403724PA SG 10201403724P A SG10201403724P A SG 10201403724PA SG 10201403724P A SG10201403724P A SG 10201403724PA SG 10201403724P A SG10201403724P A SG 10201403724PA SG 10201403724P A SG10201403724P A SG 10201403724PA
Authority
SG
Singapore
Prior art keywords
wlcsp
avertical
forming
semiconductor device
interconnect structure
Prior art date
Application number
SG10201403724PA
Other languages
English (en)
Inventor
Yaojian Lin
Kang Chen
Original Assignee
Stats Chippac Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Stats Chippac Ltd filed Critical Stats Chippac Ltd
Publication of SG10201403724PA publication Critical patent/SG10201403724PA/en

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US20110278736A1 (en) 2011-11-17
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US9847324B2 (en) 2017-12-19
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