SG10201403724PA - Semiconductor device and method of forming avertical interconnect structure for 3-d fo-wlcsp - Google Patents

Semiconductor device and method of forming avertical interconnect structure for 3-d fo-wlcsp

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Publication number
SG10201403724PA
SG10201403724PA SG10201403724PA SG10201403724PA SG10201403724PA SG 10201403724P A SG10201403724P A SG 10201403724PA SG 10201403724P A SG10201403724P A SG 10201403724PA SG 10201403724P A SG10201403724P A SG 10201403724PA SG 10201403724P A SG10201403724P A SG 10201403724PA
Authority
SG
Singapore
Prior art keywords
wlcsp
avertical
forming
semiconductor device
interconnect structure
Prior art date
Application number
SG10201403724PA
Inventor
Yaojian Lin
Kang Chen
Original Assignee
Stats Chippac Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Stats Chippac Ltd filed Critical Stats Chippac Ltd
Publication of SG10201403724PA publication Critical patent/SG10201403724PA/en

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    • H01L2924/1904—Component type
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    • H01L2924/1904—Component type
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    • H01L2924/1904—Component type
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    • H01L2924/30—Technical effects
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Families Citing this family (147)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8592992B2 (en) 2011-12-14 2013-11-26 Stats Chippac, Ltd. Semiconductor device and method of forming vertical interconnect structure with conductive micro via array for 3-D Fo-WLCSP
US7642128B1 (en) 2008-12-12 2010-01-05 Stats Chippac, Ltd. Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSP
US9293401B2 (en) * 2008-12-12 2016-03-22 Stats Chippac, Ltd. Semiconductor device and method for forming a low profile embedded wafer level ball grid array molded laser package (EWLP-MLP)
US9082806B2 (en) 2008-12-12 2015-07-14 Stats Chippac, Ltd. Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSP
JP5419226B2 (en) * 2010-07-29 2014-02-19 日東電工株式会社 Flip chip type film for semiconductor back surface and use thereof
US20120037935A1 (en) * 2010-08-13 2012-02-16 Wen-Kun Yang Substrate Structure of LED (light emitting diode) Packaging and Method of the same
FR2964786B1 (en) * 2010-09-09 2013-03-15 Commissariat Energie Atomique METHOD FOR PRODUCING CHIP ELEMENTS WITH WIRE INSERTION GROOVES
US20130037929A1 (en) * 2011-08-09 2013-02-14 Kay S. Essig Stackable wafer level packages and related methods
US9385009B2 (en) 2011-09-23 2016-07-05 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming stacked vias within interconnect structure for Fo-WLCSP
US20130075892A1 (en) * 2011-09-27 2013-03-28 Taiwan Semiconductor Manufacturing Company, Ltd. Method for Three Dimensional Integrated Circuit Fabrication
US9059109B2 (en) * 2012-01-24 2015-06-16 Taiwan Semiconductor Manufacturing Company, Ltd. Package assembly and method of forming the same
KR101163574B1 (en) * 2012-03-13 2012-07-06 주식회사 나노맥 Electromagnetic waves absorber for both radio frequency identification and wireless charging, wireless antenna for both radio frequency identification and wireless charging including the same, and manufacturing method thereof
US9082780B2 (en) 2012-03-23 2015-07-14 Stats Chippac, Ltd. Semiconductor device and method of forming a robust fan-out package including vertical interconnects and mechanical support layer
US8810024B2 (en) 2012-03-23 2014-08-19 Stats Chippac Ltd. Semiconductor method and device of forming a fan-out PoP device with PWB vertical interconnect units
US9837303B2 (en) 2012-03-23 2017-12-05 STATS ChipPAC Pte. Ltd. Semiconductor method and device of forming a fan-out device with PWB vertical interconnect units
US9842798B2 (en) 2012-03-23 2017-12-12 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming a PoP device with embedded vertical interconnect units
US10049964B2 (en) 2012-03-23 2018-08-14 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming a fan-out PoP device with PWB vertical interconnect units
US20130249101A1 (en) * 2012-03-23 2013-09-26 Stats Chippac, Ltd. Semiconductor Method of Device of Forming a Fan-Out PoP Device with PWB Vertical Interconnect Units
US9613917B2 (en) 2012-03-30 2017-04-04 Taiwan Semiconductor Manufacturing Company, Ltd. Package-on-package (PoP) device with integrated passive device in a via
US9385006B2 (en) 2012-06-21 2016-07-05 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming an embedded SOP fan-out package
US8809996B2 (en) 2012-06-29 2014-08-19 Taiwan Semiconductor Manufacturing Company, Ltd. Package with passive devices and method of forming the same
US8872326B2 (en) * 2012-08-29 2014-10-28 Taiwan Semiconductor Manufacturing Company, Ltd. Three dimensional (3D) fan-out packaging mechanisms
TWI502655B (en) * 2012-08-31 2015-10-01 Chipmos Technologies Inc Semiconductor structure and method of manufacturing the same
US9165887B2 (en) 2012-09-10 2015-10-20 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device with discrete blocks
US10192796B2 (en) 2012-09-14 2019-01-29 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming dual-sided interconnect structures in FO-WLCSP
US9818734B2 (en) 2012-09-14 2017-11-14 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming build-up interconnect structures over a temporary substrate
US9030010B2 (en) 2012-09-20 2015-05-12 Taiwan Semiconductor Manufacturing Company, Ltd. Packaging devices and methods
US10622310B2 (en) 2012-09-26 2020-04-14 Ping-Jung Yang Method for fabricating glass substrate package
US9385102B2 (en) * 2012-09-28 2016-07-05 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming supporting layer over semiconductor die in thin fan-out wafer level chip scale package
US9620413B2 (en) * 2012-10-02 2017-04-11 STATS ChipPAC Pte. Ltd. Semiconductor device and method of using a standardized carrier in semiconductor packaging
US9496195B2 (en) 2012-10-02 2016-11-15 STATS ChipPAC Pte. Ltd. Semiconductor device and method of depositing encapsulant along sides and surface edge of semiconductor die in embedded WLCSP
KR101835566B1 (en) * 2012-10-08 2018-03-07 삼성전기주식회사 Package structure and method for manufacturing package structure
US9331007B2 (en) 2012-10-16 2016-05-03 Stats Chippac, Ltd. Semiconductor device and method of forming conductive ink layer as interconnect structure between semiconductor packages
US9391041B2 (en) * 2012-10-19 2016-07-12 Taiwan Semiconductor Manufacturing Company, Ltd. Fan-out wafer level package structure
US20140127857A1 (en) * 2012-11-07 2014-05-08 Taiwan Semiconductor Manufacturing Company, Ltd. Carrier Wafers, Methods of Manufacture Thereof, and Packaging Methods
US9704780B2 (en) * 2012-12-11 2017-07-11 STATS ChipPAC, Pte. Ltd. Semiconductor device and method of forming low profile fan-out package with vertical interconnection units
US9236366B2 (en) 2012-12-20 2016-01-12 Intel Corporation High density organic bridge device and method
US9704824B2 (en) 2013-01-03 2017-07-11 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming embedded wafer level chip scale packages
US9721862B2 (en) 2013-01-03 2017-08-01 STATS ChipPAC Pte. Ltd. Semiconductor device and method of using a standardized carrier to form embedded wafer level chip scale packages
TW201428901A (en) * 2013-01-07 2014-07-16 矽品精密工業股份有限公司 Semiconductor package and fabrication method thereof
US9378982B2 (en) * 2013-01-31 2016-06-28 Taiwan Semiconductor Manufacturing Company, Ltd. Die package with openings surrounding end-portions of through package vias (TPVs) and package on package (PoP) using the die package
US9553070B2 (en) * 2013-04-30 2017-01-24 Taiwan Semiconductor Manufacturing Company, Ltd. 3D packages and methods for forming the same
US9711462B2 (en) 2013-05-08 2017-07-18 Infineon Technologies Ag Package arrangement including external block comprising semiconductor material and electrically conductive plastic material
TWI497664B (en) * 2013-05-17 2015-08-21 矽品精密工業股份有限公司 Method for manufacturing semiconductor package
CN103367139B (en) * 2013-07-11 2016-08-24 华进半导体封装先导技术研发中心有限公司 A kind of TSV hole bottom medium layer lithographic method
US9252092B2 (en) 2013-07-24 2016-02-02 Stats Chippac, Ltd. Semiconductor device and method of forming through mold hole with alignment and dimension control
US9455211B2 (en) 2013-09-11 2016-09-27 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated fan-out structure with openings in buffer layer
US9425121B2 (en) 2013-09-11 2016-08-23 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated fan-out structure with guiding trenches in buffer layer
US9620580B2 (en) * 2013-10-25 2017-04-11 Mediatek Inc. Semiconductor structure
US9373527B2 (en) 2013-10-30 2016-06-21 Taiwan Semiconductor Manufacturing Company, Ltd. Chip on package structure and method
CN104617034B (en) * 2013-11-05 2018-05-01 中芯国际集成电路制造(上海)有限公司 Semiconductor package and forming method thereof
US9472533B2 (en) 2013-11-20 2016-10-18 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming wire bondable fan-out EWLB package
KR101938949B1 (en) * 2013-12-23 2019-01-15 인텔 코포레이션 Package on package architecture and method for making
CN103681372B (en) * 2013-12-26 2016-07-06 华进半导体封装先导技术研发中心有限公司 The method for packing of fanout wafer level three-dimensional conductor chip
US9653442B2 (en) 2014-01-17 2017-05-16 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit package and methods of forming same
US9589900B2 (en) 2014-02-27 2017-03-07 Taiwan Semiconductor Manufacturing Company, Ltd. Metal pad for laser marking
US9343434B2 (en) 2014-02-27 2016-05-17 Taiwan Semiconductor Manufacturing Company, Ltd. Laser marking in packages
TW201543641A (en) * 2014-05-12 2015-11-16 Xintex Inc Chip package and method for forming the same
US9666522B2 (en) 2014-05-29 2017-05-30 Taiwan Semiconductor Manufacturing Company, Ltd. Alignment mark design for packages
US9978700B2 (en) * 2014-06-16 2018-05-22 STATS ChipPAC Pte. Ltd. Method for building up a fan-out RDL structure with fine pitch line-width and line-spacing
US10177032B2 (en) * 2014-06-18 2019-01-08 Taiwan Semiconductor Manufacturing Company, Ltd. Devices, packaging devices, and methods of packaging semiconductor devices
US9831214B2 (en) * 2014-06-18 2017-11-28 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device packages, packaging methods, and packaged semiconductor devices
US10490521B2 (en) * 2014-06-26 2019-11-26 Taiwan Semiconductor Manufacturing Company, Ltd. Advanced structure for info wafer warpage reduction
US20160035677A1 (en) * 2014-08-04 2016-02-04 Infineon Technologies Ag Method for forming a package arrangement and package arrangement
TWI584387B (en) * 2014-08-15 2017-05-21 矽品精密工業股份有限公司 Method of manufacturing package structure
US9842825B2 (en) * 2014-09-05 2017-12-12 Taiwan Semiconductor Manufacturing Company, Ltd. Substrateless integrated circuit packages and methods of forming same
TWI549203B (en) * 2014-11-26 2016-09-11 力成科技股份有限公司 Metod for 3d stacking semiconductor packages to avoid bridging of interposer terminals
US9659863B2 (en) * 2014-12-01 2017-05-23 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor devices, multi-die packages, and methods of manufacture thereof
US9812337B2 (en) 2014-12-03 2017-11-07 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit package pad and methods of forming
US9859200B2 (en) * 2014-12-29 2018-01-02 STATS ChipPAC Pte. Ltd. Integrated circuit packaging system with interposer support structure mechanism and method of manufacture thereof
US20160218021A1 (en) * 2015-01-27 2016-07-28 Advanced Semiconductor Engineering, Inc. Semiconductor package and method of manufacturing the same
US9786623B2 (en) 2015-03-17 2017-10-10 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming PoP semiconductor device with RDL over top package
US9893017B2 (en) 2015-04-09 2018-02-13 STATS ChipPAC Pte. Ltd. Double-sided semiconductor package and dual-mold method of making same
US9502397B1 (en) * 2015-04-29 2016-11-22 Deca Technologies, Inc. 3D interconnect component for fully molded packages
US9899285B2 (en) * 2015-07-30 2018-02-20 Semtech Corporation Semiconductor device and method of forming small Z semiconductor package
US20170098589A1 (en) * 2015-10-05 2017-04-06 Mediatek Inc. Fan-out wafer level package structure
KR101674322B1 (en) * 2015-11-18 2016-11-08 앰코 테크놀로지 코리아 주식회사 Semiconductor device and manufacturing method thereof
CN108604571B (en) * 2015-11-20 2023-02-17 美国德卡科技公司 All-molded periphery stack packaging equipment
KR20170067426A (en) * 2015-12-08 2017-06-16 앰코 테크놀로지 코리아 주식회사 Method for fabricating semiconductor package and semiconductor package using the same
KR20170082677A (en) * 2016-01-06 2017-07-17 에스케이하이닉스 주식회사 Manufacturing methods and structure of semiconductor package including though mold connectors
WO2017131683A1 (en) * 2016-01-28 2017-08-03 Intel IP Corporation Integrated circuit packages
US10211071B2 (en) * 2016-01-29 2019-02-19 Nxp B.V. IC packaging method and a packaged IC device
US10014268B2 (en) * 2016-03-01 2018-07-03 Advanced Semiconductor Engineering, Inc. Semiconductor chip, semiconductor device and manufacturing process for manufacturing the same
US9659911B1 (en) * 2016-04-20 2017-05-23 Powertech Technology Inc. Package structure and manufacturing method thereof
JP6698826B2 (en) * 2016-04-25 2020-05-27 京セラ株式会社 Substrate for mounting electronic parts, electronic device and electronic module
US11272618B2 (en) 2016-04-26 2022-03-08 Analog Devices International Unlimited Company Mechanically-compliant and electrically and thermally conductive leadframes for component-on-package circuits
US20170338128A1 (en) * 2016-05-17 2017-11-23 Powertech Technology Inc. Manufacturing method of package structure
KR102448098B1 (en) * 2016-05-31 2022-09-27 에스케이하이닉스 주식회사 Semiconductor package including through mold ball connectors with elevated pad and method for manufacturing the same
US10600748B2 (en) * 2016-06-20 2020-03-24 Samsung Electronics Co., Ltd. Fan-out semiconductor package
TWI610409B (en) * 2016-08-30 2018-01-01 南茂科技股份有限公司 Semiconductor package and manufacturing method thereof
US10141276B2 (en) * 2016-09-09 2018-11-27 Powertech Technology Inc. Semiconductor package structure and manufacturing method thereof
CN107887324B (en) 2016-09-30 2019-09-13 上海微电子装备（集团）股份有限公司 A kind of semiconductor rewiring method
KR101952865B1 (en) * 2016-10-10 2019-02-27 삼성전기주식회사 Fan-out semiconductor package and photosensitive resin composition
CN106653699B (en) * 2016-10-26 2019-06-11 江苏吉祥星智能科技有限公司 A kind of interconnection skill system integration method of IC bare chip group
KR101963278B1 (en) * 2016-10-28 2019-07-31 삼성전자주식회사 Fan-out semiconductor package and manufacturing method for the same
TWI622142B (en) * 2016-11-07 2018-04-21 財團法人工業技術研究院 Chip package and chip packaging method
JP2018098302A (en) * 2016-12-09 2018-06-21 株式会社デンソー Electronic device
TW202404049A (en) 2016-12-14 2024-01-16 成真股份有限公司 Logic drive based on standard commodity fpga ic chips
US11625523B2 (en) 2016-12-14 2023-04-11 iCometrue Company Ltd. Logic drive based on standard commodity FPGA IC chips
KR102373440B1 (en) * 2017-03-17 2022-03-14 삼성디스플레이 주식회사 Display panel and display apparatus comprising the same
US10510709B2 (en) * 2017-04-20 2019-12-17 Taiwan Semiconductor Manufacturing Co., Ltd. Semicondcutor package and manufacturing method thereof
US10447274B2 (en) 2017-07-11 2019-10-15 iCometrue Company Ltd. Logic drive based on standard commodity FPGA IC chips using non-volatile memory cells
US10192843B1 (en) * 2017-07-26 2019-01-29 Micron Technology, Inc. Methods of making semiconductor device modules with increased yield
US10957679B2 (en) * 2017-08-08 2021-03-23 iCometrue Company Ltd. Logic drive based on standardized commodity programmable logic semiconductor IC chips
US11024569B2 (en) * 2017-08-09 2021-06-01 Advanced Semiconducor Engineering, Inc. Semiconductor package device and method of manufacturing the same
KR102440119B1 (en) 2017-08-10 2022-09-05 삼성전자주식회사 Semiconductor package and method of fabricating the same
US10643863B2 (en) * 2017-08-24 2020-05-05 Advanced Semiconductor Engineering, Inc. Semiconductor package and method of manufacturing the same
US10630296B2 (en) 2017-09-12 2020-04-21 iCometrue Company Ltd. Logic drive with brain-like elasticity and integrality based on standard commodity FPGA IC chips using non-volatile memory cells
KR101892869B1 (en) * 2017-10-20 2018-08-28 삼성전기주식회사 Fan-out semiconductor package
US10636775B2 (en) * 2017-10-27 2020-04-28 Taiwan Semiconductor Manufacturing Co., Ltd. Package structure and manufacturing method thereof
US10672737B2 (en) * 2017-11-05 2020-06-02 Taiwan Semiconductor Manufacturing Co., Ltd. Three-dimensional integrated circuit structure and method of manufacturing the same
US10957672B2 (en) * 2017-11-13 2021-03-23 Taiwan Semiconductor Manufacturing Company, Ltd. Package structure and method of manufacturing the same
US20190164948A1 (en) * 2017-11-27 2019-05-30 Powertech Technology Inc. Package structure and manufacturing method thereof
US20190181116A1 (en) * 2017-12-11 2019-06-13 Semiconductor Components Industries, Llc Fan-out structure for semiconductor packages and related methods
KR20190082604A (en) 2018-01-02 2019-07-10 삼성전자주식회사 Semiconductor package
US10608642B2 (en) 2018-02-01 2020-03-31 iCometrue Company Ltd. Logic drive using standard commodity programmable logic IC chips comprising non-volatile radom access memory cells
US10623000B2 (en) 2018-02-14 2020-04-14 iCometrue Company Ltd. Logic drive using standard commodity programmable logic IC chips
US10497635B2 (en) 2018-03-27 2019-12-03 Linear Technology Holding Llc Stacked circuit package with molded base having laser drilled openings for upper package
US10608638B2 (en) 2018-05-24 2020-03-31 iCometrue Company Ltd. Logic drive using standard commodity programmable logic IC chips
US20190385962A1 (en) * 2018-06-15 2019-12-19 Texas Instruments Incorporated Semiconductor structure and method for wafer scale chip package
KR102551034B1 (en) * 2018-09-07 2023-07-05 삼성전자주식회사 Semiconductor package and method of fabricating the same
US11309334B2 (en) 2018-09-11 2022-04-19 iCometrue Company Ltd. Logic drive using standard commodity programmable logic IC chips comprising non-volatile random access memory cells
US20200098684A1 (en) * 2018-09-26 2020-03-26 Nxp Usa, Inc. Transistor, packaged device, and method of fabrication
US10672703B2 (en) 2018-09-26 2020-06-02 Nxp Usa, Inc. Transistor with shield structure, packaged device, and method of fabrication
US11410977B2 (en) 2018-11-13 2022-08-09 Analog Devices International Unlimited Company Electronic module for high power applications
US11211334B2 (en) 2018-11-18 2021-12-28 iCometrue Company Ltd. Logic drive based on chip scale package comprising standardized commodity programmable logic IC chip and memory IC chip
KR102530319B1 (en) * 2018-12-07 2023-05-09 삼성전자주식회사 Semiconductor devices having a conductive pillar and methods of manufacturing the same
KR102600963B1 (en) 2019-01-07 2023-11-13 삼성전자주식회사 Display apparatus
TWI694555B (en) * 2019-02-28 2020-05-21 鴻海精密工業股份有限公司 Chip packaging structure and method for manufacturing the same
CN111863772B (en) * 2019-04-29 2022-09-27 矽磐微电子(重庆)有限公司 Positioning method, packaging assembly and packaging structure
TWI744649B (en) * 2019-06-18 2021-11-01 鈺橋半導體股份有限公司 Wiring board having bridging element straddling over interfaces
US11367643B2 (en) 2019-06-28 2022-06-21 Applied Materials, Inc. Method for substrate registration and anchoring in inkjet printing
US11329003B2 (en) 2019-06-28 2022-05-10 Applied Materials, Inc. Anchoring dies using 3D printing to form reconstructed wafer
US11227838B2 (en) 2019-07-02 2022-01-18 iCometrue Company Ltd. Logic drive based on multichip package comprising standard commodity FPGA IC chip with cooperating or supporting circuits
US10985154B2 (en) 2019-07-02 2021-04-20 iCometrue Company Ltd. Logic drive based on multichip package comprising standard commodity FPGA IC chip with cryptography circuits
US11887930B2 (en) 2019-08-05 2024-01-30 iCometrue Company Ltd. Vertical interconnect elevator based on through silicon vias
US11637056B2 (en) 2019-09-20 2023-04-25 iCometrue Company Ltd. 3D chip package based on through-silicon-via interconnection elevator
US11164817B2 (en) 2019-11-01 2021-11-02 International Business Machines Corporation Multi-chip package structures with discrete redistribution layers
US11600526B2 (en) 2020-01-22 2023-03-07 iCometrue Company Ltd. Chip package based on through-silicon-via connector and silicon interconnection bridge
US11844178B2 (en) 2020-06-02 2023-12-12 Analog Devices International Unlimited Company Electronic component
KR20220000294A (en) 2020-06-25 2022-01-03 삼성전자주식회사 Semiconductor package
CN111883437B (en) * 2020-07-03 2023-04-25 矽磐微电子(重庆)有限公司 Semiconductor packaging method and semiconductor packaging structure
US11908831B2 (en) 2020-10-21 2024-02-20 Stmicroelectronics Pte Ltd Method for manufacturing a wafer level chip scale package (WLCSP)
US11854924B2 (en) * 2020-12-04 2023-12-26 Mediatek Inc. Semiconductor package with improved reliability
US20220328455A1 (en) * 2021-03-31 2022-10-13 Taiwan Semiconductor Manufacturing Company, Ltd. Vertical interconnect structures in three-dimensional integrated circuits
TWI823299B (en) * 2022-03-18 2023-11-21 邱志威 Method for manufacturing semiconductor structure with power rails under transistors and semiconductor structure with power rails under transistors
US20230108000A1 (en) * 2021-09-24 2023-04-06 Intel Corporation Topological crack stop (tcs) passivation layer

Family Cites Families (50)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5250843A (en) 1991-03-27 1993-10-05 Integrated System Assemblies Corp. Multichip integrated circuit modules
US5353498A (en) 1993-02-08 1994-10-11 General Electric Company Method for fabricating an integrated circuit module
US5872338A (en) 1996-04-10 1999-02-16 Prolinx Labs Corporation Multilayer board having insulating isolation rings
US5841193A (en) 1996-05-20 1998-11-24 Epic Technologies, Inc. Single chip modules, repairable multichip modules, and methods of fabrication thereof
US6833613B1 (en) 1997-12-18 2004-12-21 Micron Technology, Inc. Stacked semiconductor package having laser machined contacts
US6002169A (en) 1998-06-15 1999-12-14 Lsi Logic Corporation Thermally enhanced tape ball grid array package
US6586323B1 (en) * 2000-09-18 2003-07-01 Taiwan Semiconductor Manufacturing Company Method for dual-layer polyimide processing on bumping technology
US6423570B1 (en) 2000-10-18 2002-07-23 Intel Corporation Method to protect an encapsulated die package during back grinding with a solder metallization layer and devices formed thereby
TW495943B (en) 2001-04-18 2002-07-21 Siliconware Precision Industries Co Ltd Semiconductor package article with heat sink structure and its manufacture method
SG111919A1 (en) 2001-08-29 2005-06-29 Micron Technology Inc Packaged microelectronic devices and methods of forming same
US6750547B2 (en) * 2001-12-26 2004-06-15 Micron Technology, Inc. Multi-substrate microelectronic packages and methods for manufacture
TW200302685A (en) 2002-01-23 2003-08-01 Matsushita Electric Ind Co Ltd Circuit component built-in module and method of manufacturing the same
US7548430B1 (en) 2002-05-01 2009-06-16 Amkor Technology, Inc. Buildup dielectric and metallization process and semiconductor package
US6987031B2 (en) 2002-08-27 2006-01-17 Micron Technology, Inc. Multiple chip semiconductor package and method of fabricating same
DE102004022884B4 (en) 2004-05-06 2007-07-19 Infineon Technologies Ag Semiconductor device with a rewiring substrate and method of making the same
DE102005026098B3 (en) 2005-06-01 2007-01-04 Infineon Technologies Ag Benefit and semiconductor device made of a composite board with semiconductor chips and plastic housing composition and method for producing the same
FR2893764B1 (en) 2005-11-21 2008-06-13 St Microelectronics Sa STACKABLE SEMICONDUCTOR HOUSING AND METHOD FOR MANUFACTURING THE SAME
US8072059B2 (en) 2006-04-19 2011-12-06 Stats Chippac, Ltd. Semiconductor device and method of forming UBM fixed relative to interconnect structure for alignment of semiconductor die
DE102006019244B4 (en) 2006-04-21 2008-07-03 Infineon Technologies Ag Benefit and semiconductor device made of a composite board with semiconductor chips and plastic housing composition and method for producing the same
US8174119B2 (en) 2006-11-10 2012-05-08 Stats Chippac, Ltd. Semiconductor package with embedded die
JP2008166373A (en) 2006-12-27 2008-07-17 Nec Electronics Corp Semiconductor device and its manufacturing method
KR100809718B1 (en) 2007-01-15 2008-03-06 삼성전자주식회사 Stack type semiconductor chip package having different type of chips and fabrication method thereof
US8409920B2 (en) 2007-04-23 2013-04-02 Stats Chippac Ltd. Integrated circuit package system for package stacking and method of manufacture therefor
US20080284045A1 (en) 2007-05-18 2008-11-20 Texas Instruments Incorporated Method for Fabricating Array-Molded Package-On-Package
CN100530593C (en) * 2007-06-01 2009-08-19 日月光半导体制造股份有限公司 Method for cutting crystal wafer
TWI332790B (en) 2007-06-13 2010-11-01 Ind Tech Res Inst Image sensor module with a three-dimensional dies-stacking structure
US7944034B2 (en) 2007-06-22 2011-05-17 Texas Instruments Incorporated Array molded package-on-package having redistribution lines
US7619901B2 (en) 2007-06-25 2009-11-17 Epic Technologies, Inc. Integrated structures and fabrication methods thereof implementing a cell phone or other electronic system
KR101329355B1 (en) 2007-08-31 2013-11-20 삼성전자주식회사 stack-type semicondoctor package, method of forming the same and electronic system including the same
US7651889B2 (en) 2007-09-13 2010-01-26 Freescale Semiconductor, Inc. Electromagnetic shield formation for integrated circuit die package
US7834462B2 (en) 2007-09-17 2010-11-16 Qimonda Ag Electric device, stack of electric devices, and method of manufacturing a stack of electric devices
US7777351B1 (en) 2007-10-01 2010-08-17 Amkor Technology, Inc. Thin stacked interposer package
US20090212420A1 (en) 2008-02-22 2009-08-27 Harry Hedler integrated circuit device and method for fabricating same
US8101460B2 (en) 2008-06-04 2012-01-24 Stats Chippac, Ltd. Semiconductor device and method of shielding semiconductor die from inter-device interference
US8039303B2 (en) 2008-06-11 2011-10-18 Stats Chippac, Ltd. Method of forming stress relief layer between die and interconnect structure
KR20100009941A (en) 2008-07-21 2010-01-29 삼성전자주식회사 Semiconductor package having stepped molding compound with conductive via, method for formation of the same and stacked semiconductor package using the same
CA2676881C (en) 2008-09-30 2017-04-25 Wyeth Peripheral opioid receptor antagonists and uses thereof
US7952176B2 (en) 2008-12-09 2011-05-31 Stats Chippac Ltd. Integrated circuit packaging system and method of manufacture thereof
US9082806B2 (en) 2008-12-12 2015-07-14 Stats Chippac, Ltd. Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSP
US8012797B2 (en) 2009-01-07 2011-09-06 Advanced Semiconductor Engineering, Inc. Method for forming stackable semiconductor device packages including openings with conductive bumps of specified geometries
TWI499024B (en) 2009-01-07 2015-09-01 Advanced Semiconductor Eng Package-on-package device, semiconductor package and method for manufacturing the same
US9299648B2 (en) 2009-03-04 2016-03-29 Stats Chippac Ltd. Integrated circuit packaging system with patterned substrate and method of manufacture thereof
TWI570820B (en) 2009-06-09 2017-02-11 史達晶片有限公司 Semiconductor device and method of forming stress relief layer between die and interconnect structure
US7993976B2 (en) 2009-06-12 2011-08-09 Stats Chippac, Ltd. Semiconductor device and method of forming conductive vias with trench in saw street
US8367470B2 (en) 2009-08-07 2013-02-05 Stats Chippac, Ltd. Semiconductor device and method of forming cavity in build-up interconnect structure for short signal path between die
US8198131B2 (en) 2009-11-18 2012-06-12 Advanced Semiconductor Engineering, Inc. Stackable semiconductor device packages
US8241952B2 (en) 2010-02-25 2012-08-14 Stats Chippac, Ltd. Semiconductor device and method of forming IPD in fan-out level chip scale package
TWI411075B (en) 2010-03-22 2013-10-01 Advanced Semiconductor Eng Semiconductor package and manufacturing method thereof
US9082780B2 (en) 2012-03-23 2015-07-14 Stats Chippac, Ltd. Semiconductor device and method of forming a robust fan-out package including vertical interconnects and mechanical support layer
US9331007B2 (en) 2012-10-16 2016-05-03 Stats Chippac, Ltd. Semiconductor device and method of forming conductive ink layer as interconnect structure between semiconductor packages

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US9082806B2 (en) 2015-07-14
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US20150294962A1 (en) 2015-10-15

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