RU95107653A - Полупроводниковое запоминающее устройство с конденсаторами, образованными над и под транзистором ячейки памяти, и способ его изготовления - Google Patents

Полупроводниковое запоминающее устройство с конденсаторами, образованными над и под транзистором ячейки памяти, и способ его изготовления

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Publication number
RU95107653A
RU95107653A RU95107653/25A RU95107653A RU95107653A RU 95107653 A RU95107653 A RU 95107653A RU 95107653/25 A RU95107653/25 A RU 95107653/25A RU 95107653 A RU95107653 A RU 95107653A RU 95107653 A RU95107653 A RU 95107653A
Authority
RU
Russia
Prior art keywords
transistor
level
formed above
manufacturing process
capacitors formed
Prior art date
Application number
RU95107653/25A
Other languages
English (en)
Other versions
RU2194338C2 (ru
Inventor
Янг Ли Джоо
Kr]
Original Assignee
Самсунг электроникс Ко.Лтд. (KR)
Самсунг электроникс Ко.Лтд.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Самсунг электроникс Ко.Лтд. (KR), Самсунг электроникс Ко.Лтд. filed Critical Самсунг электроникс Ко.Лтд. (KR)
Publication of RU95107653A publication Critical patent/RU95107653A/ru
Application granted granted Critical
Publication of RU2194338C2 publication Critical patent/RU2194338C2/ru

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/33—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor extending under the transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/036—Making the capacitor or connections thereto the capacitor extending under the transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/318—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor the storage electrode having multiple segments
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0688—Integrated circuits having a three-dimensional layout
    • H01L27/0694—Integrated circuits having a three-dimensional layout comprising components formed on opposite sides of a semiconductor substrate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/928—Front and rear surface processing

Abstract

Сущность изобретения: полупроводниковое запоминающее устройство с конденсаторами, образованными над и под транзистором ячейки памяти, содержит первый и второй транзисторы, образованные на первом уровне, первым электрод хранения, соединенный с первым транзистором и выполненный под первых уровнем, и второй электрод хранения, соединенный со вторым транзистором и выполненный над первым уровнем. Первый и второй электроды хранения соединены с каждым истоком через прокладку, образованную на боковых стенках каждого истока, и между электродами хранения и транзистором выполнены подтравливания, что позволяет увеличить емкость вдвое или больше, достичь стабильной характеристики транзистора ячейки памяти и уменьшить эффекты укорачивания канатов.

Claims (1)

  1. Сущность изобретения: полупроводниковое запоминающее устройство с конденсаторами, образованными над и под транзистором ячейки памяти, содержит первый и второй транзисторы, образованные на первом уровне, первым электрод хранения, соединенный с первым транзистором и выполненный под первых уровнем, и второй электрод хранения, соединенный со вторым транзистором и выполненный над первым уровнем. Первый и второй электроды хранения соединены с каждым истоком через прокладку, образованную на боковых стенках каждого истока, и между электродами хранения и транзистором выполнены подтравливания, что позволяет увеличить емкость вдвое или больше, достичь стабильной характеристики транзистора ячейки памяти и уменьшить эффекты укорачивания канатов.
RU95107653/28A 1994-05-13 1995-05-12 Полупроводниковое запоминающее устройство с конденсаторами, образованными над и под транзистором ячейки памяти (варианты), и способ его изготовления RU2194338C2 (ru)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR94-10487 1994-05-13
KR1019940010487A KR0135803B1 (ko) 1994-05-13 1994-05-13 상.하로 분리된 커패시터를 갖는 반도체 메모리장치 및 그 제조방법

Publications (2)

Publication Number Publication Date
RU95107653A true RU95107653A (ru) 1997-05-10
RU2194338C2 RU2194338C2 (ru) 2002-12-10

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
RU95107653/28A RU2194338C2 (ru) 1994-05-13 1995-05-12 Полупроводниковое запоминающее устройство с конденсаторами, образованными над и под транзистором ячейки памяти (варианты), и способ его изготовления

Country Status (8)

Country Link
US (2) US5684316A (ru)
EP (1) EP0682372B1 (ru)
JP (1) JP3571108B2 (ru)
KR (1) KR0135803B1 (ru)
CN (1) CN1092403C (ru)
DE (1) DE69523091T2 (ru)
RU (1) RU2194338C2 (ru)
TW (1) TW271010B (ru)

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Also Published As

Publication number Publication date
JP3571108B2 (ja) 2004-09-29
CN1092403C (zh) 2002-10-09
TW271010B (ru) 1996-02-21
DE69523091T2 (de) 2002-07-11
KR0135803B1 (ko) 1998-04-24
RU2194338C2 (ru) 2002-12-10
EP0682372A1 (en) 1995-11-15
US5661063A (en) 1997-08-26
EP0682372B1 (en) 2001-10-10
KR950034443A (ko) 1995-12-28
JPH0846157A (ja) 1996-02-16
DE69523091D1 (de) 2001-11-15
CN1113610A (zh) 1995-12-20
US5684316A (en) 1997-11-04

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MM4A The patent is invalid due to non-payment of fees

Effective date: 20090513