KR970060467A - 반도체장치 - Google Patents

반도체장치 Download PDF

Info

Publication number
KR970060467A
KR970060467A KR1019960012309A KR19960012309A KR970060467A KR 970060467 A KR970060467 A KR 970060467A KR 1019960012309 A KR1019960012309 A KR 1019960012309A KR 19960012309 A KR19960012309 A KR 19960012309A KR 970060467 A KR970060467 A KR 970060467A
Authority
KR
South Korea
Prior art keywords
metal line
semiconductor device
semiconductor chip
pads
semiconductor
Prior art date
Application number
KR1019960012309A
Other languages
English (en)
Other versions
KR100211604B1 (ko
Inventor
쯔또무 아시다
Original Assignee
쯔지 하루오
샤프 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 쯔지 하루오, 샤프 가부시끼가이샤 filed Critical 쯔지 하루오
Publication of KR970060467A publication Critical patent/KR970060467A/ko
Application granted granted Critical
Publication of KR100211604B1 publication Critical patent/KR100211604B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Geometry or layout of the interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118—Masterslice integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01022—Titanium [Ti]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19043—Component type being a resistor

Abstract

본 발명의 반도체장치는 반도체 기판, 절연막, 필드 산화막 및 그의 표면에 형성된 패드들을 갖는 반도체칩; 상기 패드들위에 각각 형성된 범프들; 범프들을 개재하여 상기 반도체칩에 본딩된 이너 리드들; 상기 반도체칩의 절연막 및/또는 필드 산화막의 일부를 제거하여 패드들과 상기 반도체칩의 에지간에 형성된 요부에 형성된 금속배선; 및 상기 각 패드와 금속배선간 및 상기 금속배선과 상기 칩의 에지간에 상기 금속배선과 일정간격을 갖고 상기 금속배선보다 높은 위치에 각각 형성된 한쌍의 더미전극을 포함하며, 상기 한쌍의 더미전극은 그위에 위치된 이너 리드마다 제공되어 있다.

Description

반도체장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 반도체칩과 이너 리드(inner lead)간의 접속상태를 보인 개략 평면도.
제2도는 제1도의 A-A′선의 개략 단면도(2층 더미전극 구조를 갖는 반도체칩의 경우).

Claims (5)

  1. 반도체 기판, 절연막, 필드 산화막 및 그의 표면에 형성된 패드들을 갖는 반도체칩; 상기 패드들위에 각각 형성된 범프들; 범프들을 개재하여 상기 반도체칩에 본딩된 이너 리드들; 상기 반도체칩의 절연막 및/또는 필드 산화막의 일부를 제거하여 패드들과 상기 반도체칩의 에지간에 형성된 요부에 형성된 금속배선; 및 상기 각 패드와 금속배선간 및 상기 금속배선과 상기 칩의 에지간에 상기 금속배선과 일정간격을 갖고 상기 금속배선보다 높은 위치에 각각 형성된 한쌍의 더미전극을 포함하며, 상기 한쌍의 더미전극은 그위에 위치된 이너 리드마다 제공되어 있는 반도체장치.
  2. 제1항에 있어서, 상기 금속 배선은 요부내의 반도체 기판상에 직접 형성되어 있는 반도체장치.
  3. 제1항에 있어서, 상기 더미전극이 1층 또는 2층구조의 상태로 형성되어 있는 반도체장치.
  4. 제1항에 있어서, 상기 더미전극이 약 200㎚ 내지 1000㎚의 두께와 약 0.2㎛ 내지 10㎛의 폭으로 금속 배선의 형성과 동시에 형성되는 막인 반도체장치.
  5. 제1항에 있어서, 상기 더미전극이 상기 금속 배선의 형성과 동시에 형성되는 막인 반도체장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019960012309A 1996-01-26 1996-04-23 반도체 장치 KR100211604B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP01212196A JP3207347B2 (ja) 1996-01-26 1996-01-26 半導体装置
JP96-12121 1996-01-26

Publications (2)

Publication Number Publication Date
KR970060467A true KR970060467A (ko) 1997-08-12
KR100211604B1 KR100211604B1 (ko) 1999-08-02

Family

ID=11796722

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960012309A KR100211604B1 (ko) 1996-01-26 1996-04-23 반도체 장치

Country Status (5)

Country Link
US (1) US5659202A (ko)
JP (1) JP3207347B2 (ko)
KR (1) KR100211604B1 (ko)
CN (1) CN1065663C (ko)
TW (1) TW305068B (ko)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW388912B (en) * 1996-04-22 2000-05-01 Toshiba Corp Semiconductor device and method of manufacturing the same
KR0183898B1 (ko) * 1996-06-28 1999-04-15 김광호 반도체장치 및 이를 이용한 콘택홀 형성방법
KR100272166B1 (ko) * 1998-06-30 2000-11-15 윤종용 소자분리영역에 형성된 더미 도전층을 갖춘반도체소자 및 그제조방법
DE19834234C2 (de) * 1998-07-29 2000-11-30 Siemens Ag Integrierter Halbleiterchip mit Füllstrukturen
US6146984A (en) * 1999-10-08 2000-11-14 Agilent Technologies Inc. Method and structure for uniform height solder bumps on a semiconductor wafer
US6096649A (en) * 1999-10-25 2000-08-01 Taiwan Semiconductor Manufacturing Company Top metal and passivation procedures for copper damascene structures
KR100408414B1 (ko) 2001-06-20 2003-12-06 삼성전자주식회사 반도체 소자 및 그 제조방법
KR100390044B1 (ko) * 2001-06-27 2003-07-04 주식회사 하이닉스반도체 패드 패턴 형성 방법
JP4944402B2 (ja) * 2005-07-13 2012-05-30 ルネサスエレクトロニクス株式会社 半導体装置
CN103098191B (zh) * 2010-12-01 2015-08-19 松下电器产业株式会社 电子元器件安装体、电子元器件及基板
US8476629B2 (en) * 2011-09-27 2013-07-02 Taiwan Semiconductor Manufacturing Company, Ltd. Enhanced wafer test line structure
CN109935548B (zh) * 2017-12-19 2020-12-22 中芯国际集成电路制造(上海)有限公司 半导体器件及其形成方法
KR20200116577A (ko) * 2019-04-01 2020-10-13 삼성디스플레이 주식회사 표시 장치 및 그 제조 방법

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6079744A (ja) * 1983-10-05 1985-05-07 Nec Corp 半導体装置
JPH01152644A (ja) * 1987-12-09 1989-06-15 Sharp Corp 半導体装置
JPH01303742A (ja) * 1988-05-31 1989-12-07 Nec Corp 半導体装置
JPH02260425A (ja) * 1989-03-30 1990-10-23 Toppan Printing Co Ltd 電気素子及び電気素子の製造方法
JPH03169073A (ja) * 1989-11-29 1991-07-22 Hitachi Ltd 半導体集積回路装置
JPH03190236A (ja) * 1989-12-20 1991-08-20 Mitsubishi Electric Corp Ｍｏｓ集積回路
JPH03263325A (ja) * 1990-03-13 1991-11-22 Mitsubishi Electric Corp 半導体装置
JPH03274764A (ja) * 1990-03-26 1991-12-05 Hitachi Ltd 半導体集積回路装置
JP3186084B2 (ja) * 1991-05-24 2001-07-11 日本電気株式会社 半導体メモリー装置
JPH0677223A (ja) * 1991-09-30 1994-03-18 Nec Corp 樹脂封止型半導体装置
JP2762844B2 (ja) * 1992-06-10 1998-06-04 日本電気株式会社 半導体装置
JPH0616329A (ja) * 1992-07-01 1994-01-25 Mita Ind Co Ltd 画像形成装置の記録紙収納装置
JPH0697300A (ja) * 1992-09-10 1994-04-08 Mitsubishi Electric Corp 半導体集積回路の配線間構造

Also Published As

Publication number Publication date
KR100211604B1 (ko) 1999-08-02
CN1065663C (zh) 2001-05-09
CN1156335A (zh) 1997-08-06
US5659202A (en) 1997-08-19
JPH09205114A (ja) 1997-08-05
JP3207347B2 (ja) 2001-09-10
TW305068B (en) 1997-05-11

Similar Documents

Publication Publication Date Title
KR950007059A (ko) 집적 회로
KR960039239A (ko) 반도체 장치
KR970060467A (ko) 반도체장치
CA2159242A1 (en) Process for Manufacturing Semiconductor Device and Semiconductor Wafer
KR950030242A (ko) 반도체장치와 그 제조방법
WO2004015771A3 (en) Semiconductor device and method of manufacturing the same
KR950701769A (ko) 반도체 장치(Semiconductor device)
KR960012334A (ko) 반도체 칩 커프 소거 방법 및 그에 따른 반도체 칩과 이로부터 형성된 전자 모듈
KR960019629A (ko) 반도체 장치
KR830004676A (ko) 회로 패키지들의 제조방법
KR920010872A (ko) 멀티칩 모듈
KR920020618A (ko) 반도체 장치의 배선 접속 구조 및 그 제조방법
KR960039426A (ko) 전계효과에 의해 제어가능한 반도체소자
KR920001697A (ko) 수직형 반도체 상호 접촉 방법 및 그 구조
KR970003929A (ko) 반도체장치
KR910013524A (ko) 반도체집적회로장치
KR880005685A (ko) 혼성집적회로
KR970072381A (ko) 이에스디(esd) 보호회로의 구조 및 제조방법
KR910003783A (ko) 반도체장치 및 그 제조방법
KR930020590A (ko) 알루미늄을 주성분으로 하는 금속박막의 에칭방법 및 박막트랜지스터의 제조방법
EP0448713A4 (en) SEMICONDUCTOR ARRANGEMENT.
KR970059789A (ko) 액정 표시 장치의 전극배선 형성방법
KR970072343A (ko) 테이프 캐리어 패키지 및 이 테이프 캐리어 패키지를 포함하는 액정표시장치
KR900015279A (ko) 칩 캐리어
KR100508022B1 (ko) 반사형 액정 표시 장치용 박막 트랜지스터 기판 및 그 제조 방법

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20100427

Year of fee payment: 12

LAPS Lapse due to unpaid annual fee