KR930016880A - 전자장치 및 그것의 고정정보 수정방법 - Google Patents

전자장치 및 그것의 고정정보 수정방법 Download PDF

Info

Publication number
KR930016880A
KR930016880A KR1019930000467A KR930000467A KR930016880A KR 930016880 A KR930016880 A KR 930016880A KR 1019930000467 A KR1019930000467 A KR 1019930000467A KR 930000467 A KR930000467 A KR 930000467A KR 930016880 A KR930016880 A KR 930016880A
Authority
KR
South Korea
Prior art keywords
address control
fixed memory
access
discriminating
address
Prior art date
Application number
KR1019930000467A
Other languages
English (en)
Other versions
KR100307857B1 (ko
Inventor
이와오 야마모또
가쯔미 마쯔노
Original Assignee
오오가 노리오
소니 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 오오가 노리오, 소니 가부시끼가이샤 filed Critical 오오가 노리오
Publication of KR930016880A publication Critical patent/KR930016880A/ko
Application granted granted Critical
Publication of KR100307857B1 publication Critical patent/KR100307857B1/ko

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/60Software deployment
    • G06F8/65Updates
    • G06F8/66Updates of program code stored in read-only memory [ROM]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/328Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for runtime instruction patching
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3861Recovery, e.g. branch miss-prediction, exception handling

Abstract

끼워넣기 처리중에도 수정을 할 수 있도록 한다.
전자장치(10)에는 CPU1,RON2, RAM3 및 입력수단(4), 다시 데이타 버스(5) 및 어드레스 버스(6)가 설치된다. 또한 수정할 곳의 어드레스의 레지스터(7)와 수정 끼워넣기 벡터의 레지스터(8)가 설치되어, 이들이 데이타 버스(5)에 접속된다.
다시 이 레지스터(7)에 기억된 어드레스와 어드레스 버스(6)의 어드레스와 일치를 검출하는 비교기(9)의 출력부가 CPU1의 끼워넣기 제어부 X에 접속된다. CPU1에는, 다른 처리로부터의 끼워넣기 제어부 A,B,C...로 설치되어 있다, 다시 입력수단(4)에는 외부기억장치(20)가 접속되어, 이 외부기억장치(20)로 부터의 주프로그램의 불비를 수정하기 위한 정보는 입력수단(4)을 통해서 RAM3에 기억됨과 함께, 이 RAM3에 레지스터(7및 8)에 기입된 데이타를 퇴피시키는 스택 에어리어(32)가 설치된다.

Description

전자장치 및 그것의 고정정보 수정방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 의한 전자장치의 한 예의 구성도, 제4도는 동작의 설명을 위한 도면.

Claims (2)

  1. 정보가 고정적으로 기억된 고정기억의 수단과, 어드레스 제어를 하는 어드레스 제어수단과, 외부로부터의 정보가 입력되는 입력수단과, 이 입력수단을 거쳐서 외부에서 입력되는 상기 고정기억수단에 기억된 정보의 변경부분에 관한 수정정보가 기억되는 수정정보 기억수단과, 상기 고정기억수단의 변경부분으로의 상기 어드레스 제어수단에 의한 액세스를 판별하는 판별수단과, 이 판별수단으로부터의 신호에 의해 상기한 액세스를 상기 고정기억수단에서 상기 수정정보 기억수단으로의 절환수단을 일체로 집적한 전자장치에 있어서, 상기 어드레스 제어수단으로 끼워넣는 처리가 행해졌을때에 상기 어드레스 제어수단에 의한 상기 고정기억수단의 변경부분으로의 액세스를 판별하는 판별데이타를 퇴피하는 스택메모리를 설치해 끼워넣는 처리중의 상기 고정기억수단의 변경 부분으로서의 액세스를 판별하는 판별 데이타를 상기 판별수단에 설정할 수 있도록 한 것을 특징으로 하는 전자장치.
  2. 정보가 고정적으로 기억된 고정기억 수단과, 어드레스 제어를 하는 어드레스 제어수단과, 외부로부터의 정보가 입력되는 입력수단과, 이 입력수단을 거쳐서 외부에서 입력되는 상기 고정기억수단에 기억된 정보의 변경 부분에 관한 수정정보가 기억되는 수정정보 기억수단과, 상기 고정기억수단의 변경부분으로서의 상기 어드레스 제어수단에 의한 액세스를 판별하는 판별수단과, 이 판별수단으로부터의 신호에 의해 상기한 액세스를 상기 고정 기억수단에서 상기 수정정보 기억수단으로의 절환 수단을 일체로 집적한 전자장치에 대해서, 상기 어드레스 제어수단에 대한 끼워넣기 처리의 최초에, 상기 어드레스 제어수단에 의한 상기 고정기억수단의 변경부분으로의 액세스를 판별하는 판별데이타를 퇴피하는 스택메모리를 퇴피시키는 스텝과, 끼워넣기 처리중의 상기 고정기억수단의 판별수단에 설정하는 스텝을 설치한 것을 특징으로 하는 전자장치의 고정정보 수정방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019930000467A 1992-01-24 1993-01-15 전자장치 KR100307857B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP01120692A JP3230262B2 (ja) 1992-01-24 1992-01-24 電子装置及びその固定情報修正方法
JP92-011206 1992-01-24

Publications (2)

Publication Number Publication Date
KR930016880A true KR930016880A (ko) 1993-08-30
KR100307857B1 KR100307857B1 (ko) 2001-11-30

Family

ID=11771541

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019930000467A KR100307857B1 (ko) 1992-01-24 1993-01-15 전자장치

Country Status (6)

Country Link
US (1) US6128751A (ko)
EP (1) EP0553733B1 (ko)
JP (1) JP3230262B2 (ko)
KR (1) KR100307857B1 (ko)
CA (1) CA2087696A1 (ko)
DE (1) DE69331292T2 (ko)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH089435A (ja) * 1994-06-15 1996-01-12 Nec Corp 選択呼出受信機
GB2292470A (en) * 1994-08-19 1996-02-21 Advanced Risc Mach Ltd Rom patching
GB2309324B (en) * 1996-01-17 2000-09-06 Motorola Inc Method for storing repair data in a micro processor system
JP2867965B2 (ja) * 1996-06-28 1999-03-10 日本電気株式会社 データ処理装置及びデータ処理方法
US6009540A (en) * 1997-04-08 1999-12-28 Aitm Associates Incorporated Logic module for implementing system changes on PC architecture computers
FR2764407B1 (fr) * 1997-06-05 1999-07-30 Alsthom Cge Alcatel Dispositif de retouche de programme de commande dans un processeur
JP2001184203A (ja) * 1999-12-24 2001-07-06 Matsushita Electric Ind Co Ltd プログラム修正装置
JP2001256044A (ja) * 2000-03-14 2001-09-21 Sony Corp データ処理装置
GB2373888A (en) * 2001-03-30 2002-10-02 Toshiba Res Europ Ltd Dynamic vector address allocation for a code patching scheme
US20040015939A1 (en) * 2001-05-16 2004-01-22 Cheah Jonathon Y. Updateable memory module
US6925521B2 (en) * 2001-09-10 2005-08-02 Texas Instruments Incorporated Scheme for implementing breakpoints for on-chip ROM code patching
AU2003278342A1 (en) 2002-11-18 2004-06-15 Arm Limited Security mode switching via an exception vector
GB2402785B (en) 2002-11-18 2005-12-07 Advanced Risc Mach Ltd Processor switching between secure and non-secure modes
JP2004213102A (ja) * 2002-12-26 2004-07-29 Fujitsu Ltd マイクロコンピュータ
US7269707B2 (en) * 2003-01-10 2007-09-11 Texas Instruments Incorporated Multiple patches to on-chip ROM in a processor with a multilevel memory system without affecting performance
US7596721B1 (en) * 2004-01-09 2009-09-29 Maxtor Corporation Methods and structure for patching embedded firmware
US7464248B2 (en) 2005-04-25 2008-12-09 Mediatek Incorporation Microprocessor systems and bus address translation methods
US7533240B1 (en) * 2005-06-01 2009-05-12 Marvell International Ltd. Device with mapping between non-programmable and programmable memory
US7526578B2 (en) * 2006-02-17 2009-04-28 International Business Machines Corporation Option ROM characterization
EP1983429A1 (fr) * 2007-04-19 2008-10-22 Proton World International N.V. Implémentation de programmes correctifs par une unité de traitement
CN101334760B (zh) * 2007-06-26 2010-04-07 展讯通信(上海)有限公司 监控总线非法操作的方法、装置及包含该装置的系统
US8156486B2 (en) * 2008-10-29 2012-04-10 Mediatek Inc. Patching devices and methods thereof for patching firmware functions
CN103268237A (zh) * 2013-05-10 2013-08-28 东信和平科技股份有限公司 一种掩膜智能卡的补丁功能扩展方法及装置
US9547489B2 (en) * 2014-03-31 2017-01-17 Qualcomm Incorporated System and method for modifying a sequence of instructions in a read-only memory of a computing device

Family Cites Families (51)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4150428A (en) * 1974-11-18 1979-04-17 Northern Electric Company Limited Method for providing a substitute memory in a data processing system
JPS5721799B2 (ko) * 1975-02-01 1982-05-10
JPS5245232A (en) * 1975-10-08 1977-04-09 Hitachi Ltd Micro program modification circuit
US4028684A (en) * 1975-10-16 1977-06-07 Bell Telephone Laboratories, Incorporated Memory patching circuit with repatching capability
US4028678A (en) * 1975-10-16 1977-06-07 Bell Telephone Laboratories, Incorporated Memory patching circuit
US4028683A (en) * 1975-10-16 1977-06-07 Bell Telephone Laboratories, Incorporated Memory patching circuit with counter
US4218757A (en) * 1978-06-29 1980-08-19 Burroughs Corporation Device for automatic modification of ROM contents by a system selected variable
US4291375A (en) * 1979-03-30 1981-09-22 Westinghouse Electric Corp. Portable programmer-reader unit for programmable time registering electric energy meters
US4296470A (en) * 1979-06-21 1981-10-20 International Business Machines Corp. Link register storage and restore system for use in an instruction pre-fetch micro-processor interrupt system
JPS56136054A (en) * 1980-03-26 1981-10-23 Hitachi Ltd Function assigning circuit
US4319343A (en) * 1980-07-16 1982-03-09 Honeywell Inc. Programmable digital memory circuit
US4456966A (en) * 1981-02-26 1984-06-26 International Business Machines Corporation Memory system with flexible replacement units
JPS57150019A (en) * 1981-03-13 1982-09-16 Hitachi Ltd Control system of terminal device
JPS57196357A (en) * 1981-05-29 1982-12-02 Toshiba Corp Data processor
JPS57211651A (en) * 1981-06-23 1982-12-25 Toshiba Corp Patch system
US4490783A (en) * 1981-07-02 1984-12-25 Texas Instruments Incorporated Microcomputer with self-test of microcode
US4400798A (en) * 1981-07-13 1983-08-23 Tektronix, Inc. Memory patching system
JPS5816350A (ja) * 1981-07-22 1983-01-31 Toshiba Corp メモリ拡張代替方式
JPS5886648A (ja) * 1981-11-18 1983-05-24 Mitsubishi Electric Corp トレ−ス装置
US4542453A (en) * 1982-02-19 1985-09-17 Texas Instruments Incorporated Program patching in microcomputer
US4490812A (en) * 1982-09-30 1984-12-25 Mostek Corporation User reprogrammable programmed logic array
US4819154A (en) * 1982-12-09 1989-04-04 Sequoia Systems, Inc. Memory back up system with one cache memory and two physically separated main memories
US4607332A (en) * 1983-01-14 1986-08-19 At&T Bell Laboratories Dynamic alteration of firmware programs in Read-Only Memory based systems
US4769767A (en) * 1984-01-03 1988-09-06 Ncr Corporation Memory patching system
US4610000A (en) * 1984-10-23 1986-09-02 Thomson Components-Mostek Corporation ROM/RAM/ROM patch memory circuit
FR2573227B1 (fr) * 1984-11-09 1987-01-30 Palais Decouverte Dispositif de simulation et de securite pour clavier de saisie de donnees
US4745572A (en) * 1985-11-04 1988-05-17 Step Engineering Software editing instrument
US4709324A (en) * 1985-11-27 1987-11-24 Motorola, Inc. Data processor control unit having an interrupt service using instruction prefetch redirection
JPS62249231A (ja) * 1986-04-23 1987-10-30 Pfu Ltd マイクロプログラム制御処理方式
DE3687235T2 (de) * 1986-06-09 1993-08-12 Securicrypto Ab Einrichtung zur verschluesselung und zur entschluesselung.
US4751703A (en) * 1986-09-16 1988-06-14 International Business Machines Corp. Method for storing the control code of a processor allowing effective code modification and addressing circuit therefor
US4831517A (en) * 1986-10-10 1989-05-16 International Business Machines Corporation Branch and return on address instruction and methods and apparatus for implementing same in a digital data processing system
US4802119A (en) * 1987-03-17 1989-01-31 Motorola, Inc. Single chip microcomputer with patching and configuration controlled by on-board non-volatile memory
US4942541A (en) * 1988-01-22 1990-07-17 Oms, Inc. Patchification system
JPS6465633A (en) * 1987-09-07 1989-03-10 Hitachi Ltd Microprogram controller
JP3023425B2 (ja) * 1987-10-09 2000-03-21 株式会社日立製作所 データ処理装置
JPH0199129A (ja) * 1987-10-12 1989-04-18 Fujitsu Ltd マイクロプログラム修正方式
JPH01114941A (ja) * 1987-10-28 1989-05-08 Fujitsu Ltd プログラム修正方式
JPH01232447A (ja) * 1988-03-11 1989-09-18 Mitsubishi Electric Corp シングル・チップ・マイクロコンピュータ
JPH01286029A (ja) * 1988-05-13 1989-11-17 Nec Corp マイクロプログラムのパッチ方式
US4905200A (en) * 1988-08-29 1990-02-27 Ford Motor Company Apparatus and method for correcting microcomputer software errors
US5063499A (en) * 1989-01-09 1991-11-05 Connectix, Inc. Method for a correlating virtual memory systems by redirecting access for used stock instead of supervisor stock during normal supervisor mode processing
EP0393290B1 (en) * 1989-04-19 1995-08-16 International Business Machines Corporation Memory and peripheral chip select apparatus
JPH03142629A (ja) * 1989-10-30 1991-06-18 Toshiba Corp マイクロコントローラ
GB9011679D0 (en) * 1990-05-24 1990-07-11 Schlumberger Ind Ltd Mask-programmable microprocessors
US5199032A (en) * 1990-09-04 1993-03-30 Motorola, Inc. Microcontroller having an EPROM with a low voltage program inhibit circuit
US5408672A (en) * 1991-11-18 1995-04-18 Matsushita Electric Industrial Co. Microcomputer having ROM to store a program and RAM to store changes to the program
US5623665A (en) * 1992-01-13 1997-04-22 Sony Corporation Electronic apparatus for patching a read-only memory
JPH06318261A (ja) * 1992-09-18 1994-11-15 Sony Corp 電子装置
JP3284614B2 (ja) * 1992-09-19 2002-05-20 ソニー株式会社 電子装置
JP3810805B2 (ja) * 1992-09-19 2006-08-16 ソニー株式会社 情報修正システム

Also Published As

Publication number Publication date
EP0553733A3 (en) 1997-10-15
EP0553733A2 (en) 1993-08-04
EP0553733B1 (en) 2001-12-12
JPH05204630A (ja) 1993-08-13
JP3230262B2 (ja) 2001-11-19
US6128751A (en) 2000-10-03
KR100307857B1 (ko) 2001-11-30
CA2087696A1 (en) 1993-07-25
DE69331292D1 (de) 2002-01-24
DE69331292T2 (de) 2002-06-13

Similar Documents

Publication Publication Date Title
KR930016880A (ko) 전자장치 및 그것의 고정정보 수정방법
US5680581A (en) Microcomputer having a read protection circuit to secure the contents of an internal memory
EP0725333B1 (en) Control system for processor
US5287483A (en) Prefetched operand storing system for an information processor
JPS5938677B2 (ja) 制御ワ−ド転送制御装置
US5333288A (en) Effective address pre-calculation type pipelined microprocessor
KR960012354B1 (ko) 마이크로 프로세서
US7779236B1 (en) Symbolic store-load bypass
KR940007701A (ko) 전자 장치
JPH05216721A (ja) 電子計算機
KR970007620A (ko) 다수의 버스를 서로 독립적으로 제어하기 위한 버스 콘트롤러를 가진 데이터 처리기
JP2607319B2 (ja) プログラマブルコントローラ
JPS63156231A (ja) リ−ドオンリ−メモリ内命令の変更方法
JPH05100903A (ja) アドレストレーサ
JP2658342B2 (ja) データ処理装置
JP3476314B2 (ja) マイクロプロセッサ
JPS6310234A (ja) 割込み処理装置
JPH01205340A (ja) データ処理装置
JPH07271553A (ja) Fifoメモリ装置のメモリ制御方法
JP3366235B2 (ja) データ読み出し制御装置
JPS63165931A (ja) 不連続命令フエツチアドレス情報記憶方式
JPS57162186A (en) Patrol controlling system of main memory
JPS60169947A (ja) プログラム異常検知装置
JPS62232035A (ja) 命令先取り制御方式
JPH0635750A (ja) 半導体集積回路装置

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20080725

Year of fee payment: 8

LAPS Lapse due to unpaid annual fee