KR920001541A - 반도체 집적 회로장치 - Google Patents

반도체 집적 회로장치 Download PDF

Info

Publication number
KR920001541A
KR920001541A KR1019910009729A KR910009729A KR920001541A KR 920001541 A KR920001541 A KR 920001541A KR 1019910009729 A KR1019910009729 A KR 1019910009729A KR 910009729 A KR910009729 A KR 910009729A KR 920001541 A KR920001541 A KR 920001541A
Authority
KR
South Korea
Prior art keywords
power supply
semiconductor integrated
integrated circuit
circuit device
supply voltage
Prior art date
Application number
KR1019910009729A
Other languages
English (en)
Other versions
KR0133942B1 (ko
Inventor
수지 무라가미
가즈야스 후지시마
Original Assignee
시기 모리야
미쓰비시 뎅끼 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 시기 모리야, 미쓰비시 뎅끼 가부시끼가이샤 filed Critical 시기 모리야
Publication of KR920001541A publication Critical patent/KR920001541A/ko
Application granted granted Critical
Publication of KR0133942B1 publication Critical patent/KR0133942B1/ko

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/46Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/462Regulating voltage or current wherein the variable actually regulated by the final control device is dc as a function of the requirements of the load, e.g. delay, temperature, specific voltage/current characteristic
    • G05F1/465Internal voltage generators for integrated circuits, e.g. step down generators
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is dc
    • G05F3/10Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/24Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Power Engineering (AREA)
  • Nonlinear Science (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)

Abstract

내용 없음

Description

반도체 집적 회로장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 이 발명의 한실시예의 구성을 표시하는 개략 블럭도,
제4도는 제1도에 표시하는 내부강압회로의 또다른 예를 표시하는 회로도.

Claims (1)

  1. 외부전원으로부터 주어진 전원전압이 강압되어 내부의 주회로에 주어지고 또한 액티브모드와 스탠바이 모드와를 반도체집적회로 장치이고, 상기 외부전원으로부터 주어지는 전원전압을 강압하기 위한 내부가압수단, 상기 스탠바이모드에 있어서, 상기 내부강압수단을 비활성상태로 하기 위한 비활성수단 및, 상기 스탠바이모드에 있어서 상기 외부전원으로부터 주어지는 전원전압을 상기 주회로에 직접 인가하기 위한 전원전압인가 수단을 구비하는 반도체 집적회로장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019910009729A 1990-06-14 1991-06-13 반도체 집적 회로장치 KR0133942B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP90-157902 1990-06-14
JP2157902A JPH0447591A (ja) 1990-06-14 1990-06-14 半導体集積回路装置

Publications (2)

Publication Number Publication Date
KR920001541A true KR920001541A (ko) 1992-01-30
KR0133942B1 KR0133942B1 (ko) 1998-04-20

Family

ID=15659931

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910009729A KR0133942B1 (ko) 1990-06-14 1991-06-13 반도체 집적 회로장치

Country Status (4)

Country Link
US (1) US5189316A (ko)
EP (1) EP0461788A3 (ko)
JP (1) JPH0447591A (ko)
KR (1) KR0133942B1 (ko)

Families Citing this family (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2797761B2 (ja) * 1991-07-11 1998-09-17 日本電気株式会社 パワーオン回路
KR930008886B1 (ko) * 1991-08-19 1993-09-16 삼성전자 주식회사 전기적으로 프로그램 할 수 있는 내부전원 발생회로
JP2838344B2 (ja) * 1992-10-28 1998-12-16 三菱電機株式会社 半導体装置
US5315167A (en) * 1992-04-09 1994-05-24 International Business Machines Corporation Voltage burn-in scheme for BICMOS circuits
JPH05314769A (ja) * 1992-05-13 1993-11-26 Mitsubishi Electric Corp 半導体集積回路装置
JP3318365B2 (ja) * 1992-10-20 2002-08-26 富士通株式会社 定電圧回路
US5448156A (en) * 1993-09-02 1995-09-05 Texas Instruments Incorporated Low power voltage regulator
US5469076A (en) * 1993-10-20 1995-11-21 Hewlett-Packard Corporation Static current testing apparatus and method for current steering logic (CSL)
JP4036487B2 (ja) * 1995-08-18 2008-01-23 株式会社ルネサステクノロジ 半導体記憶装置、および半導体回路装置
JP3629308B2 (ja) * 1995-08-29 2005-03-16 株式会社ルネサステクノロジ 半導体装置およびその試験方法
US6147541A (en) * 1996-10-02 2000-11-14 Endress + Hauser Gmbh + Co. Monolithic MOS-SC circuit
FR2755804B1 (fr) * 1996-11-08 1999-01-29 Sgs Thomson Microelectronics Mise en veille d'un regulateur lineaire
JP3080015B2 (ja) * 1996-11-19 2000-08-21 日本電気株式会社 レギュレータ内蔵半導体集積回路
US5719525A (en) * 1997-01-09 1998-02-17 Vlsi Technology, Inc. Enhanced voltage tracking circuit for high voltage tolerant buffers
US5963050A (en) 1997-02-26 1999-10-05 Xilinx, Inc. Configurable logic element with fast feedback paths
US5942913A (en) * 1997-03-20 1999-08-24 Xilinx, Inc. FPGA repeatable interconnect structure with bidirectional and unidirectional interconnect lines
US5959471A (en) * 1997-09-25 1999-09-28 Siemens Aktiengesellschaft Method and apparatus for reducing the bias current in a reference voltage circuit
KR100257581B1 (ko) * 1997-09-25 2000-06-01 윤종용 반도체 메모리 장치의 내부 전원 전압 발생 회로 및 그 제어방법
JPH11238379A (ja) * 1998-02-19 1999-08-31 Oki Electric Ind Co Ltd 電源回路およびクロック信号検出回路
KR100313494B1 (ko) * 1998-05-07 2001-12-20 김영환 저전력정적램(sram)
US6425092B1 (en) * 1998-06-17 2002-07-23 International Business Machines Corporation Method and apparatus for preventing thermal failure in a semiconductor device through redundancy
US6392472B1 (en) * 1999-06-18 2002-05-21 Mitsubishi Denki Kabushiki Kaisha Constant internal voltage generation circuit
JP2001068626A (ja) * 1999-08-27 2001-03-16 Mitsubishi Electric Corp 半導体装置
DE19950541A1 (de) * 1999-10-20 2001-06-07 Infineon Technologies Ag Spannungsgenerator
JP4983378B2 (ja) * 1999-11-09 2012-07-25 富士通セミコンダクター株式会社 半導体記憶装置、その動作方法、その制御方法、メモリシステムおよびメモリの制御方法
JP3423957B2 (ja) * 1999-11-25 2003-07-07 Necエレクトロニクス株式会社 降圧回路
US6320454B1 (en) 2000-06-01 2001-11-20 Atmel Corporation Low power voltage regulator circuit for use in an integrated circuit device
US6411157B1 (en) * 2000-06-29 2002-06-25 International Business Machines Corporation Self-refresh on-chip voltage generator
US20030173828A1 (en) * 2002-02-27 2003-09-18 Bachinski Thomas J. Standby power generation system, unit, and method
KR100452322B1 (ko) * 2002-06-26 2004-10-12 삼성전자주식회사 반도체 메모리 장치의 전원전압 공급 방법 및 셀 어레이전원전압 공급회로
KR100460458B1 (ko) * 2002-07-26 2004-12-08 삼성전자주식회사 외부 전압 글리치에 안정적인 내부 전압 발생 회로
JP3768202B2 (ja) * 2003-05-13 2006-04-19 松下電器産業株式会社 半導体集積回路
JP2005354142A (ja) * 2004-06-08 2005-12-22 Sanyo Electric Co Ltd 半導体集積回路及びオペアンプ回路
DE102004041927B4 (de) * 2004-08-30 2013-11-21 Infineon Technologies Ag Schaltungsanordnung mit einem Pegelumsetzer und einem Spannungsregler
KR100812936B1 (ko) * 2005-05-03 2008-03-11 주식회사 하이닉스반도체 스탠바이 모드에서 누설전류가 감소된 내부전원전압발생회로
US7486572B2 (en) * 2005-06-14 2009-02-03 Brilliance Semiconductor Intl. Inc. Voltage regulator for memory device
AT503542B1 (de) * 2006-04-27 2009-07-15 Fronius Int Gmbh Verfahren und wechselrichter zur umwandlung einer gleichspannung in eine wechselspannung
KR100780623B1 (ko) 2006-06-30 2007-11-29 주식회사 하이닉스반도체 반도체 소자의 내부전압 생성장치
JP2009116684A (ja) * 2007-11-07 2009-05-28 Toshiba Corp 電圧発生回路
KR100937939B1 (ko) * 2008-04-24 2010-01-21 주식회사 하이닉스반도체 반도체 소자의 내부전압 생성회로
KR101090393B1 (ko) * 2009-09-30 2011-12-07 주식회사 하이닉스반도체 테스트 회로, 이를 이용한 반도체 메모리 장치 및 테스트 방법

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59218042A (ja) * 1983-05-26 1984-12-08 Toshiba Corp 半導体集積回路
JPS61116665A (ja) * 1984-11-12 1986-06-04 Fanuc Ltd 低電力消費形電圧比較回路
JPS61163655A (ja) * 1985-01-14 1986-07-24 Toshiba Corp 相補型半導体集積回路
JP2721151B2 (ja) * 1986-04-01 1998-03-04 株式会社東芝 半導体集積回路装置

Also Published As

Publication number Publication date
KR0133942B1 (ko) 1998-04-20
JPH0447591A (ja) 1992-02-17
EP0461788A3 (en) 1992-08-19
US5189316A (en) 1993-02-23
EP0461788A2 (en) 1991-12-18

Similar Documents

Publication Publication Date Title
KR920001541A (ko) 반도체 집적 회로장치
KR910019048A (ko) 반도체 집적 회로 장치
KR870011696A (ko) 전원전압강하회로
KR960030231A (ko) 반도체 메모리장치의 전압 구동회로
KR900011012A (ko) 반도체 메모리 집적회로
KR910008863A (ko) 반도체 집적회로
KR920003646A (ko) 반도체 제어장치
KR910008730A (ko) 반도체 기억장치
KR920010906A (ko) 반도체 기억장치
KR910002128A (ko) 집적 제어 회로
KR910012974A (ko) 카드형 반도체 장치
KR910010705A (ko) 반도체집적회로
KR960043522A (ko) 전원변동에 안정된 반도체 메모리 장치
KR920003629A (ko) 바이어스 전압발생회로 및 연산증폭기
KR970017589A (ko) 반도체 메모리 장치의 내부전원전압 발생회로
KR970051100A (ko) 반도체 메모리 장치의 내부 전원전압 발생회로
KR980004936A (ko) 반도체 메모리 장치의 내부 전압 발생기
KR960016391A (ko) 플라이백 트랜스포머
KR900019026A (ko) 반도체 장치의 기준전압 발생회로
KR960042725A (ko) 외부전원전압을 워드라인구동전압으로 사용하는 반도체 메모리
KR890004435A (ko) 다이나믹 메모리 셀을 갖는 집적회로
KR970029869A (ko) 반도체 메모리 장치
KR920015373A (ko) 반도체 메모리 장치
KR960024827A (ko) 휴대용 전자기기의 배터리 절전장치
KR970051266A (ko) 반도체 메모리 장치의 전류 소모 억제회로

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E902 Notification of reason for refusal
E601 Decision to refuse application
J2X1 Appeal (before the patent court)

Free format text: APPEAL AGAINST DECISION TO DECLINE REFUSAL

E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20071207

Year of fee payment: 11

LAPS Lapse due to unpaid annual fee