KR900017205A - 반도체소자 및 그 제조방법 - Google Patents
반도체소자 및 그 제조방법 Download PDFInfo
- Publication number
- KR900017205A KR900017205A KR1019900004976A KR900004976A KR900017205A KR 900017205 A KR900017205 A KR 900017205A KR 1019900004976 A KR1019900004976 A KR 1019900004976A KR 900004976 A KR900004976 A KR 900004976A KR 900017205 A KR900017205 A KR 900017205A
- Authority
- KR
- South Korea
- Prior art keywords
- film
- metal
- forming
- oxide
- semiconductor device
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims 8
- 238000004519 manufacturing process Methods 0.000 title claims 2
- 239000010408 film Substances 0.000 claims 25
- 239000002184 metal Substances 0.000 claims 12
- 229910052751 metal Inorganic materials 0.000 claims 12
- 239000000758 substrate Substances 0.000 claims 5
- 229910021332 silicide Inorganic materials 0.000 claims 4
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims 4
- 229910044991 metal oxide Inorganic materials 0.000 claims 3
- 150000004706 metal oxides Chemical class 0.000 claims 3
- 230000001590 oxidative effect Effects 0.000 claims 2
- 230000001681 protective effect Effects 0.000 claims 2
- KZNMRPQBBZBTSW-UHFFFAOYSA-N [Au]=O Chemical compound [Au]=O KZNMRPQBBZBTSW-UHFFFAOYSA-N 0.000 claims 1
- 230000003064 anti-oxidating effect Effects 0.000 claims 1
- 239000003963 antioxidant agent Substances 0.000 claims 1
- 230000003078 antioxidant effect Effects 0.000 claims 1
- 229910001922 gold oxide Inorganic materials 0.000 claims 1
- 238000010438 heat treatment Methods 0.000 claims 1
- 239000010409 thin film Substances 0.000 claims 1
- 238000000034 method Methods 0.000 description 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28185—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28194—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/456—Ohmic electrodes on silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
- H01L29/513—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- General Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Chemical & Material Sciences (AREA)
- Electrodes Of Semiconductors (AREA)
- Thin Film Transistor (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 이 발명의 제1의 실시예를 표시하는 구조단면도.
제2도는 이 발명의 제1의 실시예를 표시하는 공정단면도.
제3도는 이 발명의 제2의 실시예를 표시하는 공정단면도.
Claims (3)
- 채널영역을 끼고 소스/드레인영역이 형성되어 채널영역의 표면상에는 게이트절연막을 끼고 게이트전극이 형성된 반도체소자에 있어서, 소스/드레인영역상에 금속실리사이드막이 형성되고 아울러 게이트절연막의 적어도 일부로서 금속산화막이 형성된 것을 특징으로 하는 반도체소자.
- 반도체기판의 표면에 금속막을 형성하고 다시금 그위에 산화보혼막패턴을 형성하는 공정과 그 산화보호막패턴을 마스크로하여 상기 금속막을 선택적으로 산화하여 금속막의 일부를 게이트절연막으로서의 금속산화막으로 변환하는 공정과 그후 상기 산화보호막 패턴으로 덮인 상기 금속막을 반도체기판과 반응시켜 금속실리사이드막을 형성하는 공정과 그후 상기 게이트절연막으로서의 금속산화막상에 게이트전극을 형성하여 다시금 상기 금속 실리사이드막하의 기판내에 소스/드레인영역을 형성하는 공정과를 구비하여 이루어지는 반도체소자의 제조방법.
- 절연기판상에 게이트전극을 헝성후 상기 기판 전면에 금속얇은막, 산화방지막을 순차 적층하는 공정과 상기 게이트전극상의 산화방지막을 에치백에 의하여 자기정합적으로 제거하여 금속얇은 막을 노출시키는 공정과 상기 산화방지막을 마스크로하여 노출한 금속얇은막을 산화하여 금소산화막으로하는 공정과 상기 산화방지막을 제거후 전면에 반도체층을 형성하는 공정과 열처리에 의하여 상기 반도체층과 상기 산화되지 않은 금속막과를 반응시켜 금속실리 사이드층을 형성하는 공정과를 가지는 것을 특징으로 하는 반도체소자의 형성방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1095161A JPH02273934A (ja) | 1989-04-17 | 1989-04-17 | 半導体素子およびその製造方法 |
JP1-95161 | 1989-04-17 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR900017205A true KR900017205A (ko) | 1990-11-15 |
Family
ID=14130053
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019900004976A KR900017205A (ko) | 1989-04-17 | 1990-04-11 | 반도체소자 및 그 제조방법 |
Country Status (3)
Country | Link |
---|---|
US (1) | US5134451A (ko) |
JP (1) | JPH02273934A (ko) |
KR (1) | KR900017205A (ko) |
Families Citing this family (33)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2678091B2 (ja) * | 1990-12-19 | 1997-11-17 | 松下電子工業株式会社 | 半導体装置 |
JP2873632B2 (ja) | 1991-03-15 | 1999-03-24 | 株式会社半導体エネルギー研究所 | 半導体装置 |
US6713783B1 (en) | 1991-03-15 | 2004-03-30 | Semiconductor Energy Laboratory Co., Ltd. | Compensating electro-optical device including thin film transistors |
EP0550255B1 (en) * | 1991-12-31 | 1998-03-11 | STMicroelectronics, Inc. | Transistor spacer structure |
JPH05315608A (ja) * | 1992-05-13 | 1993-11-26 | Tadahiro Omi | 半導体装置 |
US5187638A (en) * | 1992-07-27 | 1993-02-16 | Micron Technology, Inc. | Barrier layers for ferroelectric and pzt dielectric on silicon |
US6531730B2 (en) * | 1993-08-10 | 2003-03-11 | Micron Technology, Inc. | Capacitor compatible with high dielectric constant materials having a low contact resistance layer and the method for forming same |
US6030847A (en) * | 1993-04-02 | 2000-02-29 | Micron Technology, Inc. | Method for forming a storage cell capacitor compatible with high dielectric constant materials |
US6791131B1 (en) * | 1993-04-02 | 2004-09-14 | Micron Technology, Inc. | Method for forming a storage cell capacitor compatible with high dielectric constant materials |
US5478772A (en) * | 1993-04-02 | 1995-12-26 | Micron Technology, Inc. | Method for forming a storage cell capacitor compatible with high dielectric constant materials |
US5381302A (en) * | 1993-04-02 | 1995-01-10 | Micron Semiconductor, Inc. | Capacitor compatible with high dielectric constant materials having a low contact resistance layer and the method for forming same |
US5392189A (en) | 1993-04-02 | 1995-02-21 | Micron Semiconductor, Inc. | Capacitor compatible with high dielectric constant materials having two independent insulative layers and the method for forming same |
JP2734961B2 (ja) * | 1993-05-24 | 1998-04-02 | 日本電気株式会社 | 電界効果型トランジスタとその製造方法 |
US5990516A (en) | 1994-09-13 | 1999-11-23 | Kabushiki Kaisha Toshiba | MOSFET with a thin gate insulating film |
KR19990014155A (ko) * | 1997-07-24 | 1999-02-25 | 윌리엄 비. 켐플러 | 고 유전율 실리케이트 게이트 유전체 |
US6861356B2 (en) | 1997-11-05 | 2005-03-01 | Tokyo Electron Limited | Method of forming a barrier film and method of forming wiring structure and electrodes of semiconductor device having a barrier film |
US7829144B2 (en) * | 1997-11-05 | 2010-11-09 | Tokyo Electron Limited | Method of forming a metal film for electrode |
JPH11195621A (ja) * | 1997-11-05 | 1999-07-21 | Tokyo Electron Ltd | バリアメタル、その形成方法、ゲート電極及びその形成方法 |
US6603180B1 (en) * | 1997-11-28 | 2003-08-05 | Advanced Micro Devices, Inc. | Semiconductor device having large-area silicide layer and process of fabrication thereof |
US6121094A (en) * | 1998-07-21 | 2000-09-19 | Advanced Micro Devices, Inc. | Method of making a semiconductor device with a multi-level gate structure |
US6107667A (en) * | 1998-09-10 | 2000-08-22 | Advanced Micro Devices, Inc. | MOS transistor with low-k spacer to suppress capacitive coupling between gate and source/drain extensions |
WO2000036652A2 (en) * | 1998-12-15 | 2000-06-22 | Conexant Systems, Inc. | Method of manufacturing a gate electrode |
US6528856B1 (en) * | 1998-12-15 | 2003-03-04 | Intel Corporation | High dielectric constant metal oxide gate dielectrics |
US6312378B1 (en) * | 1999-06-03 | 2001-11-06 | Cardiac Intelligence Corporation | System and method for automated collection and analysis of patient information retrieved from an implantable medical device for remote patient care |
JP2001077108A (ja) | 1999-08-31 | 2001-03-23 | Nec Corp | 半導体装置及び複合酸化物薄膜の製造方法 |
WO2001041191A2 (en) * | 1999-10-27 | 2001-06-07 | Semitool, Inc. | Method and apparatus for forming an oxidized structure on a microelectronic workpiece |
KR20010059854A (ko) * | 1999-12-30 | 2001-07-06 | 박종섭 | 반도체장치 및 그 제조방법 |
US6300203B1 (en) * | 2000-10-05 | 2001-10-09 | Advanced Micro Devices, Inc. | Electrolytic deposition of dielectric precursor materials for use in in-laid gate MOS transistors |
US6465853B1 (en) * | 2001-05-08 | 2002-10-15 | Motorola, Inc. | Method for making semiconductor device |
JP3581354B2 (ja) * | 2002-03-27 | 2004-10-27 | 株式会社東芝 | 電界効果トランジスタ |
US6794721B2 (en) * | 2002-12-23 | 2004-09-21 | International Business Machines Corporation | Integration system via metal oxide conversion |
DE102009009557A1 (de) * | 2009-02-19 | 2010-09-02 | W.C. Heraeus Gmbh | Elektrisch leitende Materialien, Zuleitungen und Kabel für Stimulationselektroden |
US8993058B2 (en) | 2012-08-28 | 2015-03-31 | Applied Materials, Inc. | Methods and apparatus for forming tantalum silicate layers on germanium or III-V semiconductor devices |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5362987A (en) * | 1976-11-17 | 1978-06-05 | Matsushita Electric Ind Co Ltd | Production of mos type semiconductor device |
JPS5546535A (en) * | 1978-09-28 | 1980-04-01 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Method of manufacturing semiconductor device |
US4384301A (en) * | 1979-11-07 | 1983-05-17 | Texas Instruments Incorporated | High performance submicron metal-oxide-semiconductor field effect transistor device structure |
DE3211761A1 (de) * | 1982-03-30 | 1983-10-06 | Siemens Ag | Verfahren zum herstellen von integrierten mos-feldeffekttransistorschaltungen in siliziumgate-technologie mit silizid beschichteten diffusionsgebieten als niederohmige leiterbahnen |
JPS59210671A (ja) * | 1983-05-14 | 1984-11-29 | Nippon Telegr & Teleph Corp <Ntt> | シリコン薄膜電界効果トランジスタ |
JPS6088474A (ja) * | 1983-10-21 | 1985-05-18 | Seiko Epson Corp | 半導体装置 |
FR2555365B1 (fr) * | 1983-11-22 | 1986-08-29 | Efcis | Procede de fabrication de circuit integre avec connexions de siliciure de tantale et circuit integre realise selon ce procede |
US4746219A (en) * | 1986-03-07 | 1988-05-24 | Texas Instruments Incorporated | Local interconnect |
US4735680A (en) * | 1986-11-17 | 1988-04-05 | Yen Yung Chau | Method for the self-aligned silicide formation in IC fabrication |
JPS63140577A (ja) * | 1986-12-02 | 1988-06-13 | Toshiba Corp | 電界効果トランジスタ |
US4866491A (en) * | 1987-02-06 | 1989-09-12 | International Business Machines Corporation | Heterojunction field effect transistor having gate threshold voltage capability |
-
1989
- 1989-04-17 JP JP1095161A patent/JPH02273934A/ja active Pending
-
1990
- 1990-04-11 KR KR1019900004976A patent/KR900017205A/ko not_active Application Discontinuation
- 1990-04-13 US US07/509,478 patent/US5134451A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US5134451A (en) | 1992-07-28 |
JPH02273934A (ja) | 1990-11-08 |
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A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E601 | Decision to refuse application |