KR890012402A - 반도체 장치의 제조방법 - Google Patents
반도체 장치의 제조방법 Download PDFInfo
- Publication number
- KR890012402A KR890012402A KR1019890000787A KR890000787A KR890012402A KR 890012402 A KR890012402 A KR 890012402A KR 1019890000787 A KR1019890000787 A KR 1019890000787A KR 890000787 A KR890000787 A KR 890000787A KR 890012402 A KR890012402 A KR 890012402A
- Authority
- KR
- South Korea
- Prior art keywords
- layer
- mask
- silicon
- semiconductor device
- manufacturing
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims description 9
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 238000000034 method Methods 0.000 claims description 4
- 229910052581 Si3N4 Inorganic materials 0.000 claims 7
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims 7
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims 4
- 238000005530 etching Methods 0.000 claims 4
- 229910052814 silicon oxide Inorganic materials 0.000 claims 4
- 229910001092 metal group alloy Inorganic materials 0.000 claims 3
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims 3
- 239000000758 substrate Substances 0.000 claims 3
- 229910021332 silicide Inorganic materials 0.000 claims 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 1
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 230000005669 field effect Effects 0.000 claims 1
- 238000010438 heat treatment Methods 0.000 claims 1
- 239000012212 insulator Substances 0.000 claims 1
- 239000002184 metal Substances 0.000 claims 1
- 229920002120 photoresistant polymer Polymers 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
- H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/665—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/6656—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using multiple spacer layers, e.g. multiple sidewall spacers
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/147—Silicides
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
내용 없음.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도 내지 3도는 본 발명에 따른 방법에 의해 얻어진 반도체 장치 제조의 몇가지 연속적인 단계의 단면도 및 개략도.
Claims (5)
- 단결정 실리콘의 반도체 기판면은 실리콘 산화물층에 제공되며 게이트 전극은 에칭처리를 받아들여 제공된 에칭 마스크후에, 도프된 다결정 실리콘의 층과 함께 실리콘 산화물 층으로 덮힌 것에 의해 형성되며, 마스크처럼 게이트 전극으로 사용되는 반면에, 소스 및 드레인 죤은 반도체 기판에서 형성되며 게이트 전극은 비등방성 에칭 처리를 받아들이고 실리콘 산화물의 층과 함께 면을 덮는 것에 의해 엣지 절연부분에 제공되며, 상기 게이트 전극의 다결정 실리콘 및 상기 소스 및 드레인 죤의 단결정 실리콘은 노출되며, 상기 면은 금속 합금층으로 덮혀 있으며, 상기 기판은 단결정 및 다결정 실리콘 금속 규화물 밑에 형성된 것과 함께 금속 합금층의 반작용에 의해 열처리를 받아들이며, 금속 규화물로 변환되지 않는 금속 합금층의 부분이 변환되는 절연 게이트 필드 효과 트랜지스터를 구비하는 반도체 장치 제조방법에 있어서, 상기 다결정 실리콘층에서 게이트 전극의 형성동안에 에칭 마스크처럼 사용된 실리콘 질화물 포함 마스크를 특징으로 하는 반도체 장치의 제조방법.
- 제 1 항에 있어서, 상기 실리콘 질화물 포함 에칭 마스크는 상기 소스 및 드레인 죤이 형성된 후에 오직 제거되는 것을 특징으로하는 반도체 장치의 제조방법.
- 제 1 항 또는 2항에 있어서, 상기 실리콘 질화물의 마스크는 실리콘 질화물 포함 마스크처럼 사용되는 것을 특징으로 하는 반도체 장치의 제조방법.
- 제 3 항 있어서, 에칭 처리에 의한 마스크와, 감광성 내식막 마스크에 의해 마스킹되는 반면에 거기에서 형성된 것과 실리콘 질화물층과 함께 다결정 실리콘층에 덮힌 것에 의해 형성된 실리콘 질화물의 마스크를 특징으로 하는 반도체 장치의 제조방법.
- 제 4항에 있어서, 실리콘 산화물의 층은 다결정 실리콘층과 실리콘 질화물의 층 사이에 제공되는 것을 특징으로 하는 반도체 장치의 제조방법.※참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL8800222A NL8800222A (nl) | 1988-01-29 | 1988-01-29 | Werkwijze voor het vervaardigen van een halfgeleiderinrichting waarbij op zelfregistrerende wijze metaalsilicide wordt aangebracht. |
NL8800222 | 1988-01-29 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR890012402A true KR890012402A (ko) | 1989-08-26 |
Family
ID=19851680
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019890000787A KR890012402A (ko) | 1988-01-29 | 1989-01-26 | 반도체 장치의 제조방법 |
Country Status (6)
Country | Link |
---|---|
US (1) | US4885259A (ko) |
EP (1) | EP0327152B1 (ko) |
JP (1) | JPH025435A (ko) |
KR (1) | KR890012402A (ko) |
DE (1) | DE68910841T2 (ko) |
NL (1) | NL8800222A (ko) |
Families Citing this family (42)
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US20010008288A1 (en) * | 1988-01-08 | 2001-07-19 | Hitachi, Ltd. | Semiconductor integrated circuit device having memory cells |
US5374576A (en) * | 1988-12-21 | 1994-12-20 | Hitachi, Ltd. | Method of fabricating stacked capacitor cell memory devices |
US5153145A (en) * | 1989-10-17 | 1992-10-06 | At&T Bell Laboratories | Fet with gate spacer |
US5306655A (en) * | 1990-07-24 | 1994-04-26 | Matsushita Electric Industrial Co., Ltd. | Structure and method of manufacture for MOS field effect transistor having lightly doped drain and source diffusion regions |
JPH04217373A (ja) * | 1990-12-18 | 1992-08-07 | Sharp Corp | 不揮発性記憶装置およびその製造方法 |
JP3061891B2 (ja) * | 1991-06-21 | 2000-07-10 | キヤノン株式会社 | 半導体装置の製造方法 |
KR960000225B1 (ko) * | 1991-08-26 | 1996-01-03 | 가부시키가이샤 한도오따이 에네루기 겐큐쇼 | 절연게이트형 반도체장치의 제작방법 |
JP2997123B2 (ja) * | 1992-04-03 | 2000-01-11 | 株式会社東芝 | 半導体装置の製造方法 |
US5411907A (en) * | 1992-09-01 | 1995-05-02 | Taiwan Semiconductor Manufacturing Company | Capping free metal silicide integrated process |
JPH06140396A (ja) * | 1992-10-23 | 1994-05-20 | Yamaha Corp | 半導体装置とその製法 |
JP3437863B2 (ja) | 1993-01-18 | 2003-08-18 | 株式会社半導体エネルギー研究所 | Mis型半導体装置の作製方法 |
US5482895A (en) * | 1993-08-26 | 1996-01-09 | Fujitsu Limited | Method of manufacturing semiconductor devices having silicide electrodes |
TW297142B (ko) | 1993-09-20 | 1997-02-01 | Handotai Energy Kenkyusho Kk | |
US6777763B1 (en) * | 1993-10-01 | 2004-08-17 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for fabricating the same |
JP3030368B2 (ja) | 1993-10-01 | 2000-04-10 | 株式会社半導体エネルギー研究所 | 半導体装置およびその作製方法 |
US5438006A (en) * | 1994-01-03 | 1995-08-01 | At&T Corp. | Method of fabricating gate stack having a reduced height |
JPH07263684A (ja) * | 1994-03-25 | 1995-10-13 | Mitsubishi Electric Corp | 電界効果トランジスタの製造方法 |
US6200871B1 (en) * | 1994-08-30 | 2001-03-13 | Texas Instruments Incorporated | High performance self-aligned silicide process for sub-half-micron semiconductor technologies |
FR2734402B1 (fr) * | 1995-05-15 | 1997-07-18 | Brouquet Pierre | Procede pour l'isolement electrique en micro-electronique, applicable aux cavites etroites, par depot d'oxyde a l'etat visqueux et dispositif correspondant |
US5858844A (en) * | 1995-06-07 | 1999-01-12 | Advanced Micro Devices, Inc. | Method for construction and fabrication of submicron field-effect transistors by optimization of poly oxide process |
US6289396B1 (en) | 1995-11-21 | 2001-09-11 | Diamond Multimedia Systems, Inc. | Dynamic programmable mode switching device driver architecture |
US6393495B1 (en) | 1995-11-21 | 2002-05-21 | Diamond Multimedia Systems, Inc. | Modular virtualizing device driver architecture |
US6009476A (en) * | 1995-11-21 | 1999-12-28 | Diamond Multimedia Systems, Inc. | Device driver architecture supporting emulation environment |
US5752032A (en) * | 1995-11-21 | 1998-05-12 | Diamond Multimedia Systems, Inc. | Adaptive device driver using controller hardware sub-element identifier |
KR100206878B1 (ko) * | 1995-12-29 | 1999-07-01 | 구본준 | 반도체소자 제조방법 |
JPH104092A (ja) * | 1996-06-14 | 1998-01-06 | Nec Corp | 半導体装置の製造方法 |
US5705417A (en) * | 1996-06-19 | 1998-01-06 | Vanguard International Semiconductor Corporation | Method for forming self-aligned silicide structure |
US5691212A (en) * | 1996-09-27 | 1997-11-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | MOS device structure and integration method |
US5753557A (en) * | 1996-10-07 | 1998-05-19 | Vanguard International Semiconductor Company | Bridge-free self aligned silicide process |
US5744395A (en) * | 1996-10-16 | 1998-04-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Low resistance, self-aligned, titanium silicide structures, using a single rapid thermal anneal procedure |
US5783486A (en) * | 1996-10-18 | 1998-07-21 | Vanguard International Semiconductor Corporation | Bridge-free self aligned silicide process |
TW346652B (en) * | 1996-11-09 | 1998-12-01 | Winbond Electronics Corp | Semiconductor production process |
US6013569A (en) * | 1997-07-07 | 2000-01-11 | United Microelectronics Corp. | One step salicide process without bridging |
US6603180B1 (en) * | 1997-11-28 | 2003-08-05 | Advanced Micro Devices, Inc. | Semiconductor device having large-area silicide layer and process of fabrication thereof |
US6015736A (en) * | 1997-12-19 | 2000-01-18 | Advanced Micro Devices, Inc. | Method and system for gate stack reoxidation control |
US5895244A (en) * | 1998-01-08 | 1999-04-20 | Texas Instruments - Acer Incorporated | Process to fabricate ultra-short channel nMOSFETs with self-aligned silicide contact |
US6821855B2 (en) | 2002-08-29 | 2004-11-23 | Micron Technology, Inc. | Reverse metal process for creating a metal silicide transistor gate structure |
US6995053B2 (en) * | 2004-04-23 | 2006-02-07 | Sharp Laboratories Of America, Inc. | Vertical thin film transistor |
EP1642331B1 (de) * | 2003-07-08 | 2013-04-03 | Infineon Technologies AG | Herstellungsverfahren einer integrierten schaltungsanordnung mit niederohmigen kontakten |
JP2006237453A (ja) * | 2005-02-28 | 2006-09-07 | Toshiba Corp | 半導体装置及びその製造方法 |
CN101987985B (zh) * | 2009-08-04 | 2013-05-22 | 财团法人工业技术研究院 | 一种组合物及其用途 |
US8741704B2 (en) * | 2012-03-08 | 2014-06-03 | International Business Machines Corporation | Metal oxide semiconductor (MOS) device with locally thickened gate oxide |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
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NL7510903A (nl) * | 1975-09-17 | 1977-03-21 | Philips Nv | Werkwijze voor het vervaardigen van een halfgelei- derinrichting, en inrichting vervaardigd volgens de werkwijze. |
US4374700A (en) * | 1981-05-29 | 1983-02-22 | Texas Instruments Incorporated | Method of manufacturing silicide contacts for CMOS devices |
US4441247A (en) * | 1981-06-29 | 1984-04-10 | Intel Corporation | Method of making MOS device by forming self-aligned polysilicon and tungsten composite gate |
JPS58154270A (ja) * | 1982-03-09 | 1983-09-13 | Toshiba Corp | 半導体装置の製造方法 |
JPS59188974A (ja) * | 1983-04-11 | 1984-10-26 | Nec Corp | 半導体装置の製造方法 |
US4477310A (en) * | 1983-08-12 | 1984-10-16 | Tektronix, Inc. | Process for manufacturing MOS integrated circuit with improved method of forming refractory metal silicide areas |
US4587710A (en) * | 1984-06-15 | 1986-05-13 | Gould Inc. | Method of fabricating a Schottky barrier field effect transistor |
US4587718A (en) * | 1984-11-30 | 1986-05-13 | Texas Instruments Incorporated | Process for forming TiSi2 layers of differing thicknesses in a single integrated circuit |
SE453547B (sv) * | 1985-03-07 | 1988-02-08 | Stiftelsen Inst Mikrovags | Forfarande vid framstellning av integrerade kretsar der pa en substratplatta ledare och s k gate-strukturer uppbygges |
GB2172743B (en) * | 1985-03-23 | 1988-11-16 | Stc Plc | Improvements in integrated circuits |
US4663191A (en) * | 1985-10-25 | 1987-05-05 | International Business Machines Corporation | Salicide process for forming low sheet resistance doped silicon junctions |
US4703551A (en) * | 1986-01-24 | 1987-11-03 | Ncr Corporation | Process for forming LDD MOS/CMOS structures |
US4818715A (en) * | 1987-07-09 | 1989-04-04 | Industrial Technology Research Institute | Method of fabricating a LDDFET with self-aligned silicide |
US4755478A (en) * | 1987-08-13 | 1988-07-05 | International Business Machines Corporation | Method of forming metal-strapped polysilicon gate electrode for FET device |
US4786609A (en) * | 1987-10-05 | 1988-11-22 | North American Philips Corporation, Signetics Division | Method of fabricating field-effect transistor utilizing improved gate sidewall spacers |
-
1988
- 1988-01-29 NL NL8800222A patent/NL8800222A/nl not_active Application Discontinuation
- 1988-12-28 US US07/290,923 patent/US4885259A/en not_active Expired - Fee Related
-
1989
- 1989-01-24 EP EP89200132A patent/EP0327152B1/en not_active Expired - Lifetime
- 1989-01-24 DE DE68910841T patent/DE68910841T2/de not_active Expired - Fee Related
- 1989-01-26 KR KR1019890000787A patent/KR890012402A/ko not_active Application Discontinuation
- 1989-01-27 JP JP1016502A patent/JPH025435A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
EP0327152B1 (en) | 1993-11-24 |
NL8800222A (nl) | 1989-08-16 |
JPH025435A (ja) | 1990-01-10 |
DE68910841T2 (de) | 1994-05-19 |
US4885259A (en) | 1989-12-05 |
DE68910841D1 (de) | 1994-01-05 |
EP0327152A1 (en) | 1989-08-09 |
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