GB2172743B - Improvements in integrated circuits - Google Patents

Improvements in integrated circuits

Info

Publication number
GB2172743B
GB2172743B GB08507600A GB8507600A GB2172743B GB 2172743 B GB2172743 B GB 2172743B GB 08507600 A GB08507600 A GB 08507600A GB 8507600 A GB8507600 A GB 8507600A GB 2172743 B GB2172743 B GB 2172743B
Authority
GB
United Kingdom
Prior art keywords
integrated circuits
circuits
integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB08507600A
Other versions
GB2172743A (en
GB8507600D0 (en
Inventor
Peter Denis Scovell
Roger Leslie Baker
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STC PLC
Original Assignee
STC PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STC PLC filed Critical STC PLC
Priority to GB08507600A priority Critical patent/GB2172743B/en
Publication of GB8507600D0 publication Critical patent/GB8507600D0/en
Publication of GB2172743A publication Critical patent/GB2172743A/en
Application granted granted Critical
Publication of GB2172743B publication Critical patent/GB2172743B/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66575Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/6659Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/32Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
GB08507600A 1985-03-23 1985-03-23 Improvements in integrated circuits Expired GB2172743B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB08507600A GB2172743B (en) 1985-03-23 1985-03-23 Improvements in integrated circuits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB08507600A GB2172743B (en) 1985-03-23 1985-03-23 Improvements in integrated circuits

Publications (3)

Publication Number Publication Date
GB8507600D0 GB8507600D0 (en) 1985-05-01
GB2172743A GB2172743A (en) 1986-09-24
GB2172743B true GB2172743B (en) 1988-11-16

Family

ID=10576522

Family Applications (1)

Application Number Title Priority Date Filing Date
GB08507600A Expired GB2172743B (en) 1985-03-23 1985-03-23 Improvements in integrated circuits

Country Status (1)

Country Link
GB (1) GB2172743B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8800222A (en) * 1988-01-29 1989-08-16 Philips Nv METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE APPLYING METAL SILICIDE IN SELF-REGISTRATING METHOD
JPH0521310A (en) * 1991-07-11 1993-01-29 Canon Inc Formation of fine pattern
EP0592039B1 (en) * 1992-10-07 1998-08-26 Koninklijke Philips Electronics N.V. Method of manufacturing an integrated circuit with a non-volatile memory element
US6090671A (en) * 1997-09-30 2000-07-18 Siemens Aktiengesellschaft Reduction of gate-induced drain leakage in semiconductor devices

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4016587A (en) * 1974-12-03 1977-04-05 International Business Machines Corporation Raised source and drain IGFET device and method
US4075045A (en) * 1976-02-09 1978-02-21 International Business Machines Corporation Method for fabricating FET one-device memory cells with two layers of polycrystalline silicon and fabrication of integrated circuits containing arrays of the memory cells charge storage capacitors utilizing five basic pattern deliberating steps
JPS5737830A (en) * 1980-08-19 1982-03-02 Mitsubishi Electric Corp Manufacture of semiconductor device
NL8202686A (en) * 1982-07-05 1984-02-01 Philips Nv METHOD FOR MANUFACTURING A FIELD-EFFECTING DEVICE WITH INSULATED CONTROL ELECTRODE, AND DEVICE MADE ACCORDING TO THE METHOD

Also Published As

Publication number Publication date
GB2172743A (en) 1986-09-24
GB8507600D0 (en) 1985-05-01

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Legal Events

Date Code Title Description
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20030323