KR970052932A - 반도체 소자의 금속층 형성방법 - Google Patents

반도체 소자의 금속층 형성방법 Download PDF

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KR970052932A
KR970052932A KR1019950048743A KR19950048743A KR970052932A KR 970052932 A KR970052932 A KR 970052932A KR 1019950048743 A KR1019950048743 A KR 1019950048743A KR 19950048743 A KR19950048743 A KR 19950048743A KR 970052932 A KR970052932 A KR 970052932A
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South Korea
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layer
forming
silicon substrate
titanium
oxide film
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KR1019950048743A
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KR0172284B1 (ko
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김상용
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김주용
현대전자산업 주식회사
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Priority to KR1019950048743A priority Critical patent/KR0172284B1/ko
Publication of KR970052932A publication Critical patent/KR970052932A/ko
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Publication of KR0172284B1 publication Critical patent/KR0172284B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
    • H01L29/4925—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
    • H01L29/4941—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement with a barrier layer between the silicon and the metal or metal silicide upper layer, e.g. Silicide/TiN/Polysilicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
    • H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
    • H01L21/28052—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a silicide layer formed by the silicidation reaction of silicon with a metal layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

본 발명은 반도체 소자의 금속층 형성방법을 제공하는 것으로, 제1티타늄 실리사이드층의 식각을 방지하기 위하여, 상기 제1티타늄 실리사이드층 상에 제2티타늄 실리사이드층을 형성하여 소자의 수율을 향상시킬 수 있는 효과가 있다.

Description

반도체 소자의 금속층 형성방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2a도 내지 제2e도는 본 발명에 따른 반도체 소자의 금속층 형성방법을 설명하기 위한 소자의 단면도.

Claims (3)

  1. 반도체 소자의 금속층 형성방법에 있어서, 필드산화막이 형성된 실리콘기판상에 게이트산화막 및 제1폴리실리콘층을 형성하는 단계와, 상기 단계로부터 상기 제1폴리실리콘층 및 게이트산화막을 순차적으로 패터닝한 후 노출된 상기 실리콘기판에 접합영역을 형성하는 단계와, 상기 단계로부터 상기 실리콘기판의 전체 상부면에 산화막을 형성한 후 상기 산화막을 식각하여 상기 제1폴리실리콘층 및 게이트산화막의 양 측벽에 산화막 스페이서를 형성하는 단계와, 상기 단계로부터 상기 실리콘기판의 전체 상부면에 티타늄을 형성하고, 상기 접합영역 및 폴리실리콘층상에 제1티타늄 실리사이드층이 형성되도록 상기 티타늄층을 급속열처리한 후 상기 티타늄 실리사이드층만 남도록 상기 티타늄층을 제1식각공정으로 식각하여 제거하는 단계와, 상기 단계로부터 상기 실리콘기판의 전체 상부면에 제2폴리실리콘층을 형성하고, 그리고 상기 제1티타늄 실리사이드층상에 제2티타늄 실리사이드층이 형성되도록 상기 제2폴리실리콘층을 급속열처리한 후 상기 급속열처리에 의해 반응되지 않은 상기 제2폴리실리콘층을 제2식각공정으로 제거하는 단계와, 상기 단계로부터 상기 실리콘기판의 전체 상부면에 절연막을 형성한 후 상기 접합영역의 소정부분이 노출되도록 마스크를 이용하여 제3식각공정으로 식각하는 단계와, 상기 단계로부터 상기 실리콘기판의 전체 상부면에 베리어금속층으로 이용되는 티타늄층 및 티타늄 나이트라이드층을 순차적으로 형성한 후 그 위에 금속층을 형성하는 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 금속층 형성방법.
  2. 제1항에 있어서, 상기 제2식각공정은 혼합비율이 20:20:1 내지 200:80:1인 HNO3: CH3COOH : HF를 이용하여 실시하는 것을 특징으로 하는 반도체 소자의 금속층 형성방법.
  3. 제1항에 있어서, 상기 급속열처리는 800 내지 950℃의 온도로 실시하는 것을 특징으로 하는 반도체 소자의 금속층 형성방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950048743A 1995-12-12 1995-12-12 반도체 소자의 금속층 형성방법 KR0172284B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950048743A KR0172284B1 (ko) 1995-12-12 1995-12-12 반도체 소자의 금속층 형성방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950048743A KR0172284B1 (ko) 1995-12-12 1995-12-12 반도체 소자의 금속층 형성방법

Publications (2)

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KR970052932A true KR970052932A (ko) 1997-07-29
KR0172284B1 KR0172284B1 (ko) 1999-03-30

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