KR900008665B1 - 반도체장치의 제조방법 - Google Patents

반도체장치의 제조방법 Download PDF

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Publication number
KR900008665B1
KR900008665B1 KR1019860005412A KR860005412A KR900008665B1 KR 900008665 B1 KR900008665 B1 KR 900008665B1 KR 1019860005412 A KR1019860005412 A KR 1019860005412A KR 860005412 A KR860005412 A KR 860005412A KR 900008665 B1 KR900008665 B1 KR 900008665B1
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KR
South Korea
Prior art keywords
semiconductor device
electrode
metal
electrodes
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
KR1019860005412A
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English (en)
Korean (ko)
Other versions
KR870001663A (ko
Inventor
겐조오 하다다
Original Assignee
마쯔시다덴기산교 가부시기가이샤
다니이 아끼오
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 마쯔시다덴기산교 가부시기가이샤, 다니이 아끼오 filed Critical 마쯔시다덴기산교 가부시기가이샤
Publication of KR870001663A publication Critical patent/KR870001663A/ko
Application granted granted Critical
Publication of KR900008665B1 publication Critical patent/KR900008665B1/ko
Expired legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/072Connecting or disconnecting of bump connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/012Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/012Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01204Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using temporary auxiliary members, e.g. using sacrificial coatings or handle substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/072Connecting or disconnecting of bump connectors
    • H10W72/07231Techniques
    • H10W72/07236Soldering or alloying
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251Materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251Materials
    • H10W72/252Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/951Materials of bond pads
    • H10W72/952Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49144Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion

Landscapes

  • Wire Bonding (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1019860005412A 1985-07-05 1986-07-04 반도체장치의 제조방법 Expired KR900008665B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP14890.8 1985-07-05
JP60148908A JPS629642A (ja) 1985-07-05 1985-07-05 半導体装置の製造方法
JP60-148908 1985-07-05

Publications (2)

Publication Number Publication Date
KR870001663A KR870001663A (ko) 1987-03-17
KR900008665B1 true KR900008665B1 (ko) 1990-11-26

Family

ID=15463348

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019860005412A Expired KR900008665B1 (ko) 1985-07-05 1986-07-04 반도체장치의 제조방법

Country Status (5)

Country Link
US (1) US4693770A (enExample)
EP (1) EP0208494B1 (enExample)
JP (1) JPS629642A (enExample)
KR (1) KR900008665B1 (enExample)
DE (1) DE3686457T2 (enExample)

Families Citing this family (52)

* Cited by examiner, † Cited by third party
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JPS6149432A (ja) * 1984-08-18 1986-03-11 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JPH0663354B2 (ja) * 1986-06-30 1994-08-22 藤森工業株式会社 コンクリ−ト打設用型枠
JPS63119552A (ja) * 1986-11-07 1988-05-24 Sharp Corp Lsiチツプ
JPS63160352A (ja) * 1986-12-24 1988-07-04 Semiconductor Energy Lab Co Ltd 半導体装置の実装方法
US4865245A (en) * 1987-09-24 1989-09-12 Santa Barbara Research Center Oxide removal from metallic contact bumps formed on semiconductor devices to improve hybridization cold-welds
US5354695A (en) 1992-04-08 1994-10-11 Leedy Glenn J Membrane dielectric isolation IC fabrication
DE3829538A1 (de) * 1988-08-31 1990-03-08 Siemens Ag Verfahren zum verbinden eines halbleiterchips mit einem substrat
US5071787A (en) * 1989-03-14 1991-12-10 Kabushiki Kaisha Toshiba Semiconductor device utilizing a face-down bonding and a method for manufacturing the same
US4979664A (en) * 1989-11-15 1990-12-25 At&T Bell Laboratories Method for manufacturing a soldered article
JPH03194867A (ja) * 1989-12-22 1991-08-26 Sumitomo Metal Ind Ltd 電気的接続部材
JPH03291947A (ja) * 1990-04-09 1991-12-24 Mitsubishi Electric Corp ハイブリッド型デバイス
WO1991018957A1 (en) * 1990-06-08 1991-12-12 Minnesota Mining And Manufacturing Company Reworkable adhesive for electronic applications
US5143785A (en) * 1990-08-20 1992-09-01 Minnesota Mining And Manufacturing Company Cyanate ester adhesives for electronic applications
JP2629435B2 (ja) * 1990-10-17 1997-07-09 日本電気株式会社 アレイ状光素子用サブ基板の作製方法
US5532031A (en) * 1992-01-29 1996-07-02 International Business Machines Corporation I/O pad adhesion layer for a ceramic substrate
US6714625B1 (en) 1992-04-08 2004-03-30 Elm Technology Corporation Lithography device for semiconductor circuit pattern generation
TW223184B (enExample) * 1992-06-18 1994-05-01 Matsushita Electron Co Ltd
KR0129500B1 (en) * 1992-10-27 1998-04-06 Matsushita Electric Industrial Co Ltd Semiconductor device and manufacture thereof
US5739053A (en) * 1992-10-27 1998-04-14 Matsushita Electric Industrial Co., Ltd. Process for bonding a semiconductor to a circuit substrate including a solder bump transferring step
US5821627A (en) * 1993-03-11 1998-10-13 Kabushiki Kaisha Toshiba Electronic circuit device
US6741085B1 (en) 1993-11-16 2004-05-25 Formfactor, Inc. Contact carriers (tiles) for populating larger substrates with spring contacts
US7081938B1 (en) 1993-12-03 2006-07-25 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and method for manufacturing the same
US5532550A (en) * 1993-12-30 1996-07-02 Adler; Robert Organic based led display matrix
US5508228A (en) * 1994-02-14 1996-04-16 Microelectronics And Computer Technology Corporation Compliant electrically connective bumps for an adhesive flip chip integrated circuit device and methods for forming same
US6747627B1 (en) 1994-04-22 2004-06-08 Semiconductor Energy Laboratory Co., Ltd. Redundancy shift register circuit for driver circuit in active matrix type liquid crystal display device
JP3402400B2 (ja) 1994-04-22 2003-05-06 株式会社半導体エネルギー研究所 半導体集積回路の作製方法
US5542174A (en) * 1994-09-15 1996-08-06 Intel Corporation Method and apparatus for forming solder balls and solder columns
US5567654A (en) * 1994-09-28 1996-10-22 International Business Machines Corporation Method and workpiece for connecting a thin layer to a monolithic electronic module's surface and associated module packaging
US5579573A (en) * 1994-10-11 1996-12-03 Ford Motor Company Method for fabricating an undercoated chip electrically interconnected to a substrate
JP3437687B2 (ja) * 1994-12-22 2003-08-18 株式会社東芝 半導体素子の実装構造、及び液晶表示装置
JP3608795B2 (ja) * 1995-05-26 2005-01-12 フォームファクター,インコーポレイテッド より大きな基板にばね接触子を定置させるための接触子担体(タイル)
CA2156941A1 (en) * 1995-08-21 1997-02-22 Jonathan H. Orchard-Webb Method of making electrical connections to integrated circuit
JP2793528B2 (ja) * 1995-09-22 1998-09-03 インターナショナル・ビジネス・マシーンズ・コーポレイション ハンダ付け方法、ハンダ付け装置
JPH09152979A (ja) * 1995-09-28 1997-06-10 Matsushita Electric Ind Co Ltd 半導体装置
KR100438256B1 (ko) * 1995-12-18 2004-08-25 마츠시타 덴끼 산교 가부시키가이샤 반도체장치 및 그 제조방법
US5686318A (en) * 1995-12-22 1997-11-11 Micron Technology, Inc. Method of forming a die-to-insert permanent connection
US6404063B2 (en) 1995-12-22 2002-06-11 Micron Technology, Inc. Die-to-insert permanent connection and method of forming
US5886414A (en) * 1996-09-20 1999-03-23 Integrated Device Technology, Inc. Removal of extended bond pads using intermetallics
US5915167A (en) 1997-04-04 1999-06-22 Elm Technology Corporation Three dimensional structure memory
US6551857B2 (en) 1997-04-04 2003-04-22 Elm Technology Corporation Three dimensional structure integrated circuits
US6271111B1 (en) 1998-02-25 2001-08-07 International Business Machines Corporation High density pluggable connector array and process thereof
DE19981109D2 (de) * 1998-06-16 2001-07-26 Fraunhofer Ges Forschung Vertikal integriertes mikroelektronisches System und Verfahren zur Herstellung
US6657313B1 (en) 1999-01-19 2003-12-02 International Business Machines Corporation Dielectric interposer for chip to substrate soldering
JP2001144197A (ja) * 1999-11-11 2001-05-25 Fujitsu Ltd 半導体装置、半導体装置の製造方法及び試験方法
US6621168B2 (en) * 2000-12-28 2003-09-16 Intel Corporation Interconnected circuit board assembly and system
JP2002289770A (ja) * 2001-03-27 2002-10-04 Nec Kansai Ltd 半導体装置
US6748994B2 (en) 2001-04-11 2004-06-15 Avery Dennison Corporation Label applicator, method and label therefor
AU2003255254A1 (en) 2002-08-08 2004-02-25 Glenn J. Leedy Vertical system integration
US7253517B2 (en) * 2003-10-28 2007-08-07 Raytheon Company Method and apparatus for combining multiple integrated circuits
JP2006283366A (ja) * 2005-03-31 2006-10-19 Daiwa House Ind Co Ltd コンクリート型枠用板状透水材
JP5568979B2 (ja) * 2009-12-22 2014-08-13 住友電気工業株式会社 検出装置、受光素子アレイ、および検出装置の製造方法
JP5644286B2 (ja) * 2010-09-07 2014-12-24 オムロン株式会社 電子部品の表面実装方法及び電子部品が実装された基板

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JPS4869471A (enExample) * 1971-12-22 1973-09-20
US4032058A (en) * 1973-06-29 1977-06-28 Ibm Corporation Beam-lead integrated circuit structure and method for making the same including automatic registration of beam-leads with corresponding dielectric substrate leads
JPS5317069A (en) * 1976-07-30 1978-02-16 Fujitsu Ltd Semiconductor device and its production
US4273859A (en) * 1979-12-31 1981-06-16 Honeywell Information Systems Inc. Method of forming solder bump terminals on semiconductor elements
US4396140A (en) * 1981-01-27 1983-08-02 Bell Telephone Laboratories, Incorporated Method of bonding electronic components
JPS57152147A (en) * 1981-03-16 1982-09-20 Matsushita Electric Ind Co Ltd Formation of metal projection on metal lead
US4545610A (en) * 1983-11-25 1985-10-08 International Business Machines Corporation Method for forming elongated solder connections between a semiconductor device and a supporting substrate
US4585157A (en) * 1985-04-04 1986-04-29 General Motors Corporation Tape bonding of two integrated circuits into one tape frame

Also Published As

Publication number Publication date
JPS629642A (ja) 1987-01-17
DE3686457T2 (de) 1993-02-11
JPH0357618B2 (enExample) 1991-09-02
EP0208494A2 (en) 1987-01-14
DE3686457D1 (de) 1992-09-24
KR870001663A (ko) 1987-03-17
US4693770A (en) 1987-09-15
EP0208494A3 (en) 1988-08-24
EP0208494B1 (en) 1992-08-19

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