KR900006144B1 - 불휘발성 반도체기억장치 - Google Patents

불휘발성 반도체기억장치 Download PDF

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Publication number
KR900006144B1
KR900006144B1 KR1019870002954A KR870002954A KR900006144B1 KR 900006144 B1 KR900006144 B1 KR 900006144B1 KR 1019870002954 A KR1019870002954 A KR 1019870002954A KR 870002954 A KR870002954 A KR 870002954A KR 900006144 B1 KR900006144 B1 KR 900006144B1
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KR
South Korea
Prior art keywords
memory cell
potential
transistor
data
test
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
KR1019870002954A
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English (en)
Korean (ko)
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KR870009396A (ko
Inventor
시게루 아츠미
스미오 다나카
신지 사이토
노부아키 오츠카
Original Assignee
가부시키가이샤 도시바
와타리 스기이치로
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Publication date
Application filed by 가부시키가이샤 도시바, 와타리 스기이치로 filed Critical 가부시키가이샤 도시바
Publication of KR870009396A publication Critical patent/KR870009396A/ko
Application granted granted Critical
Publication of KR900006144B1 publication Critical patent/KR900006144B1/ko
Expired legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G11C29/50004—Marginal testing, e.g. race, voltage or current testing of threshold voltage
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G11C29/50016—Marginal testing, e.g. race, voltage or current testing of retention
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/81—Threshold
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS

Landscapes

  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Read Only Memory (AREA)
KR1019870002954A 1986-03-31 1987-03-30 불휘발성 반도체기억장치 Expired KR900006144B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP71143 1986-03-31
JP61071143A JPS62229599A (ja) 1986-03-31 1986-03-31 不揮発性半導体記憶装置

Publications (2)

Publication Number Publication Date
KR870009396A KR870009396A (ko) 1987-10-26
KR900006144B1 true KR900006144B1 (ko) 1990-08-24

Family

ID=13452074

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870002954A Expired KR900006144B1 (ko) 1986-03-31 1987-03-30 불휘발성 반도체기억장치

Country Status (5)

Country Link
US (1) US4956816A (enExample)
EP (1) EP0251429B1 (enExample)
JP (1) JPS62229599A (enExample)
KR (1) KR900006144B1 (enExample)
DE (1) DE3778978D1 (enExample)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5155701A (en) * 1985-02-08 1992-10-13 Hitachi, Ltd. Semiconductor integrated circuit device and method of testing the same
US5268319A (en) 1988-06-08 1993-12-07 Eliyahou Harari Highly compact EPROM and flash EEPROM devices
JPH02108300A (ja) * 1988-10-17 1990-04-20 Hitachi Ltd 不揮発性記憶装置
JPH02177100A (ja) * 1988-12-27 1990-07-10 Nec Corp 半導体記憶装置のテスト回路
US5163021A (en) * 1989-04-13 1992-11-10 Sundisk Corporation Multi-state EEprom read and write circuits and techniques
EP0617363B1 (en) * 1989-04-13 2000-01-26 SanDisk Corporation Defective cell substitution in EEprom array
US7447069B1 (en) 1989-04-13 2008-11-04 Sandisk Corporation Flash EEprom system
KR920001080B1 (ko) * 1989-06-10 1992-02-01 삼성전자 주식회사 메모리소자의 데이타 기록 방법 및 테스트 회로
JPH0664920B2 (ja) * 1989-10-20 1994-08-22 株式会社東芝 不揮発性メモリ
JPH0679440B2 (ja) * 1990-03-22 1994-10-05 株式会社東芝 不揮発性半導体記憶装置
KR960001307B1 (ko) * 1990-10-02 1996-01-25 가부시기가이샤 도오시바 메모리의 테스트방법
US5148436A (en) * 1990-10-15 1992-09-15 Motorola, Inc. Circuit for detecting false read data from eprom
US5199034A (en) * 1990-12-31 1993-03-30 Texas Instruments Incorporated Apparatus and method for testing semiconductors for cell to bitline leakage
EP1168365A3 (en) * 1991-12-09 2004-09-29 Fujitsu Limited Negative-voltage bias circuit
JP3318929B2 (ja) * 1992-03-25 2002-08-26 セイコーエプソン株式会社 不揮発性半導体装置
JP3348466B2 (ja) * 1992-06-09 2002-11-20 セイコーエプソン株式会社 不揮発性半導体装置
JPH0612878A (ja) * 1992-06-25 1994-01-21 Mitsubishi Electric Corp 半導体メモリ装置
US6438718B1 (en) * 1994-06-15 2002-08-20 Texas Instruments Incorporated Wordline stress mode arrangement a storage cell initialization scheme test time reduction burn-in elimination
US5594694A (en) * 1995-07-28 1997-01-14 Micron Quantum Devices, Inc. Memory circuit with switch for selectively connecting an input/output pad directly to a nonvolatile memory cell
US6259631B1 (en) * 1996-09-13 2001-07-10 Texas Instruments Incorporated Row drive circuit equipped with feedback transistors for low voltage flash EEPROM memories
JPH10199296A (ja) * 1997-01-09 1998-07-31 Mitsubishi Electric Corp ダイナミック型半導体記憶装置およびそのテスト方法
US6216239B1 (en) * 1997-09-15 2001-04-10 Integrated Device Technology, Inc. Testing method and apparatus for identifying disturbed cells within a memory cell array
DE10140853B4 (de) * 2001-08-21 2004-11-11 Robert Bosch Gmbh Verfahren zum Hochvolt-Screening einer integrierten Schaltung

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4301535A (en) * 1979-07-02 1981-11-17 Mostek Corporation Programmable read only memory integrated circuit with bit-check and deprogramming modes and methods for programming and testing said circuit
GB2089612B (en) * 1980-12-12 1984-08-30 Tokyo Shibaura Electric Co Nonvolatile semiconductor memory device
JPS589286A (ja) * 1981-07-10 1983-01-19 Toshiba Corp 不揮発性半導体メモリ
JPS6035760B2 (ja) * 1980-12-18 1985-08-16 富士通株式会社 半導体記憶装置
IE54406B1 (en) * 1980-12-23 1989-09-27 Fujitsu Ltd Electrically programmable non-colatile semiconductor memory device
EP0101107A2 (en) * 1982-07-19 1984-02-22 Motorola, Inc. Method of testing a semiconductor memory array
JPS59107493A (ja) * 1982-12-09 1984-06-21 Ricoh Co Ltd テスト回路付きｅｐｒｏｍメモリ装置
IT1221018B (it) * 1985-03-28 1990-06-21 Giulio Casagrande Dispositivo per verificare celle di memoria in funzione del salto di soglia ottenibile in fase di scrittura
JPS62114200A (ja) * 1985-11-13 1987-05-25 Mitsubishi Electric Corp 半導体メモリ装置
JPS62177799A (ja) * 1986-01-30 1987-08-04 Toshiba Corp 半導体記憶装置

Also Published As

Publication number Publication date
EP0251429A3 (en) 1989-04-05
EP0251429A2 (en) 1988-01-07
JPH0467280B2 (enExample) 1992-10-27
KR870009396A (ko) 1987-10-26
EP0251429B1 (en) 1992-05-13
JPS62229599A (ja) 1987-10-08
US4956816A (en) 1990-09-11
DE3778978D1 (de) 1992-06-17

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