DE3778978D1 - Nichtfluechtiger halbleiterspeicher. - Google Patents

Nichtfluechtiger halbleiterspeicher.

Info

Publication number
DE3778978D1
DE3778978D1 DE8787302549T DE3778978T DE3778978D1 DE 3778978 D1 DE3778978 D1 DE 3778978D1 DE 8787302549 T DE8787302549 T DE 8787302549T DE 3778978 T DE3778978 T DE 3778978T DE 3778978 D1 DE3778978 D1 DE 3778978D1
Authority
DE
Germany
Prior art keywords
bit lines
cells
memory cells
node
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8787302549T
Other languages
English (en)
Inventor
Shigeru C O Patent Divi Atsumi
Sumio C O Patent Divisi Tanaka
Shinji C O Patent Divisi Saito
Nobuaki C O Patent Divi Otsuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3778978D1 publication Critical patent/DE3778978D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C17/00Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50Marginal testing, e.g. race, voltage or current testing
    • G11C29/50004Marginal testing, e.g. race, voltage or current testing of threshold voltage
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50Marginal testing, e.g. race, voltage or current testing
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50Marginal testing, e.g. race, voltage or current testing
    • G11C29/50016Marginal testing, e.g. race, voltage or current testing of retention
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/81Threshold
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS

Landscapes

  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Read Only Memory (AREA)
DE8787302549T 1986-03-31 1987-03-24 Nichtfluechtiger halbleiterspeicher. Expired - Lifetime DE3778978D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61071143A JPS62229599A (ja) 1986-03-31 1986-03-31 不揮発性半導体記憶装置

Publications (1)

Publication Number Publication Date
DE3778978D1 true DE3778978D1 (de) 1992-06-17

Family

ID=13452074

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8787302549T Expired - Lifetime DE3778978D1 (de) 1986-03-31 1987-03-24 Nichtfluechtiger halbleiterspeicher.

Country Status (5)

Country Link
US (1) US4956816A (de)
EP (1) EP0251429B1 (de)
JP (1) JPS62229599A (de)
KR (1) KR900006144B1 (de)
DE (1) DE3778978D1 (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5155701A (en) * 1985-02-08 1992-10-13 Hitachi, Ltd. Semiconductor integrated circuit device and method of testing the same
US5268319A (en) 1988-06-08 1993-12-07 Eliyahou Harari Highly compact EPROM and flash EEPROM devices
JPH02108300A (ja) * 1988-10-17 1990-04-20 Hitachi Ltd 不揮発性記憶装置
JPH02177100A (ja) * 1988-12-27 1990-07-10 Nec Corp 半導体記憶装置のテスト回路
EP0392895B1 (de) 1989-04-13 1995-12-13 Sundisk Corporation EEprom-System mit Blocklöschung
US5163021A (en) * 1989-04-13 1992-11-10 Sundisk Corporation Multi-state EEprom read and write circuits and techniques
KR920001080B1 (ko) * 1989-06-10 1992-02-01 삼성전자 주식회사 메모리소자의 데이타 기록 방법 및 테스트 회로
JPH0664920B2 (ja) * 1989-10-20 1994-08-22 株式会社東芝 不揮発性メモリ
JPH0679440B2 (ja) * 1990-03-22 1994-10-05 株式会社東芝 不揮発性半導体記憶装置
JP2619170B2 (ja) * 1990-10-02 1997-06-11 株式会社東芝 半導体メモリ及びその試験方法
US5148436A (en) * 1990-10-15 1992-09-15 Motorola, Inc. Circuit for detecting false read data from eprom
US5199034A (en) * 1990-12-31 1993-03-30 Texas Instruments Incorporated Apparatus and method for testing semiconductors for cell to bitline leakage
EP0944094B1 (de) * 1991-12-09 2001-10-24 Fujitsu Limited Versorgungsspannungsschalter
WO1993019471A1 (en) * 1992-03-25 1993-09-30 Seiko Epson Corporation Nonvolatile semiconductor device
JP3348466B2 (ja) * 1992-06-09 2002-11-20 セイコーエプソン株式会社 不揮発性半導体装置
JPH0612878A (ja) * 1992-06-25 1994-01-21 Mitsubishi Electric Corp 半導体メモリ装置
US6438718B1 (en) * 1994-06-15 2002-08-20 Texas Instruments Incorporated Wordline stress mode arrangement a storage cell initialization scheme test time reduction burn-in elimination
US5594694A (en) * 1995-07-28 1997-01-14 Micron Quantum Devices, Inc. Memory circuit with switch for selectively connecting an input/output pad directly to a nonvolatile memory cell
US6259631B1 (en) * 1996-09-13 2001-07-10 Texas Instruments Incorporated Row drive circuit equipped with feedback transistors for low voltage flash EEPROM memories
JPH10199296A (ja) * 1997-01-09 1998-07-31 Mitsubishi Electric Corp ダイナミック型半導体記憶装置およびそのテスト方法
US6216239B1 (en) * 1997-09-15 2001-04-10 Integrated Device Technology, Inc. Testing method and apparatus for identifying disturbed cells within a memory cell array
DE10140853B4 (de) * 2001-08-21 2004-11-11 Robert Bosch Gmbh Verfahren zum Hochvolt-Screening einer integrierten Schaltung

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4301535A (en) * 1979-07-02 1981-11-17 Mostek Corporation Programmable read only memory integrated circuit with bit-check and deprogramming modes and methods for programming and testing said circuit
GB2089612B (en) * 1980-12-12 1984-08-30 Tokyo Shibaura Electric Co Nonvolatile semiconductor memory device
JPS589286A (ja) * 1981-07-10 1983-01-19 Toshiba Corp 不揮発性半導体メモリ
JPS6035760B2 (ja) * 1980-12-18 1985-08-16 富士通株式会社 半導体記憶装置
EP0055594B1 (de) * 1980-12-23 1988-07-13 Fujitsu Limited Elektrisch programmierbares Festwerthalbleiterspeichergerät
EP0101107A2 (de) * 1982-07-19 1984-02-22 Motorola, Inc. Verfahren zum Prüfen einer Halbleiterspeichermatrix
JPS59107493A (ja) * 1982-12-09 1984-06-21 Ricoh Co Ltd テスト回路付きepromメモリ装置
IT1221018B (it) * 1985-03-28 1990-06-21 Giulio Casagrande Dispositivo per verificare celle di memoria in funzione del salto di soglia ottenibile in fase di scrittura
JPS62114200A (ja) * 1985-11-13 1987-05-25 Mitsubishi Electric Corp 半導体メモリ装置
JPS62177799A (ja) * 1986-01-30 1987-08-04 Toshiba Corp 半導体記憶装置

Also Published As

Publication number Publication date
KR900006144B1 (ko) 1990-08-24
EP0251429A2 (de) 1988-01-07
US4956816A (en) 1990-09-11
EP0251429B1 (de) 1992-05-13
EP0251429A3 (en) 1989-04-05
JPH0467280B2 (de) 1992-10-27
JPS62229599A (ja) 1987-10-08
KR870009396A (ko) 1987-10-26

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Free format text: A. HANSMANN UND KOLLEGEN, 81369 MUENCHEN

8320 Willingness to grant licences declared (paragraph 23)
8328 Change in the person/name/address of the agent

Representative=s name: HANSMANN & VOGESER, 81369 MUENCHEN