KR890005894A - Cmos장치의 제조방법 - Google Patents

Cmos장치의 제조방법 Download PDF

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KR890005894A
KR890005894A KR1019880011830A KR880011830A KR890005894A KR 890005894 A KR890005894 A KR 890005894A KR 1019880011830 A KR1019880011830 A KR 1019880011830A KR 880011830 A KR880011830 A KR 880011830A KR 890005894 A KR890005894 A KR 890005894A
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후-타이류
유-핀한
랜돌프 브라이언트 프랭크
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포올 벨로트
에스지에스 톰슨 마이크로 일렉트로닉스 인코오포레이티드
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823878—Complementary field-effect transistors, e.g. CMOS isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0928—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors comprising both N- and P- wells in the substrate, e.g. twin-tub

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

내용 없음

Description

CMOS장치의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1,2,3는 본 발명의 구체적 실시예에 따른 CMOS IC장치의 연속 제조과정에 있어서의 실리콘 웨이퍼부분의 단면도들을 도시한 것이다.

Claims (5)

  1. N형과 P형 트랜지스터들을 포함하는 CMOS IC장치의 제조방법에 있어서, 그 내에 N형과 P형 트랜지스터가 형성되는 인접하는 P형과 N형 웰을 활성면 위에 포함하는 실리콘 웨이퍼를 만들고, 형성되는 트랜지스터에 대해 전압 스레스홀드를 설정하기 위하여 억셉터 이온들로 상대적으로 얇게 웨이퍼의 활성면에 블랭킷 임플란테이션을 행하고, 그러한 웰들내에 형성되는 P형 트랜지스어에 펀치-스루 프로텍션을 제공하기 위하여 도우너 이온들로 상대적으로 깊게 N형 웰에 선택적으로 임플란테이션을 행하고, 웨이퍼의 활성면상에 게이트 옥사이드층을 형성하고, P 형 및 N웰들내의 게이트 옥사이드 층상에 게이트 전극들을 분리 형성하고, N 형 트랜지스터에 가볍게 도핑된 소오스/드레인을 형성하는데 사용하고, 또한 P형 트랜지스터에 대해 헤일로우 효과를 제공하기 위하여 도우너 이온들로 웨이퍼에 블랭킷 임플란테이션을 행하고, 게이트 전극들의 측면 가장자리들에 유전체 스페이서들을 형성하고, P형 트랜지스터의 소오스/트레인 영역 및 관련 헤일로우들을 형성하기 위하여 가속전압과 적당량의 도우너 및 억셉터 이온들로 N형 웰에 선택성 임플란테이션을 행하고, 더 무겁게 도핑된 실리콘내의 더 빠른 옥사이드 성장에 따른 차등 옥사이드 성장에 의해서 P형 웰상에서 보다 N형 웰상에서 더 두꺼운 옥사이드 층을 형성하고, 및 N형 트랜지스터의 소오스 드레인 영역을 형성하기 위하여 P형 웰 위에 덜 무겁게 도핑된 옥사이드 층을 선택적으로 침투시키기 위해 도우너 이온들로 블랭킷 임플란테이션을 행하는 단계들로 이루어지는 것을 특징으로 하는 CMOS장치의 제조방법.
  2. 제 1 항에 있어서, 각각의 게이트 전극들은 게이트 옥사이드 층과의 경계면에서 도우너-도핑된 폴리실리콘 층을 포함하는 것을 특징으로 하는 CMOS장치의 제조방법.
  3. N형과 P형 트랜지스터들을 포함하는 CMOS IC장치의 제조방법에 있어서, N형과 P형 트랜지스터가 형성되는 인접 하는 P형과 N형 웰을 활성면 위에 포함하는 실리콘 웨이퍼를 만들고, 형성되는 트랜지스터에 대해 전압 스레스홀드를 설정하기 위하여 억셉터 이온들로 상대적으로 얇게 웨이퍼의 활성면에 블랭킷 임플란테이션을 행하고, 그러한 웰들내에 형성되는 P형 트랜지스터에 펀치-스루 프로텍션을 제공하기 위하여 도우너 이온들로 상대적으로 깊게 N형 웰에 선택적으로 임플란테이션을 행하고, 웨이퍼의 활성면상에 게이트 옥사이드층을 형성하고, P형 및 N형 웰들내의 게이트 옥사이드 층상에 게이트 전극들을 분리 형성하고, N형 트랜지스터에 가볍게 도핑된 소오스/드레인을 형성하는데 사용하고, 또한 P형 트랜지스터에 대해 헤일로우 효과를 제공하기 위하여 도우너 이온들로 웨이퍼에 블랭킷 임플란테이션을 행하고, 게이트 전극들의 측면 가장자리들에 유전체 스페이서들을 형성하고, P형 트랜지스터의 소오스/드레인 영역 및 관련 헤일로우들을 형성하기 위하여 가속전압과 적당량의 도우너 및 억셉터 이온들로 N형 웰에 선택성 임플란테이션을 행하고, 및 N형 트랜지스터의 소오스/드레인 영역을 형성하기 위하여 가속전압과 적당량의 도우너 이온들로 P형 웰에 선택성 임플란테이션을 행하는 단계들로 이루어지는 것을 특징으로 하는 CMOS장치의 제조방법.
  4. N형과 P형 트랜지스터들을 포함하는 CMOS IC장치의 제조방법에 있어서, 그 내에 N형과 P형 트랜지스터가 형성되는 인접하는 P형과 N형 웰을 활성면 위에 포함하는 실리콘 웨이퍼를 만들고, 형성되는 트랜지스터에 대해 전압 스레스홀드를 설정하기 위하여 억셉터 이온들로 상대적으로 얇게 웨이퍼의 활성면에 블랭킷 임플란테이션을 행하고, 그러한 웰들내에 형성되는 P형 트랜지스터에 펀치-스루 프로텍션을 제공하기 위하여 도우너 이온들로 상대적으로 깊게 N형 웰에 선택적으로 임플란테이션을 행하고, 웨이퍼의 활성면상에 게이트 옥사이드층을 형성하고, 게이트상에 게이트 전극들을 분리형성하고, N형 트랜지스터에 가볍게 도핑된 소오스/드레인을 형성하는데 사용하고, 또한 P형 트랜지스터에 대해 헤일로우 효과를 제공하기 위하여 도우너 이온들로 웨이퍼에 블랭킷 임플란테이션을 행하고, 게이트 전극들의 측면 가장자리들에 유전체 스페이서들을 형성하고, N형 트랜지스터의 소오스/드레인 영역 및 관련 헤일로우들을 형성하기 위하여 가속전압과 적당량의 도우너 및 억셉터 이온들로 N형 웰에 선택성 임플란테이션을 행하고, 및 N형 트랜지스터의 소오스/드레인 영역 및 관련 헤일오루들을 형성하기 위하여 가속전압과 적당량의 도우너 및 억셉터 이온들로 N형 웰에 선택성 임플란테이션을 행하는 단계들로 이루어지는 것을 특징으로 하는 CMOS장치의 제조방법.
  5. 제 3 항 또는 제 4 항에 있어서, 각각의 게이트 전극들은 게이트 옥사이드 층과의 경계면에서 도우너-도핑된 실리콘 층을 포함하는 것을 특징으로 하는 CMOS장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019880011830A 1987-09-18 1988-09-13 Cmos 장치의 제조방법 KR0130549B1 (ko)

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Application Number Priority Date Filing Date Title
US07/099,144 US4771014A (en) 1987-09-18 1987-09-18 Process for manufacturing LDD CMOS devices
US099,144 1987-09-18
US099144 1987-09-18

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KR890005894A true KR890005894A (ko) 1989-05-17
KR0130549B1 KR0130549B1 (ko) 1998-04-06

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US (1) US4771014A (ko)
EP (1) EP0308295B1 (ko)
JP (1) JP2663402B2 (ko)
KR (1) KR0130549B1 (ko)
DE (1) DE3881799T2 (ko)

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EP0308295B1 (en) 1993-06-16
US4771014A (en) 1988-09-13
DE3881799T2 (de) 1993-10-07
JP2663402B2 (ja) 1997-10-15
KR0130549B1 (ko) 1998-04-06
JPH01101662A (ja) 1989-04-19
EP0308295A1 (en) 1989-03-22
DE3881799D1 (de) 1993-07-22

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