KR880013166A - 백 바이어스 전압 발생기 - Google Patents
백 바이어스 전압 발생기 Download PDFInfo
- Publication number
- KR880013166A KR880013166A KR870004241A KR870004241A KR880013166A KR 880013166 A KR880013166 A KR 880013166A KR 870004241 A KR870004241 A KR 870004241A KR 870004241 A KR870004241 A KR 870004241A KR 880013166 A KR880013166 A KR 880013166A
- Authority
- KR
- South Korea
- Prior art keywords
- back bias
- bias voltage
- output
- charge pump
- circuit
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/08—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/205—Substrate bias-voltage generators
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
- G11C5/146—Substrate bias generators
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Nonlinear Science (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Semiconductor Integrated Circuits (AREA)
- Static Random-Access Memory (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 따른 회로도, 제2도는 제1도의 동작 파형도.
Claims (1)
- 반도체 칩상에 내장되며 반도체 기판에 백 바이어스를 공급하기 위한 백 바이어스 발생기에 있어서, 소정 주파수의 구형파를 발생하는 발진기(10)와, 상기 발진기 출력을 입력하여 전원 공급전압 레벨의 구형파로 만드는 버퍼회로(20)와, 상기 버퍼회로의 출력을 입력하여 백 바이어스 전압을 출력하는 챠아지 펌프회로(30)와, 상기 챠아지 펌프회로의 출력단과 접지 사이에 병렬로 접속되며 상기 전원 공급전압의 변동에 따라 상기 챠아지 펌프회로에서 출력하는 백 바이어스 전압을 소정범위로 클램핑하는 클램핑 회로(40)를 구비함을 특징으로 하는 반도체 회로.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Priority Applications (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019870004241A KR890005159B1 (ko) | 1987-04-30 | 1987-04-30 | 백 바이어스 전압 발생기 |
JP63099289A JPH01165090A (ja) | 1987-04-30 | 1988-04-21 | バックバイアス電圧発生回路 |
NL8801058A NL194688C (nl) | 1987-04-30 | 1988-04-22 | Instelspanningsbron. |
DE3814667A DE3814667A1 (de) | 1987-04-30 | 1988-04-28 | Rueckspannungsgenerator |
FR8805669A FR2614724B1 (fr) | 1987-04-30 | 1988-04-28 | Circuit de generation de tension de polarisation de substrat |
US07/187,930 US4920280A (en) | 1987-04-30 | 1988-04-29 | Back bias generator |
GB8810391A GB2204456B (en) | 1987-04-30 | 1988-05-03 | Back bias generator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019870004241A KR890005159B1 (ko) | 1987-04-30 | 1987-04-30 | 백 바이어스 전압 발생기 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR880013166A true KR880013166A (ko) | 1988-11-30 |
KR890005159B1 KR890005159B1 (ko) | 1989-12-14 |
Family
ID=19261097
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019870004241A KR890005159B1 (ko) | 1987-04-30 | 1987-04-30 | 백 바이어스 전압 발생기 |
Country Status (7)
Country | Link |
---|---|
US (1) | US4920280A (ko) |
JP (1) | JPH01165090A (ko) |
KR (1) | KR890005159B1 (ko) |
DE (1) | DE3814667A1 (ko) |
FR (1) | FR2614724B1 (ko) |
GB (1) | GB2204456B (ko) |
NL (1) | NL194688C (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7486576B2 (en) | 2003-07-02 | 2009-02-03 | Samsung Electronics Co., Ltd. | Methods and devices for preventing data stored in memory from being read out |
Families Citing this family (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0289357A (ja) * | 1988-09-27 | 1990-03-29 | Nec Corp | 半導体回路 |
JPH02215154A (ja) * | 1989-02-16 | 1990-08-28 | Toshiba Corp | 電圧制御回路 |
KR920010749B1 (ko) * | 1989-06-10 | 1992-12-14 | 삼성전자 주식회사 | 반도체 집적소자의 내부전압 변환회로 |
GB9007791D0 (en) * | 1990-04-06 | 1990-06-06 | Foss Richard C | High voltage boosted wordline supply charge pump and regulator for dram |
US5267201A (en) * | 1990-04-06 | 1993-11-30 | Mosaid, Inc. | High voltage boosted word line supply charge pump regulator for DRAM |
GB9007790D0 (en) | 1990-04-06 | 1990-06-06 | Lines Valerie L | Dynamic memory wordline driver scheme |
JP2805991B2 (ja) * | 1990-06-25 | 1998-09-30 | ソニー株式会社 | 基板バイアス発生回路 |
DE59107793D1 (de) * | 1991-02-21 | 1996-06-13 | Siemens Ag | Regelschaltung für einen Substratvorspannungsgenerator |
KR940003153B1 (ko) * | 1991-04-12 | 1994-04-15 | 금성일렉트론 주식회사 | 백바이어스 발생회로 |
DE4130191C2 (de) * | 1991-09-30 | 1993-10-21 | Samsung Electronics Co Ltd | Konstantspannungsgenerator für eine Halbleitereinrichtung mit kaskadierter Auflade- bzw. Entladeschaltung |
KR970003809B1 (ko) * | 1991-12-09 | 1997-03-22 | 후지쓰 가부시끼가이샤 | 소거특성을 개량한 플래쉬메모리 및 그것에 대한 회로 |
US5260646A (en) * | 1991-12-23 | 1993-11-09 | Micron Technology, Inc. | Low power regulator for a voltage generator circuit |
JP2632112B2 (ja) * | 1992-07-27 | 1997-07-23 | 三菱電機株式会社 | 電圧発生回路 |
DE59308057D1 (de) * | 1992-08-04 | 1998-03-05 | Siemens Ag | Ansteuerschaltung für einen Leistungs-MOSFET mit sourceseitiger Last |
US5355028A (en) * | 1992-10-23 | 1994-10-11 | Micron Technology, Inc. | Lower power CMOS buffer amplifier for use in integrated circuit substrate bias generators |
US5629843A (en) * | 1993-10-15 | 1997-05-13 | Micron Technology, Inc. | Self compensating clamp circuit and method for limiting a potential at a pump circuit node |
US5811990A (en) * | 1993-10-15 | 1998-09-22 | Micron Technology, Inc. | Voltage pump and a level translator circuit |
DE69328623T2 (de) * | 1993-11-30 | 2001-02-08 | St Microelectronics Srl | Stabile Referenzspannungsgeneratorschaltung |
KR100307514B1 (ko) * | 1994-07-30 | 2001-12-01 | 김영환 | 차지펌프회로 |
JP3102833B2 (ja) | 1994-09-06 | 2000-10-23 | 株式会社 沖マイクロデザイン | 昇圧回路 |
US5627458A (en) * | 1995-07-14 | 1997-05-06 | Nevin; Larry J. | Integrated negative D-C bias circuit |
US6064250A (en) | 1996-07-29 | 2000-05-16 | Townsend And Townsend And Crew Llp | Various embodiments for a low power adaptive charge pump circuit |
EP1028363B1 (en) * | 1996-07-29 | 2003-02-12 | Townsend and Townsend and Crew LLP | Charge pump for a semiconductor substrate |
KR100649973B1 (ko) * | 2005-09-14 | 2006-11-27 | 주식회사 하이닉스반도체 | 내부 전압 발생 장치 |
TWI407694B (zh) * | 2010-01-27 | 2013-09-01 | Novatek Microelectronics Corp | 可抑制電壓過衝之輸出緩衝電路及方法 |
US10678287B2 (en) | 2018-10-15 | 2020-06-09 | Globalfoundries Inc. | Positive and negative full-range back-bias generator circuit structure |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6044752B2 (ja) * | 1978-04-24 | 1985-10-05 | 日本電気株式会社 | ダイナミツクメモリ |
US4307307A (en) * | 1979-08-09 | 1981-12-22 | Parekh Rajesh H | Bias control for transistor circuits incorporating substrate bias generators |
JPS56110252A (en) * | 1980-02-05 | 1981-09-01 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor memory device |
JPS57199335A (en) * | 1981-06-02 | 1982-12-07 | Toshiba Corp | Generating circuit for substrate bias |
US4438346A (en) * | 1981-10-15 | 1984-03-20 | Advanced Micro Devices, Inc. | Regulated substrate bias generator for random access memory |
US4439692A (en) * | 1981-12-07 | 1984-03-27 | Signetics Corporation | Feedback-controlled substrate bias generator |
US4433253A (en) * | 1981-12-10 | 1984-02-21 | Standard Microsystems Corporation | Three-phase regulated high-voltage charge pump |
JPS60261099A (ja) * | 1984-06-07 | 1985-12-24 | Mitsubishi Electric Corp | 半導体記憶装置 |
US4631421A (en) * | 1984-08-14 | 1986-12-23 | Texas Instruments | CMOS substrate bias generator |
JPS61217991A (ja) * | 1985-03-25 | 1986-09-27 | Hitachi Ltd | 半導体メモリ |
US4794278A (en) * | 1987-12-30 | 1988-12-27 | Intel Corporation | Stable substrate bias generator for MOS circuits |
-
1987
- 1987-04-30 KR KR1019870004241A patent/KR890005159B1/ko not_active IP Right Cessation
-
1988
- 1988-04-21 JP JP63099289A patent/JPH01165090A/ja active Pending
- 1988-04-22 NL NL8801058A patent/NL194688C/nl not_active IP Right Cessation
- 1988-04-28 FR FR8805669A patent/FR2614724B1/fr not_active Expired - Lifetime
- 1988-04-28 DE DE3814667A patent/DE3814667A1/de active Granted
- 1988-04-29 US US07/187,930 patent/US4920280A/en not_active Expired - Lifetime
- 1988-05-03 GB GB8810391A patent/GB2204456B/en not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7486576B2 (en) | 2003-07-02 | 2009-02-03 | Samsung Electronics Co., Ltd. | Methods and devices for preventing data stored in memory from being read out |
Also Published As
Publication number | Publication date |
---|---|
JPH01165090A (ja) | 1989-06-29 |
DE3814667C2 (ko) | 1993-09-16 |
GB2204456A (en) | 1988-11-09 |
NL8801058A (nl) | 1988-11-16 |
NL194688B (nl) | 2002-07-01 |
FR2614724A1 (fr) | 1988-11-04 |
DE3814667A1 (de) | 1988-11-17 |
NL194688C (nl) | 2002-11-04 |
US4920280A (en) | 1990-04-24 |
GB8810391D0 (en) | 1988-06-08 |
GB2204456B (en) | 1991-08-14 |
KR890005159B1 (ko) | 1989-12-14 |
FR2614724B1 (fr) | 1992-12-31 |
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A201 | Request for examination | ||
N231 | Notification of change of applicant | ||
E902 | Notification of reason for refusal | ||
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E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20051109 Year of fee payment: 17 |
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