JPS56110252A - Semiconductor memory device - Google Patents

Semiconductor memory device

Info

Publication number
JPS56110252A
JPS56110252A JP1285780A JP1285780A JPS56110252A JP S56110252 A JPS56110252 A JP S56110252A JP 1285780 A JP1285780 A JP 1285780A JP 1285780 A JP1285780 A JP 1285780A JP S56110252 A JPS56110252 A JP S56110252A
Authority
JP
Japan
Prior art keywords
memory cell
cell plate
voltage
unit
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1285780A
Other languages
Japanese (ja)
Inventor
Takashi Watanabe
Tsuneo Mano
Junichi Inoue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP1285780A priority Critical patent/JPS56110252A/en
Priority to GB8102425A priority patent/GB2068639B/en
Priority to FR8102011A priority patent/FR2475272B1/en
Priority to CA000370042A priority patent/CA1137221A/en
Priority to DE3103809A priority patent/DE3103809C2/en
Priority to NL8100532A priority patent/NL8100532A/en
Publication of JPS56110252A publication Critical patent/JPS56110252A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/205—Substrate bias-voltage generators
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE: To increase a charge accumulated in a memory unit and stabilize memory action by providing a circuit to generate a cell plate voltage which is higher than a power supply voltage.
CONSTITUTION: A memory cell plate 3 is formed as a metal electrode through a thin insulation film 2 on a semiconductor substrate 1, so that a memory cell of MIS structure is constituted. A diffusion layer 6 connected to a word line 4 and a bit line 5 composes an MIS transistor Q1. Then a cell plate voltage generating circuit 7 which generates a voltage which is higher than a power supply voltage VDD supplied to this unit is provided on a semiconductor chip constituting the unit and the same chip, and an output voltage from the circuit 7 is applied to a memory cell plate 3. Consequently, the amplitude range of a bit line which is effective for the control of a charge accumulated in a memory cell is extended and the maximum accumulated charge is increased.
COPYRIGHT: (C)1981,JPO&Japio
JP1285780A 1980-02-05 1980-02-05 Semiconductor memory device Pending JPS56110252A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP1285780A JPS56110252A (en) 1980-02-05 1980-02-05 Semiconductor memory device
GB8102425A GB2068639B (en) 1980-02-05 1981-01-27 Semiconductor memory device
FR8102011A FR2475272B1 (en) 1980-02-05 1981-02-03 SEMICONDUCTOR MEMORY DEVICE
CA000370042A CA1137221A (en) 1980-02-05 1981-02-04 Semiconductor memory device
DE3103809A DE3103809C2 (en) 1980-02-05 1981-02-04 Semiconductor memory device
NL8100532A NL8100532A (en) 1980-02-05 1981-02-04 SEMICONDUCTOR MEMORY DEVICE.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1285780A JPS56110252A (en) 1980-02-05 1980-02-05 Semiconductor memory device

Publications (1)

Publication Number Publication Date
JPS56110252A true JPS56110252A (en) 1981-09-01

Family

ID=11817066

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1285780A Pending JPS56110252A (en) 1980-02-05 1980-02-05 Semiconductor memory device

Country Status (6)

Country Link
JP (1) JPS56110252A (en)
CA (1) CA1137221A (en)
DE (1) DE3103809C2 (en)
FR (1) FR2475272B1 (en)
GB (1) GB2068639B (en)
NL (1) NL8100532A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60253090A (en) * 1984-05-30 1985-12-13 Hitachi Ltd Semiconductor device
KR890005159B1 (en) * 1987-04-30 1989-12-14 삼성전자 주식회사 The generator of back-bias voltage
US6825878B1 (en) * 1998-12-08 2004-11-30 Micron Technology, Inc. Twin P-well CMOS imager

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE789500A (en) * 1971-09-30 1973-03-29 Siemens Ag SEMICONDUCTOR MEMORY WITH SINGLE TRANSISTOR MEMORIZATION ELEMENTS
DE2450116C2 (en) * 1974-10-22 1976-09-16 Siemens AG, 1000 Berlin und 8000 München One transistor dynamic memory element for non-volatile memory and method for its operation
DE2632199A1 (en) * 1976-07-16 1978-01-19 Siemens Ag Integratable voltage multiplier with cascaded FET stages - each providing supply for next stage and each having two cross-coupled FETs
JPS5644189A (en) * 1979-09-19 1981-04-23 Hitachi Ltd Semiconductor memory

Also Published As

Publication number Publication date
GB2068639A (en) 1981-08-12
NL8100532A (en) 1981-09-01
FR2475272A1 (en) 1981-08-07
FR2475272B1 (en) 1986-02-28
CA1137221A (en) 1982-12-07
GB2068639B (en) 1983-10-26
DE3103809A1 (en) 1981-12-17
DE3103809C2 (en) 1988-03-03

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