KR20150087315A - 구성 정보를 저장하기 위해 예비 섹터를 지닌 메모리 셀 어레이 - Google Patents

구성 정보를 저장하기 위해 예비 섹터를 지닌 메모리 셀 어레이 Download PDF

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Publication number
KR20150087315A
KR20150087315A KR1020157015991A KR20157015991A KR20150087315A KR 20150087315 A KR20150087315 A KR 20150087315A KR 1020157015991 A KR1020157015991 A KR 1020157015991A KR 20157015991 A KR20157015991 A KR 20157015991A KR 20150087315 A KR20150087315 A KR 20150087315A
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KR
South Korea
Prior art keywords
cell array
word line
volatile
configuration information
memory cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1020157015991A
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English (en)
Korean (ko)
Inventor
정필 김
태현 김
성렬 김
Original Assignee
퀄컴 인코포레이티드
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Publication date
Application filed by 퀄컴 인코포레이티드 filed Critical 퀄컴 인코포레이티드
Publication of KR20150087315A publication Critical patent/KR20150087315A/ko
Withdrawn legal-status Critical Current

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/20—Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/20—Initialising; Data preset; Chip identification
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/44—Indication or identification of errors, e.g. for repair
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/785—Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes
    • G11C29/789—Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes using non-volatile cells or latches
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C2029/4402—Internal storage of test result, quality data, chip identification, repair information

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  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
  • Static Random-Access Memory (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
KR1020157015991A 2012-11-19 2013-11-19 구성 정보를 저장하기 위해 예비 섹터를 지닌 메모리 셀 어레이 Withdrawn KR20150087315A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/680,361 US8913450B2 (en) 2012-11-19 2012-11-19 Memory cell array with reserved sector for storing configuration information
US13/680,361 2012-11-19

Publications (1)

Publication Number Publication Date
KR20150087315A true KR20150087315A (ko) 2015-07-29

Family

ID=49759554

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020157015991A Withdrawn KR20150087315A (ko) 2012-11-19 2013-11-19 구성 정보를 저장하기 위해 예비 섹터를 지닌 메모리 셀 어레이

Country Status (6)

Country Link
US (1) US8913450B2 (enExample)
EP (1) EP2920788A2 (enExample)
JP (1) JP2016512646A (enExample)
KR (1) KR20150087315A (enExample)
CN (1) CN104798136A (enExample)
WO (1) WO2014078864A2 (enExample)

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US9262259B2 (en) * 2013-01-14 2016-02-16 Qualcomm Incorporated One-time programmable integrated circuit security
US9799412B2 (en) * 2014-09-30 2017-10-24 Sony Semiconductor Solutions Corporation Memory having a plurality of memory cells and a plurality of word lines
US9842662B2 (en) * 2015-02-16 2017-12-12 Texas Instruments Incorporated Screening for data retention loss in ferroelectric memories
US9401226B1 (en) * 2015-09-14 2016-07-26 Qualcomm Incorporated MRAM initialization devices and methods
US9911510B1 (en) * 2016-10-07 2018-03-06 Arm Limited Redundancy schemes for memory cell repair
CN107506253B (zh) * 2017-08-11 2021-05-18 北京东土科技股份有限公司 一种操作系统异常信息保存方法及装置
US10643672B2 (en) * 2018-03-23 2020-05-05 Micron Technology, Inc. Memory with non-volatile configurations for efficient power management and operation of the same
US11327860B2 (en) * 2020-02-11 2022-05-10 Taiwan Semiconductor Manufacturing Company, Ltd. Memory device and methods for programming and reading memory device
KR20220094990A (ko) * 2020-12-29 2022-07-06 삼성전자주식회사 불량 워드라인의 리페어를 위한 메모리 장치, 메모리 컨트롤러 및 이를 포함하는 스토리지 장치
CN115295053B (zh) * 2022-09-30 2023-01-10 芯天下技术股份有限公司 配置信息存储电路、易失性配置方法、装置及闪速存储器

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JP3828222B2 (ja) * 1996-02-08 2006-10-04 株式会社日立製作所 半導体記憶装置
US6462985B2 (en) * 1999-12-10 2002-10-08 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory for storing initially-setting data
JP2001176290A (ja) * 1999-12-10 2001-06-29 Toshiba Corp 不揮発性半導体記憶装置
US6614703B2 (en) 2000-01-13 2003-09-02 Texas Instruments Incorporated Method and system for configuring integrated systems on a chip
JP2002150789A (ja) * 2000-11-09 2002-05-24 Hitachi Ltd 不揮発性半導体記憶装置
CN1717662B (zh) 2002-11-28 2010-04-28 株式会社瑞萨科技 存储器模块、存储器系统和信息仪器
JP4136646B2 (ja) * 2002-12-20 2008-08-20 スパンション エルエルシー 半導体記憶装置及びその制御方法
US7181650B2 (en) * 2003-06-02 2007-02-20 Atmel Corporation Fault tolerant data storage circuit
US7177977B2 (en) * 2004-03-19 2007-02-13 Sandisk Corporation Operating non-volatile memory without read disturb limitations
JP2005327337A (ja) * 2004-05-12 2005-11-24 Matsushita Electric Ind Co Ltd 半導体記憶装置
DE102004047813A1 (de) 2004-09-29 2006-03-30 Infineon Technologies Ag Halbleiterbaustein mit einer Umlenkschaltung
CN101091222A (zh) * 2004-10-26 2007-12-19 斯班逊有限公司 非易失性存储装置
JP5016841B2 (ja) 2006-04-26 2012-09-05 株式会社東芝 不揮発性半導体記憶装置
KR100898673B1 (ko) * 2007-08-08 2009-05-22 주식회사 하이닉스반도체 플래시 메모리 소자 및 그 동작 방법
US7694196B2 (en) 2007-11-20 2010-04-06 Qimonda North America Corp. Self-diagnostic scheme for detecting errors
US8015438B2 (en) 2007-11-29 2011-09-06 Qimonda Ag Memory circuit
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US7768847B2 (en) 2008-04-09 2010-08-03 Rambus Inc. Programmable memory repair scheme
JP2010171210A (ja) * 2009-01-23 2010-08-05 Seiko Epson Corp 不揮発性記憶装置、集積回路装置及び電子機器
JP2010176746A (ja) * 2009-01-29 2010-08-12 Seiko Epson Corp 不揮発性記憶装置、集積回路装置及び電子機器
JP2010182389A (ja) * 2009-02-09 2010-08-19 Seiko Epson Corp 不揮発性記憶装置、集積回路装置及び電子機器
JP5337121B2 (ja) 2009-09-17 2013-11-06 株式会社東芝 不揮発性半導体記憶装置
KR101083681B1 (ko) 2010-07-02 2011-11-16 주식회사 하이닉스반도체 비휘발성 메모리 장치
US20120173921A1 (en) 2011-01-05 2012-07-05 Advanced Micro Devices, Inc. Redundancy memory storage system and a method for controlling a redundancy memory storage system

Also Published As

Publication number Publication date
EP2920788A2 (en) 2015-09-23
JP2016512646A (ja) 2016-04-28
CN104798136A (zh) 2015-07-22
WO2014078864A3 (en) 2014-10-16
WO2014078864A2 (en) 2014-05-22
US20140140162A1 (en) 2014-05-22
US8913450B2 (en) 2014-12-16

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PA0105 International application

Patent event date: 20150616

Patent event code: PA01051R01D

Comment text: International Patent Application

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid