KR20040086189A - 탄성 표면파 디바이스 및 그 제조 방법 - Google Patents
탄성 표면파 디바이스 및 그 제조 방법 Download PDFInfo
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- KR20040086189A KR20040086189A KR1020040019611A KR20040019611A KR20040086189A KR 20040086189 A KR20040086189 A KR 20040086189A KR 1020040019611 A KR1020040019611 A KR 1020040019611A KR 20040019611 A KR20040019611 A KR 20040019611A KR 20040086189 A KR20040086189 A KR 20040086189A
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- acoustic wave
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
- H03H9/05—Holders; Supports
- H03H9/10—Mounting in enclosures
- H03H9/1064—Mounting in enclosures for surface acoustic wave [SAW] devices
- H03H9/1092—Mounting in enclosures for surface acoustic wave [SAW] devices the enclosure being defined by a cover cap mounted on an element forming part of the surface acoustic wave [SAW] device on the side of the IDT's
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- E—FIXED CONSTRUCTIONS
- E06—DOORS, WINDOWS, SHUTTERS, OR ROLLER BLINDS IN GENERAL; LADDERS
- E06B—FIXED OR MOVABLE CLOSURES FOR OPENINGS IN BUILDINGS, VEHICLES, FENCES OR LIKE ENCLOSURES IN GENERAL, e.g. DOORS, WINDOWS, BLINDS, GATES
- E06B5/00—Doors, windows, or like closures for special purposes; Border constructions therefor
- E06B5/10—Doors, windows, or like closures for special purposes; Border constructions therefor for protection against air-raid or other war-like action; for other protective purposes
- E06B5/16—Fireproof doors or similar closures; Adaptations of fixed constructions therefor
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- A—HUMAN NECESSITIES
- A62—LIFE-SAVING; FIRE-FIGHTING
- A62C—FIRE-FIGHTING
- A62C2/00—Fire prevention or containment
- A62C2/06—Physical fire-barriers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
- H03H9/05—Holders; Supports
- H03H9/0538—Constructional combinations of supports or holders with electromechanical or other electronic elements
- H03H9/0547—Constructional combinations of supports or holders with electromechanical or other electronic elements consisting of a vertical arrangement
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
- H03H9/05—Holders; Supports
- H03H9/058—Holders; Supports for surface acoustic wave devices
- H03H9/0585—Holders; Supports for surface acoustic wave devices consisting of an adhesive layer
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
- H03H9/05—Holders; Supports
- H03H9/058—Holders; Supports for surface acoustic wave devices
- H03H9/059—Holders; Supports for surface acoustic wave devices consisting of mounting pads or bumps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/42—Piezoelectric device making
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- Physics & Mathematics (AREA)
- Acoustics & Sound (AREA)
- Engineering & Computer Science (AREA)
- Civil Engineering (AREA)
- Structural Engineering (AREA)
- Health & Medical Sciences (AREA)
- Public Health (AREA)
- Business, Economics & Management (AREA)
- Emergency Management (AREA)
- Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
Abstract
Description
Claims (16)
- 빗형 전극과 해당 빗형 전극에 전기적으로 접속된 제1 전극 패드가 제1 주면 위에 형성된 압전 기판과, 상기 제1 전극 패드와 접속되는 제2 전극 패드가 제2 주면 위에 형성된 베이스 기판을 갖는 탄성 표면파 디바이스에 있어서,상기 빗형 전극을 둘러싸도록 상기 제1 주면 위에 형성된 제1 막과,상기 제1 및 제2 전극 패드를 접합했을 때에 상기 제1 막과 대응하는 상기 제2 주면 위의 영역에 형성된 제2 막을 갖고,상기 제1 및 제2 막의 표면에 활성화 처리가 실시되어 있으며,상기 제1 및 제2 막의 상기 활성화 처리가 실시된 면을 접합함으로써 상기 빗형 전극이 밀봉되어 있는 것을 특징으로 하는 탄성 표면파 디바이스.
- 제1항에 있어서,상기 제1 및/또는 제2 막은 금속을 주성분으로 하여 형성되어 있는 것을 특징으로 하는 탄성 표면파 디바이스.
- 제1항에 있어서,상기 제1 및 제2 막의 접합면이 금을 포함하여 이루어지는 것을 특징으로 하는 탄성 표면파 디바이스.
- 제1항 내지 제3항 중 어느 한 항에 있어서,상기 베이스 기판이 반도체 기판 또는 절연체 기판으로 형성되어 있는 것을 특징으로 하는 탄성 표면파 디바이스.
- 제1항 내지 제3항 중 어느 한 항에 있어서,상기 베이스 기판이 실리콘 기판으로 형성되어 있는 것을 특징으로 하는 탄성 표면파 디바이스.
- 제1항 내지 제5항 중 어느 한 항에 있어서,상기 제2 주면 위에 형성된 전자 소자를 갖는 것을 특징으로 하는 탄성 표면파 디바이스.
- 제6항에 있어서,상기 전자 소자는 상기 빗형 전극 및 상기 제1 전극 패드를 포함하여 구성된 탄성 표면파 소자에의 입력 임피던스를 변환하는 임피던스 변환 회로인 것을 특징으로 하는 탄성 표면파 디바이스.
- 제1항 내지 제7항 중 어느 한 항에 있어서,상기 빗형 전극 및 상기 제1 전극 패드를 복수 가짐으로써, 송신용 필터와 수신용 필터가 형성되어 있는 것을 특징으로 하는 탄성 표면파 디바이스.
- 제8항에 있어서,상기 송신용 필터와 상기 수신용 필터에 공통인 입력 단자를 상기 제2 주면 위에 갖고,상기 입력 단자와 상기 송신용 필터 및/또는 상기 수신용 필터와의 사이에 입력 임피던스를 변환하는 임피던스 변환 회로를 상기 제1 및/또는 제2 주면 위에 갖는 것을 특징으로 하는 탄성 표면파 디바이스.
- 제1항 내지 제9항 중 어느 한 항에 있어서,상기 베이스 기판을 관통하는 비아 배선을 갖고,상기 비아 배선을 개재하여 상기 제2 전극 패드가 상기 베이스 기판의 상기 제2 주면과 반대측의 제3 주면에 전기적으로 인출되어 있는 것을 특징으로 하는 탄성 표면파 디바이스.
- 제1항 내지 제10항 중 어느 한 항에 있어서,상기 압전 기판의 상기 제1 주면과 반대측의 제4 주면에 접합된 실리콘 기판 또는 사파이어 기판을 갖고,상기 압전 기판과 상기 실리콘 기판 또는 상기 사파이어 기판과의 접합면에 활성화 처리가 실시되어 있는 것을 특징으로 하는 탄성 표면파 디바이스.
- 빗형 전극과 해당 빗형 전극에 전기적으로 접속된 제1 전극 패드가 제1 주면 위에 형성된 압전 기판과, 상기 제1 전극 패드와 접속되는 제2 전극 패드가 제2 주면 위에 형성된 베이스 기판을 갖는 탄성 표면파 디바이스의 제조 방법에 있어서,상기 제1 주면 위에 상기 빗형 전극을 둘러싸는 제1 막을 형성하는 제1 공정과,상기 제1 및 제2 전극 패드를 접합했을 때에 상기 제1 막과 대응하는 상기 제2 주면 위의 영역에 제2 막을 형성하는 제2 공정과,상기 제1 및 제2 막의 표면에 활성화 처리를 실시하는 제3 공정과,상기 제1 및 제2 막의 상기 활성화 처리가 실시된 면을 접합하는 제4 공정을 포함하는 것을 특징으로 하는 탄성 표면파 디바이스의 제조 방법.
- 제12항에 있어서,상기 제1 및/또는 제2 공정은 상기 제1 및/또는 제2 막을 금속을 주성분으로 하여 형성하는 것을 특징으로 하는 탄성 표면파 디바이스의 제조 방법.
- 제12항 또는 제13항에 있어서,상기 제2 주면 위에 소정의 전자 소자를 형성하는 제5 공정을 포함하는 것을 특징으로 하는 탄성 표면파 디바이스의 제조 방법.
- 제12항 내지 제14항 중 어느 한 항에 있어서,상기 제2 전극 패드를, 상기 베이스 기판의 상기 제2 주면과 반대측의 제3 주면에 전기적으로 인출하기 위한 비아 배선을 형성하는 제6 공정을 포함하는 것을 특징으로 하는 탄성 표면파 디바이스의 제조 방법.
- 제12항 내지 제15항 중 어느 한 항에 있어서,상기 압전 기판의 상기 제1 주면과 반대측의 제4 주면에 실리콘 기판 또는 사파이어 기판을 접합하는 제7 공정을 포함하고,상기 제7 공정은 상기 압전 기판과 상기 실리콘 기판 또는 상기 사파이어 기판과의 접합면에 활성화 처리를 실시한 후, 해당 압전 기판과 해당 실리콘 기판 또는 해당 사파이어 기판을 접합하는 것을 특징으로 하는 탄성 표면파 디바이스의 제조 방법.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JPJP-P-2003-00096577 | 2003-03-31 | ||
JP2003096577A JP2004304622A (ja) | 2003-03-31 | 2003-03-31 | 弾性表面波デバイス及びその製造方法 |
Publications (2)
Publication Number | Publication Date |
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KR20040086189A true KR20040086189A (ko) | 2004-10-08 |
KR100788110B1 KR100788110B1 (ko) | 2007-12-21 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR1020040019611A KR100788110B1 (ko) | 2003-03-31 | 2004-03-23 | 탄성 표면파 디바이스 및 그 제조 방법 |
Country Status (5)
Country | Link |
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US (2) | US7227429B2 (ko) |
EP (1) | EP1471635B1 (ko) |
JP (1) | JP2004304622A (ko) |
KR (1) | KR100788110B1 (ko) |
CN (1) | CN100433551C (ko) |
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- 2004-03-29 EP EP04251855A patent/EP1471635B1/en not_active Expired - Lifetime
- 2004-03-30 CN CNB2004100342113A patent/CN100433551C/zh not_active Expired - Lifetime
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CN1534869A (zh) | 2004-10-06 |
EP1471635A2 (en) | 2004-10-27 |
KR100788110B1 (ko) | 2007-12-21 |
CN100433551C (zh) | 2008-11-12 |
US20040207485A1 (en) | 2004-10-21 |
JP2004304622A (ja) | 2004-10-28 |
EP1471635A3 (en) | 2005-10-12 |
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