KR20030045496A - 저온의 산화방지 허메틱 실링 방법 - Google Patents
저온의 산화방지 허메틱 실링 방법 Download PDFInfo
- Publication number
- KR20030045496A KR20030045496A KR1020010076235A KR20010076235A KR20030045496A KR 20030045496 A KR20030045496 A KR 20030045496A KR 1020010076235 A KR1020010076235 A KR 1020010076235A KR 20010076235 A KR20010076235 A KR 20010076235A KR 20030045496 A KR20030045496 A KR 20030045496A
- Authority
- KR
- South Korea
- Prior art keywords
- layer
- low temperature
- hermetic sealing
- lead
- package base
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 56
- 238000007789 sealing Methods 0.000 title claims abstract description 56
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- 229910000679 solder Inorganic materials 0.000 claims abstract description 45
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- 229910052797 bismuth Inorganic materials 0.000 claims description 6
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Classifications
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
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- B—PERFORMING OPERATIONS; TRANSPORTING
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- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
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- B81C1/00269—Bonding of solid lids or wafers to the substrate
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/163—Connection portion, e.g. seal
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
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- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49146—Assembling to base an electrical component, e.g., capacitor, etc. with encapsulating, e.g., potting, etc.
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49789—Obtaining plural product pieces from unitary workpiece
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49789—Obtaining plural product pieces from unitary workpiece
- Y10T29/49794—Dividing on common outline
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Abstract
Description
Claims (8)
- 준비된 리드 프레임에 접합층, 웨팅층 및 솔더층을 증착하는 단계;상기 솔더층 위에 산화 방지를 위한 제1 보호층을 증착하여 리드를 형성하는 단계;소자가 배치되고, 상기 소자 주변에 메탈층과 제2 보호층이 형성된 패키지 베이스를 준비하는 단계;상기 리드와 패키지 베이스를 조립하고 열을 가하여 실링하는 단계;를 포함하는 것을 특징으로 하는 저온의 산화방지 허메틱 실링 방법.
- 제 1항에 있어서,상기 리드 프레임은 글라스, 석영, Si, 세라믹, Kovar 등 중에 어느 하나로 형성된 것을 특징으로 하는 저온의 산화방지 허메틱 실링 방법.
- 제 1항에 있어서,상기 접합층은 Cr, Ti 또는 이들의 합금으로 이루어진 것을 특징으로 하는 저온의 산화방지 허메틱 실링 방법.
- 제 1항에 있어서,상기 웨팅층은 Ni, Cu 또는 이들의 합금으로 이루어진 것을 특징으로 하는저온의 산화방지 허메틱 실링 방법.
- 제 1항에 있어서,상기 솔더층은 In, Sn, Bi, Ag, Zn 또는 이들의 합금으로 이루어진 것을 특징으로 하는 저온의 산화방지 허메틱 실링 방법.
- 제 1항에 있어서,상기 제1 보호층은 Au로 이루어진 것을 특징으로 하는 저온의 산화방지 허메틱 실링 방법.
- 웨이퍼상에 접합층, 웨팅층, 솔더층을 적층하여 리드 웨이퍼를 형성하는 단계;상기 솔더층에 산화 방지를 위한 제1 보호층을 증착하는 단계;패키지 베이스 웨이퍼상에 움직이는 초소형 구조물 소자들을 제작하는 단계;상기 패키지 베이스 웨이퍼상에 메탈층 및 제2 보호층을 증착하는 단계;상기 리드 웨이퍼와 패키지 베이스 웨이퍼를 마주보게 조립하고 열을 가하여 상기 솔더층에 상기 제1 보호층이 흡수되면서 실링되도록 하는 단계;실링이 완료된 웨이퍼를 소자 단위로 다이싱하는 단계;를 포함하는 것을 특징으로 하는 저온의 허메틱 실링 방법.
- 제 7항에 있어서,상기 제1 보호층은 Au로 이루어진 것을 특징으로 하는 저온의 허메틱 실링 방법.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
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KR10-2001-0076235A KR100442830B1 (ko) | 2001-12-04 | 2001-12-04 | 저온의 산화방지 허메틱 실링 방법 |
US10/293,933 US7065867B2 (en) | 2001-12-04 | 2002-11-14 | Low temperature hermetic sealing method having passivation layer |
JP2002351203A JP3864134B2 (ja) | 2001-12-04 | 2002-12-03 | 低温の酸化防止ハーメチックシーリング方法 |
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KR10-2001-0076235A KR100442830B1 (ko) | 2001-12-04 | 2001-12-04 | 저온의 산화방지 허메틱 실링 방법 |
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KR20030045496A true KR20030045496A (ko) | 2003-06-11 |
KR100442830B1 KR100442830B1 (ko) | 2004-08-02 |
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US (1) | US7065867B2 (ko) |
JP (1) | JP3864134B2 (ko) |
KR (1) | KR100442830B1 (ko) |
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KR100620254B1 (ko) * | 2004-05-27 | 2006-09-14 | 전자부품연구원 | 멤스 스위치 및 그 패키징 방법 |
KR100872114B1 (ko) * | 2005-10-18 | 2008-12-05 | 삼성전기주식회사 | 멤스 모듈 패키지 및 패키징 방법 |
WO2009051440A3 (en) * | 2007-10-19 | 2009-06-04 | Sml Electronics Inc | Bump structure with multiple layers and method of manufacture |
KR100908648B1 (ko) * | 2007-10-19 | 2009-07-21 | (주)에스엠엘전자 | 복층 범프 구조물 및 그 제조 방법 |
KR100941446B1 (ko) * | 2009-03-03 | 2010-02-11 | 주식회사 바른전자 | 복층 범프 구조물 및 그 제조 방법 |
US8487437B2 (en) | 2010-02-08 | 2013-07-16 | Optopac Co., Ltd. | Electronic device package and method for fabricating the same |
WO2013025981A2 (en) * | 2011-08-17 | 2013-02-21 | Materion Advanced Materials Technologies & Services Inc. | Selective plating of frame lid assembly |
WO2013025981A3 (en) * | 2011-08-17 | 2013-05-10 | Materion Advanced Materials Technologies & Services Inc. | Selective plating of frame lid assembly |
KR20150123106A (ko) * | 2014-04-24 | 2015-11-03 | 주식회사 스탠딩에그 | 캡 기판, 구조물 및 그 제조 방법 |
Also Published As
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US20030104651A1 (en) | 2003-06-05 |
JP2003243550A (ja) | 2003-08-29 |
JP3864134B2 (ja) | 2006-12-27 |
KR100442830B1 (ko) | 2004-08-02 |
US7065867B2 (en) | 2006-06-27 |
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