KR101867893B1 - 배선 기판 및 그 제조 방법 - Google Patents
배선 기판 및 그 제조 방법 Download PDFInfo
- Publication number
- KR101867893B1 KR101867893B1 KR1020120101929A KR20120101929A KR101867893B1 KR 101867893 B1 KR101867893 B1 KR 101867893B1 KR 1020120101929 A KR1020120101929 A KR 1020120101929A KR 20120101929 A KR20120101929 A KR 20120101929A KR 101867893 B1 KR101867893 B1 KR 101867893B1
- Authority
- KR
- South Korea
- Prior art keywords
- layer
- support plate
- metal layer
- connection pad
- copper
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/188—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by direct electroplating
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/02—Electroplating of selected surface areas
- C25D5/022—Electroplating of selected surface areas using masking means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
- H05K1/113—Via provided in pad; Pad over filled via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4682—Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W46/00—Marks applied to devices, e.g. for alignment or identification
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0364—Conductor shape
- H05K2201/0376—Flush conductors, i.e. flush with the surface of the printed circuit
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09036—Recesses or grooves in insulating substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0369—Etching selective parts of a metal substrate through part of its thickness, e.g. using etch resist
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0376—Etching temporary metallic carrier substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/06—Lamination
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
- H10P72/7424—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self-supporting substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
- H10P72/744—Details of chemical or physical process used for separating the auxiliary support from a device or a wafer
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W46/00—Marks applied to devices, e.g. for alignment or identification
- H10W46/301—Marks applied to devices, e.g. for alignment or identification for alignment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W46/00—Marks applied to devices, e.g. for alignment or identification
- H10W46/601—Marks applied to devices, e.g. for alignment or identification for use after dicing
- H10W46/607—Located on parts of packages, e.g. on encapsulations or on package substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07231—Techniques
- H10W72/07236—Soldering or alloying
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/241—Dispositions, e.g. layouts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/251—Materials
- H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Electrochemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Structure Of Printed Boards (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011210212A JP5795225B2 (ja) | 2011-09-27 | 2011-09-27 | 配線基板の製造方法 |
| JPJP-P-2011-210212 | 2011-09-27 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20130033960A KR20130033960A (ko) | 2013-04-04 |
| KR101867893B1 true KR101867893B1 (ko) | 2018-06-18 |
Family
ID=47909996
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020120101929A Active KR101867893B1 (ko) | 2011-09-27 | 2012-09-14 | 배선 기판 및 그 제조 방법 |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US9210808B2 (https=) |
| JP (1) | JP5795225B2 (https=) |
| KR (1) | KR101867893B1 (https=) |
| TW (1) | TWI595813B (https=) |
Families Citing this family (24)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9299649B2 (en) | 2013-02-08 | 2016-03-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | 3D packages and methods for forming the same |
| US8802504B1 (en) * | 2013-03-14 | 2014-08-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | 3D packages and methods for forming the same |
| KR20150002492A (ko) * | 2013-06-28 | 2015-01-07 | 쿄세라 서킷 솔루션즈 가부시키가이샤 | 배선 기판 |
| JP6131135B2 (ja) * | 2013-07-11 | 2017-05-17 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
| JP6223909B2 (ja) * | 2013-07-11 | 2017-11-01 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
| US9620446B2 (en) * | 2014-12-10 | 2017-04-11 | Shinko Electric Industries Co., Ltd. | Wiring board, electronic component device, and method for manufacturing those |
| KR102411996B1 (ko) * | 2015-05-29 | 2022-06-22 | 삼성전기주식회사 | 패키지 기판 및 그 제조 방법 |
| JP6623028B2 (ja) * | 2015-10-27 | 2019-12-18 | 新光電気工業株式会社 | インダクタ装置及びその製造方法 |
| KR102691326B1 (ko) * | 2016-12-21 | 2024-08-05 | 삼성전기주식회사 | 인쇄회로기판 및 패키지 |
| CN108231723B (zh) * | 2016-12-22 | 2020-08-07 | 中芯国际集成电路制造(上海)有限公司 | 封装结构及其形成方法 |
| US10986790B2 (en) | 2017-12-17 | 2021-04-27 | Timothy Glaude | System for infusing a gas or liquids into the roots of a plant |
| JP7242832B2 (ja) * | 2019-03-25 | 2023-03-20 | 京セラ株式会社 | 電気素子収納用パッケージおよび電気装置 |
| WO2021031125A1 (zh) * | 2019-08-20 | 2021-02-25 | 华为技术有限公司 | 线路嵌入式基板、芯片封装结构及基板制备方法 |
| JP2021093417A (ja) * | 2019-12-09 | 2021-06-17 | イビデン株式会社 | プリント配線板、及び、プリント配線板の製造方法 |
| JPWO2021140971A1 (https=) * | 2020-01-08 | 2021-07-15 | ||
| US11315862B2 (en) * | 2020-01-31 | 2022-04-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor structure and manufacturing method thereof |
| KR102853086B1 (ko) | 2020-08-19 | 2025-09-02 | 삼성전자주식회사 | 반도체 패키지 |
| KR20220031398A (ko) * | 2020-09-04 | 2022-03-11 | 삼성전기주식회사 | 인쇄회로기판 |
| JP7764854B2 (ja) * | 2021-01-26 | 2025-11-06 | 東洋紡株式会社 | 積層体の製造方法、積層体、及び、多層積層体 |
| JP7711870B2 (ja) * | 2021-10-19 | 2025-07-23 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
| JP7700986B2 (ja) * | 2021-10-19 | 2025-07-01 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
| TWI831123B (zh) * | 2022-01-28 | 2024-02-01 | 巨擘科技股份有限公司 | 多層基板表面處理層結構 |
| JP2023125724A (ja) * | 2022-02-28 | 2023-09-07 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
| CN121753554A (zh) * | 2023-08-29 | 2026-03-27 | 京瓷株式会社 | 布线基板、封装体及压电装置 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003229512A (ja) * | 2002-02-01 | 2003-08-15 | Nec Toppan Circuit Solutions Toyama Inc | 半導体チップ搭載用基板およびその製造方法と半導体装置およびその製造方法 |
| WO2008001915A1 (en) * | 2006-06-30 | 2008-01-03 | Nec Corporation | Wiring board, semiconductor device using wiring board and their manufacturing methods |
| JP2011003705A (ja) * | 2009-06-18 | 2011-01-06 | Sony Corp | 半導体パッケージの製造方法及びその基板の製造方法 |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4125441A (en) * | 1978-01-30 | 1978-11-14 | General Dynamics Corporation | Isolated bump circuitry on tape utilizing electroforming |
| US5136456A (en) * | 1989-11-17 | 1992-08-04 | Sigma Instruments, Inc. | Faulted current indicator with protection against temporary overloads and transients |
| US5329695A (en) * | 1992-09-01 | 1994-07-19 | Rogers Corporation | Method of manufacturing a multilayer circuit board |
| JP3346263B2 (ja) | 1997-04-11 | 2002-11-18 | イビデン株式会社 | プリント配線板及びその製造方法 |
| US6306751B1 (en) * | 1999-09-27 | 2001-10-23 | Lsi Logic Corporation | Apparatus and method for improving ball joints in semiconductor packages |
| US6723927B1 (en) * | 2000-08-24 | 2004-04-20 | High Connection Density, Inc. | High-reliability interposer for low cost and high reliability applications |
| US7365414B2 (en) * | 2003-12-01 | 2008-04-29 | Intel Corporation | Component packaging apparatus, systems, and methods |
| JP4146864B2 (ja) * | 2005-05-31 | 2008-09-10 | 新光電気工業株式会社 | 配線基板及びその製造方法、並びに半導体装置及び半導体装置の製造方法 |
| JP4819471B2 (ja) | 2005-10-12 | 2011-11-24 | 日本電気株式会社 | 配線基板及び配線基板を用いた半導体装置並びにその製造方法 |
| JP5101169B2 (ja) * | 2007-05-30 | 2012-12-19 | 新光電気工業株式会社 | 配線基板とその製造方法 |
| US8127979B1 (en) * | 2010-09-25 | 2012-03-06 | Intel Corporation | Electrolytic depositon and via filling in coreless substrate processing |
-
2011
- 2011-09-27 JP JP2011210212A patent/JP5795225B2/ja active Active
-
2012
- 2012-09-14 KR KR1020120101929A patent/KR101867893B1/ko active Active
- 2012-09-14 US US13/616,348 patent/US9210808B2/en active Active
- 2012-09-18 TW TW101134128A patent/TWI595813B/zh active
-
2015
- 2015-10-26 US US14/922,972 patent/US10117336B2/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003229512A (ja) * | 2002-02-01 | 2003-08-15 | Nec Toppan Circuit Solutions Toyama Inc | 半導体チップ搭載用基板およびその製造方法と半導体装置およびその製造方法 |
| WO2008001915A1 (en) * | 2006-06-30 | 2008-01-03 | Nec Corporation | Wiring board, semiconductor device using wiring board and their manufacturing methods |
| JP2011003705A (ja) * | 2009-06-18 | 2011-01-06 | Sony Corp | 半導体パッケージの製造方法及びその基板の製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP5795225B2 (ja) | 2015-10-14 |
| US20130075145A1 (en) | 2013-03-28 |
| US10117336B2 (en) | 2018-10-30 |
| TWI595813B (zh) | 2017-08-11 |
| TW201325341A (zh) | 2013-06-16 |
| US20160044792A1 (en) | 2016-02-11 |
| US9210808B2 (en) | 2015-12-08 |
| JP2013073994A (ja) | 2013-04-22 |
| KR20130033960A (ko) | 2013-04-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR101867893B1 (ko) | 배선 기판 및 그 제조 방법 | |
| US10892216B2 (en) | Wiring substrate and semiconductor device | |
| JP6158676B2 (ja) | 配線基板、半導体装置及び配線基板の製造方法 | |
| US9236334B2 (en) | Wiring substrate and method for manufacturing wiring substrates | |
| KR101376265B1 (ko) | 배선 기판 및 그 제조 방법 | |
| KR101412258B1 (ko) | 프린트 배선판의 배선 구조 및 그 형성 방법 | |
| US8209856B2 (en) | Printed wiring board and method for manufacturing the same | |
| KR101168263B1 (ko) | 반도체 패키지 및 그 제조 방법 | |
| US20130008705A1 (en) | Coreless package substrate and fabrication method thereof | |
| JP7253946B2 (ja) | 配線基板及びその製造方法、半導体パッケージ | |
| US9334576B2 (en) | Wiring substrate and method of manufacturing wiring substrate | |
| JP2017163027A (ja) | 配線基板、半導体装置及び配線基板の製造方法 | |
| CN103794515A (zh) | 芯片封装基板和结构及其制作方法 | |
| TWI700970B (zh) | 具有預先定義貫孔圖案之電子封裝以及其製造和使用方法 | |
| US10334728B2 (en) | Reduced-dimension via-land structure and method of making the same | |
| JP5315447B2 (ja) | 配線基板及びその製造方法 | |
| US10170405B2 (en) | Wiring substrate and semiconductor package | |
| KR101158213B1 (ko) | 전자부품 내장형 인쇄회로기판 및 이의 제조 방법 | |
| JP7711870B2 (ja) | 配線基板及びその製造方法 | |
| JP2010067888A (ja) | 配線基板及びその製造方法 | |
| US11272614B2 (en) | Printed wiring board and method for manufacturing the same | |
| KR20070049957A (ko) | 배선 기판의 제조 방법 및 반도체 장치의 제조 방법 | |
| JP6223858B2 (ja) | 配線基板及び配線基板の製造方法 | |
| JP2013009006A (ja) | 配線基板とその製造方法 | |
| KR20120048842A (ko) | 임베디드 패키지 제조방법 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PA0109 | Patent application |
St.27 status event code: A-0-1-A10-A12-nap-PA0109 |
|
| PG1501 | Laying open of application |
St.27 status event code: A-1-1-Q10-Q12-nap-PG1501 |
|
| A201 | Request for examination | ||
| P11-X000 | Amendment of application requested |
St.27 status event code: A-2-2-P10-P11-nap-X000 |
|
| P13-X000 | Application amended |
St.27 status event code: A-2-2-P10-P13-nap-X000 |
|
| PA0201 | Request for examination |
St.27 status event code: A-1-2-D10-D11-exm-PA0201 |
|
| R17-X000 | Change to representative recorded |
St.27 status event code: A-3-3-R10-R17-oth-X000 |
|
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
St.27 status event code: A-1-2-D10-D21-exm-PE0902 |
|
| P11-X000 | Amendment of application requested |
St.27 status event code: A-2-2-P10-P11-nap-X000 |
|
| P13-X000 | Application amended |
St.27 status event code: A-2-2-P10-P13-nap-X000 |
|
| E701 | Decision to grant or registration of patent right | ||
| PE0701 | Decision of registration |
St.27 status event code: A-1-2-D10-D22-exm-PE0701 |
|
| GRNT | Written decision to grant | ||
| PR0701 | Registration of establishment |
St.27 status event code: A-2-4-F10-F11-exm-PR0701 |
|
| PR1002 | Payment of registration fee |
St.27 status event code: A-2-2-U10-U11-oth-PR1002 Fee payment year number: 1 |
|
| PG1601 | Publication of registration |
St.27 status event code: A-4-4-Q10-Q13-nap-PG1601 |
|
| FPAY | Annual fee payment |
Payment date: 20210517 Year of fee payment: 4 |
|
| PR1001 | Payment of annual fee |
St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 4 |
|
| FPAY | Annual fee payment |
Payment date: 20220517 Year of fee payment: 5 |
|
| PR1001 | Payment of annual fee |
St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 5 |
|
| PR1001 | Payment of annual fee |
St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 6 |
|
| PR1001 | Payment of annual fee |
St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 7 |
|
| P22-X000 | Classification modified |
St.27 status event code: A-4-4-P10-P22-nap-X000 |