KR100286182B1 - 기판처리 방법 및 기판처리 장치 - Google Patents

기판처리 방법 및 기판처리 장치 Download PDF

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Publication number
KR100286182B1
KR100286182B1 KR1019960024035A KR19960024035A KR100286182B1 KR 100286182 B1 KR100286182 B1 KR 100286182B1 KR 1019960024035 A KR1019960024035 A KR 1019960024035A KR 19960024035 A KR19960024035 A KR 19960024035A KR 100286182 B1 KR100286182 B1 KR 100286182B1
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KR
South Korea
Prior art keywords
cassette
substrate
processing
wafer
board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
KR1019960024035A
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English (en)
Korean (ko)
Other versions
KR970003393A (ko
Inventor
준지 하라다
이치로 하라다
코지 나카무라
Original Assignee
히가시 데쓰로
동경 엘렉트론주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP18354095A external-priority patent/JP3350840B2/ja
Priority claimed from JP18353995A external-priority patent/JP3328869B2/ja
Application filed by 히가시 데쓰로, 동경 엘렉트론주식회사 filed Critical 히가시 데쓰로
Publication of KR970003393A publication Critical patent/KR970003393A/ko
Application granted granted Critical
Publication of KR100286182B1 publication Critical patent/KR100286182B1/ko
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67161—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67161—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers
    • H01L21/67173—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers in-line arrangement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67259—Position monitoring, e.g. misposition detection or presence detection
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S414/00—Material or article handling
    • Y10S414/135—Associated with semiconductor wafer handling
    • Y10S414/137—Associated with semiconductor wafer handling including means for charging or discharging wafer cassette
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S414/00—Material or article handling
    • Y10S414/135—Associated with semiconductor wafer handling
    • Y10S414/139—Associated with semiconductor wafer handling including wafer charging or discharging means for vacuum chamber
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S414/00—Material or article handling
    • Y10S414/135—Associated with semiconductor wafer handling
    • Y10S414/14—Wafer cassette transporting

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
KR1019960024035A 1995-06-27 1996-06-26 기판처리 방법 및 기판처리 장치 Expired - Lifetime KR100286182B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP95-183540 1995-06-27
JP18354095A JP3350840B2 (ja) 1995-06-27 1995-06-27 処理方法及び処理装置
JP18353995A JP3328869B2 (ja) 1995-06-27 1995-06-27 処理方法及び処理装置
JP95-183539 1995-06-27

Publications (2)

Publication Number Publication Date
KR970003393A KR970003393A (ko) 1997-01-28
KR100286182B1 true KR100286182B1 (ko) 2001-04-16

Family

ID=26501940

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960024035A Expired - Lifetime KR100286182B1 (ko) 1995-06-27 1996-06-26 기판처리 방법 및 기판처리 장치

Country Status (3)

Country Link
US (1) US5700127A (enExample)
KR (1) KR100286182B1 (enExample)
TW (1) TW309503B (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101321331B1 (ko) 2012-05-21 2013-10-23 주식회사 엔씨디 태양전지용 박막 증착 시스템

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* Cited by examiner, † Cited by third party
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