JPWO2020132430A5 - - Google Patents

Download PDF

Info

Publication number
JPWO2020132430A5
JPWO2020132430A5 JP2021535536A JP2021535536A JPWO2020132430A5 JP WO2020132430 A5 JPWO2020132430 A5 JP WO2020132430A5 JP 2021535536 A JP2021535536 A JP 2021535536A JP 2021535536 A JP2021535536 A JP 2021535536A JP WO2020132430 A5 JPWO2020132430 A5 JP WO2020132430A5
Authority
JP
Japan
Prior art keywords
memory
data
array
operations
commands
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2021535536A
Other languages
English (en)
Japanese (ja)
Other versions
JP2022514341A (ja
Publication date
Application filed filed Critical
Priority claimed from PCT/US2019/067832 external-priority patent/WO2020132430A1/en
Publication of JP2022514341A publication Critical patent/JP2022514341A/ja
Publication of JPWO2020132430A5 publication Critical patent/JPWO2020132430A5/ja
Pending legal-status Critical Current

Links

JP2021535536A 2018-12-21 2019-12-20 メモリデバイスにおける信号展開キャッシングのページポリシー Pending JP2022514341A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201862783388P 2018-12-21 2018-12-21
US62/783,388 2018-12-21
PCT/US2019/067832 WO2020132430A1 (en) 2018-12-21 2019-12-20 Page policies for signal development caching in a memory device

Publications (2)

Publication Number Publication Date
JP2022514341A JP2022514341A (ja) 2022-02-10
JPWO2020132430A5 true JPWO2020132430A5 (zh) 2022-10-13

Family

ID=71097667

Family Applications (9)

Application Number Title Priority Date Filing Date
JP2021533432A Pending JP2022511972A (ja) 2018-12-21 2019-12-05 メモリデバイスにおける多重化信号展開
JP2021535559A Active JP7175398B2 (ja) 2018-12-21 2019-12-20 メモリデバイスと関連付けられた読み取りブロードキャスト動作
JP2021535529A Active JP7105376B2 (ja) 2018-12-21 2019-12-20 メモリデバイスにおける信号展開キャッシング
JP2021535540A Active JP7165269B2 (ja) 2018-12-21 2019-12-20 メモリデバイスにおける信号展開キャッシング
JP2021535536A Pending JP2022514341A (ja) 2018-12-21 2019-12-20 メモリデバイスにおける信号展開キャッシングのページポリシー
JP2021535534A Pending JP2022514073A (ja) 2018-12-21 2019-12-20 メモリデバイスと関連付けられたブロードキャスト書き込み動作
JP2021533238A Pending JP2022511949A (ja) 2018-12-21 2019-12-20 メモリデバイスにおける信号展開キャッシングのための内容参照メモリ
JP2022147490A Pending JP2022168310A (ja) 2018-12-21 2022-09-16 メモリデバイスと関連付けられた読み取りブロードキャスト動作
JP2022168730A Pending JP2022183340A (ja) 2018-12-21 2022-10-21 メモリデバイスにおける信号展開キャッシング

Family Applications Before (4)

Application Number Title Priority Date Filing Date
JP2021533432A Pending JP2022511972A (ja) 2018-12-21 2019-12-05 メモリデバイスにおける多重化信号展開
JP2021535559A Active JP7175398B2 (ja) 2018-12-21 2019-12-20 メモリデバイスと関連付けられた読み取りブロードキャスト動作
JP2021535529A Active JP7105376B2 (ja) 2018-12-21 2019-12-20 メモリデバイスにおける信号展開キャッシング
JP2021535540A Active JP7165269B2 (ja) 2018-12-21 2019-12-20 メモリデバイスにおける信号展開キャッシング

Family Applications After (4)

Application Number Title Priority Date Filing Date
JP2021535534A Pending JP2022514073A (ja) 2018-12-21 2019-12-20 メモリデバイスと関連付けられたブロードキャスト書き込み動作
JP2021533238A Pending JP2022511949A (ja) 2018-12-21 2019-12-20 メモリデバイスにおける信号展開キャッシングのための内容参照メモリ
JP2022147490A Pending JP2022168310A (ja) 2018-12-21 2022-09-16 メモリデバイスと関連付けられた読み取りブロードキャスト動作
JP2022168730A Pending JP2022183340A (ja) 2018-12-21 2022-10-21 メモリデバイスにおける信号展開キャッシング

Country Status (6)

Country Link
US (14) US11360704B2 (zh)
EP (7) EP3899944A4 (zh)
JP (9) JP2022511972A (zh)
CN (7) CN113243031B (zh)
TW (2) TWI762840B (zh)
WO (7) WO2020131395A1 (zh)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10235176B2 (en) 2015-12-17 2019-03-19 The Charles Stark Draper Laboratory, Inc. Techniques for metadata processing
US11150910B2 (en) 2018-02-02 2021-10-19 The Charles Stark Draper Laboratory, Inc. Systems and methods for policy execution processing
TW201935306A (zh) 2018-02-02 2019-09-01 美商多佛微系統公司 用於安全初始化的策略連結及/或載入之系統和方法
US11797398B2 (en) 2018-04-30 2023-10-24 Dover Microsystems, Inc. Systems and methods for checking safety properties
TW202022678A (zh) 2018-11-06 2020-06-16 美商多佛微系統公司 用於停滯主處理器的系統和方法
US11841956B2 (en) 2018-12-18 2023-12-12 Dover Microsystems, Inc. Systems and methods for data lifecycle protection
US11176065B2 (en) * 2019-08-12 2021-11-16 Micron Technology, Inc. Extended memory interface
US11842169B1 (en) 2019-09-25 2023-12-12 Amazon Technologies, Inc. Systolic multiply delayed accumulate processor architecture
US11467806B2 (en) 2019-11-27 2022-10-11 Amazon Technologies, Inc. Systolic array including fused multiply accumulate with efficient prenormalization and extended dynamic range
US11816446B2 (en) 2019-11-27 2023-11-14 Amazon Technologies, Inc. Systolic array component combining multiple integer and floating-point data types
JP2021140842A (ja) * 2020-03-04 2021-09-16 キオクシア株式会社 メモリ回路、情報処理回路、及び情報処理装置
US11308027B1 (en) 2020-06-29 2022-04-19 Amazon Technologies, Inc. Multiple accumulate busses in a systolic array
US11113233B1 (en) * 2020-06-29 2021-09-07 Amazon Technologies, Inc. Multiple busses in a grouped systolic array
US11232062B1 (en) 2020-06-29 2022-01-25 Amazon Technologies, Inc. Parallelism within a systolic array using multiple accumulate busses
US11422773B1 (en) 2020-06-29 2022-08-23 Amazon Technologies, Inc. Multiple busses within a systolic array processing element
KR102342994B1 (ko) * 2020-07-21 2021-12-24 고려대학교 산학협력단 산술 연산을 지원하는 인메모리 컴퓨팅
US11880682B2 (en) 2021-06-30 2024-01-23 Amazon Technologies, Inc. Systolic array with efficient input reduction and extended array performance
US11727981B2 (en) * 2021-07-07 2023-08-15 Micron Technology, Inc. Sense amplifier with digit line multiplexing
US11837269B2 (en) * 2021-08-31 2023-12-05 Micron Technology, Inc. Deck-level signal development cascodes
CN113641626B (zh) * 2021-10-18 2022-02-18 睿思芯科(深圳)技术有限公司 一种sram读写控制方法及行缓冲控制器
CN116417027A (zh) * 2021-12-31 2023-07-11 长鑫存储技术有限公司 一种控制放大方法及电路、灵敏放大器和半导体存储器
US11881255B2 (en) * 2022-04-27 2024-01-23 Nvidia Corp. Look ahead switching circuit for a multi-rank system
US11973501B2 (en) 2022-04-27 2024-04-30 Nvidia Corp. Digitally controlled unified receiver for multi-rank system
US11967396B2 (en) 2022-04-27 2024-04-23 Nvidia Corp. Multi-rank receiver
US11978496B2 (en) 2022-04-27 2024-05-07 Nvidia Corp. Distributed global and local reference voltage generation
US20230350598A1 (en) * 2022-04-28 2023-11-02 Micron Technology, Inc. Performance monitoring for a memory system
JP2024002003A (ja) * 2022-06-23 2024-01-11 キオクシア株式会社 メモリデバイス及びメモリシステム
US20240069783A1 (en) * 2022-08-29 2024-02-29 Micron Technology, Inc. Memory phase monitoring and scheduling system
WO2024054448A1 (en) * 2022-09-10 2024-03-14 Rambus Inc. Split-entry dram cache
CN116149572A (zh) * 2023-02-24 2023-05-23 合肥兆芯电子有限公司 映射表更新方法、存储器存储装置及存储器控制电路单元

Family Cites Families (110)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4493026A (en) 1982-05-26 1985-01-08 International Business Machines Corporation Set associative sector cache
JPH0793031B2 (ja) * 1987-02-12 1995-10-09 株式会社日立製作所 アクセス制御システム
JPH01166850A (ja) 1987-12-24 1989-06-30 Mitsubishi Heavy Ind Ltd 銅又はアルミニウム合金鋳物の製造法
JPH0315958A (ja) 1989-06-14 1991-01-24 Hitachi Ltd キャッシュメモリシステム
JP2938511B2 (ja) 1990-03-30 1999-08-23 三菱電機株式会社 半導体記憶装置
JP2951786B2 (ja) 1992-02-03 1999-09-20 三菱電機株式会社 半導体記憶装置
US5341501A (en) 1991-10-04 1994-08-23 Bull Hn Information Systems Inc. Processor bus access
US5377154A (en) 1992-01-31 1994-12-27 Oki Electric Industry Co., Ltd. Multiple serial-access memory
US6320778B1 (en) * 1994-01-06 2001-11-20 Oki Electric Industry Co., Ltd. Semiconductor memory with built-in cache
US5596521A (en) 1994-01-06 1997-01-21 Oki Electric Industry Co., Ltd. Semiconductor memory with built-in cache
JP3085843B2 (ja) 1994-01-11 2000-09-11 沖電気工業株式会社 半導体記憶回路
JP3672940B2 (ja) 1994-01-06 2005-07-20 沖電気工業株式会社 半導体記憶装置
JP3181479B2 (ja) 1994-12-15 2001-07-03 沖電気工業株式会社 半導体記憶装置
US5787267A (en) 1995-06-07 1998-07-28 Monolithic System Technology, Inc. Caching method and circuit for a memory system with circuit module architecture
JP3352577B2 (ja) * 1995-12-21 2002-12-03 インターナショナル・ビジネス・マシーンズ・コーポレーション 記憶装置
JP4008072B2 (ja) 1997-08-21 2007-11-14 富士通株式会社 半導体記憶装置
JPH1173763A (ja) 1997-08-28 1999-03-16 Toshiba Corp 半導体集積回路装置
JP3161384B2 (ja) 1997-09-16 2001-04-25 日本電気株式会社 半導体記憶装置とそのアクセス方法
US6205076B1 (en) 1998-03-27 2001-03-20 Fujitsu Limited Destructive read type memory circuit, restoring circuit for the same and sense amplifier
JPH11339466A (ja) 1998-03-27 1999-12-10 Fujitsu Ltd 破壊読出型メモリ回路、リストア用アドレス記憶・制御回路及びセンスアンプ
JP2954178B1 (ja) 1998-06-26 1999-09-27 甲府日本電気株式会社 可変式キャッシュ方式
JP2001006379A (ja) * 1999-06-16 2001-01-12 Fujitsu Ltd 複写、移動機能を有するフラッシュメモリ
JP2001005725A (ja) 1999-06-21 2001-01-12 Hitachi Ltd キャッシュ記憶装置
KR100373849B1 (ko) 2000-03-13 2003-02-26 삼성전자주식회사 어소시어티브 캐시 메모리
US6587384B2 (en) 2001-04-21 2003-07-01 Hewlett-Packard Development Company, L.P. Multi-function serial I/O circuit
US6829682B2 (en) * 2001-04-26 2004-12-07 International Business Machines Corporation Destructive read architecture for dynamic random access memories
KR100387529B1 (ko) 2001-06-11 2003-06-18 삼성전자주식회사 랜덤 억세스 가능한 메모리 셀 어레이를 갖는 불휘발성반도체 메모리 장치
US20040230288A1 (en) 2002-04-17 2004-11-18 Rosenthal Arthur L. Medical devices adapted for controlled in vivo structural change after implantation
CN1480950A (zh) 2002-09-05 2004-03-10 力旺电子股份有限公司 即时多路复用且可快速复制数据的闪速存储器装置
US6940753B2 (en) 2002-09-24 2005-09-06 Sandisk Corporation Highly compact non-volatile memory and method therefor with space-efficient data registers
JP4439838B2 (ja) 2003-05-26 2010-03-24 Ｎｅｃエレクトロニクス株式会社 半導体記憶装置及びその制御方法
US6999370B2 (en) * 2003-08-06 2006-02-14 International Business Machines Corporation Low power circuits with small voltage swing transmission, voltage regeneration, and wide bandwidth architecture
JP4107269B2 (ja) 2004-02-23 2008-06-25 ソニー株式会社 固体撮像装置
US7085190B2 (en) 2004-09-16 2006-08-01 Stmicroelectronics, Inc. Variable boost voltage row driver circuit and method, and memory device and system including same
JP4956922B2 (ja) 2004-10-27 2012-06-20 ソニー株式会社 記憶装置
KR100640594B1 (ko) 2004-10-27 2006-11-01 삼성전자주식회사 데이터 스트로브 신호를 모니터링하여 적응적으로 데이터입출력 신호를 래치하는 인터페이스 회로 및 이를구비하는 메모리 시스템
US7216272B2 (en) 2005-02-23 2007-05-08 Texas Instruments Incorporated Method for reducing SRAM test time by applying power-up state knowledge
JP5005179B2 (ja) 2005-03-23 2012-08-22 ソニー株式会社 固体撮像装置
US7206230B2 (en) * 2005-04-01 2007-04-17 Sandisk Corporation Use of data latches in cache operations of non-volatile memories
JP4756581B2 (ja) 2005-07-21 2011-08-24 ルネサスエレクトロニクス株式会社 半導体記憶装置
US20070083783A1 (en) 2005-08-05 2007-04-12 Toru Ishihara Reducing power consumption at a cache
JP2007080325A (ja) 2005-09-12 2007-03-29 Matsushita Electric Ind Co Ltd 半導体記憶装置
US7286425B2 (en) 2005-10-31 2007-10-23 International Business Machines Corporation System and method for capacitive mis-match bit-line sensing
KR20070066185A (ko) 2005-12-21 2007-06-27 삼성전자주식회사 데이터 라인을 공유하는 반도체 메모리 장치의 병렬 비트테스트 회로
US7647536B2 (en) * 2005-12-30 2010-01-12 Intel Corporation Repair bits for a low voltage cache
US7516275B2 (en) 2006-04-25 2009-04-07 International Business Machines Corporation Pseudo-LRU virtual counter for a locking cache
JP4299848B2 (ja) 2006-08-09 2009-07-22 エルピーダメモリ株式会社 半導体記憶装置
US20080080266A1 (en) 2006-09-27 2008-04-03 Khellah Muhammad M Memory driver circuits with embedded level shifters
CN101558390B (zh) * 2006-12-15 2014-06-18 密克罗奇普技术公司 用于微处理器的可配置高速缓冲存储器
JP2008257773A (ja) 2007-04-02 2008-10-23 Toshiba Corp 不揮発性半導体記憶装置、不揮発性半導体記憶装置の制御方法、不揮発性半導体記憶システム、及びメモリカード
US7613060B2 (en) * 2007-05-21 2009-11-03 Micron Technology, Inc. Methods, circuits, and systems to select memory regions
JP5035348B2 (ja) 2007-09-14 2012-09-26 富士通セミコンダクター株式会社 半導体メモリ
JP5217374B2 (ja) 2007-11-13 2013-06-19 富士電機株式会社 自動販売機
US8090999B2 (en) 2008-06-10 2012-01-03 Micron Technology, Inc. Memory media characterization for development of signal processors
US20140325129A1 (en) 2008-12-31 2014-10-30 Micron Technology, Inc. Method and apparatus for active range mapping for a nonvolatile memory device
KR20100113389A (ko) 2009-04-13 2010-10-21 주식회사 하이닉스반도체 라이트 동작을 제어하는 반도체 집적 회로
US8495299B2 (en) * 2009-11-16 2013-07-23 Microsoft Corporation Non-blocking data transfer via memory cache manipulation
US20110149667A1 (en) 2009-12-23 2011-06-23 Fatih Hamzaoglu Reduced area memory array by using sense amplifier as write driver
JP5374412B2 (ja) 2010-02-24 2013-12-25 ラピスセミコンダクタ株式会社 半導体記憶回路
KR20110097438A (ko) 2010-02-25 2011-08-31 삼성전자주식회사 메모리 시스템, 그리고 그것의 동작 방법
KR20110124992A (ko) 2010-05-12 2011-11-18 삼성전자주식회사 반도체 메모리 장치 및 반도체 메모리 시스템
US8760953B2 (en) 2010-10-01 2014-06-24 Qualcomm Incorporated Sense amplifier with selectively powered inverter
US20120151232A1 (en) * 2010-12-12 2012-06-14 Fish Iii Russell Hamilton CPU in Memory Cache Architecture
JP5443420B2 (ja) * 2011-03-23 2014-03-19 株式会社東芝 半導体記憶装置
JP2012203938A (ja) * 2011-03-24 2012-10-22 Toshiba Corp 半導体記憶装置
US8743630B2 (en) 2011-05-23 2014-06-03 Infineon Technologies Ag Current sense amplifier with replica bias scheme
US8645752B2 (en) 2011-11-08 2014-02-04 Micron Technology, Inc. Apparatuses and methods for operating a memory device
US20130145097A1 (en) * 2011-12-05 2013-06-06 Qualcomm Incorporated Selective Access of a Store Buffer Based on Cache State
US8873329B1 (en) 2012-01-17 2014-10-28 Rambus Inc. Patterned memory page activation
JP2013196717A (ja) * 2012-03-16 2013-09-30 Toshiba Corp 半導体記憶装置およびその駆動方法
JP5978771B2 (ja) 2012-05-31 2016-08-24 ソニー株式会社 信号処理装置および方法、撮像素子、並びに、撮像装置
US9257154B2 (en) 2012-11-29 2016-02-09 Micron Technology, Inc. Methods and apparatuses for compensating for source voltage
US9013930B2 (en) 2012-12-20 2015-04-21 Winbond Electronics Corp. Memory device with interleaved high-speed reading function and method thereof
US9093175B2 (en) 2013-03-27 2015-07-28 International Business Machines Corporation Signal margin centering for single-ended eDRAM sense amplifier
US9443602B2 (en) 2013-08-23 2016-09-13 Kabushiki Kaisha Toshiba Storage device and data latch timing adjustment method
CN105981370B (zh) 2014-02-07 2019-07-19 拉姆伯斯公司 馈通补偿图像传感器
US9384830B2 (en) 2014-05-06 2016-07-05 Micron Technology, Inc. Apparatuses and methods for performing multiple memory operations
US9535844B1 (en) 2014-06-30 2017-01-03 EMC IP Holding Company LLC Prioritization for cache systems
KR102309471B1 (ko) 2014-12-19 2021-10-07 에스케이하이닉스 주식회사 데이터 처리 시스템 및 데이터 처리 시스템의 동작 방법
WO2016126474A1 (en) 2015-02-06 2016-08-11 Micron Technology, Inc. Apparatuses and methods for parallel writing to multiple memory device locations
US9785211B2 (en) 2015-02-13 2017-10-10 Qualcomm Incorporated Independent power collapse methodology
JP6636526B2 (ja) 2015-03-27 2020-01-29 ホアウェイ・テクノロジーズ・カンパニー・リミテッド データ処理方法、メモリ管理ユニット、およびメモリ制御デバイス
US9582430B2 (en) 2015-03-27 2017-02-28 Intel Corporation Asymmetric set combined cache
US9728243B2 (en) * 2015-05-11 2017-08-08 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device or electronic component including the same
US10073786B2 (en) * 2015-05-28 2018-09-11 Micron Technology, Inc. Apparatuses and methods for compute enabled cache
US9627016B2 (en) 2015-09-10 2017-04-18 Cypress Semiconductor Corporation Systems, methods, and devices for parallel read and write operations
KR102377453B1 (ko) 2015-11-05 2022-03-23 삼성전자주식회사 불 휘발성 메모리 장치 및 그것의 동작 방법
US10303372B2 (en) 2015-12-01 2019-05-28 Samsung Electronics Co., Ltd. Nonvolatile memory device and operation method thereof
US9734886B1 (en) 2016-02-01 2017-08-15 Micron Technology, Inc Cell-based reference voltage generation
US9934837B2 (en) 2016-03-01 2018-04-03 Micron Technology, Inc. Ground reference scheme for a memory cell
US9552864B1 (en) * 2016-03-11 2017-01-24 Micron Technology, Inc. Offset compensation for ferroelectric memory cell sensing
US10083731B2 (en) * 2016-03-11 2018-09-25 Micron Technology, Inc Memory cell sensing with storage component isolation
US9761312B1 (en) * 2016-03-16 2017-09-12 Micron Technology, Inc. FeRAM-DRAM hybrid memory
US9997250B2 (en) 2016-03-17 2018-06-12 SK Hynix Inc. Non-volatile memory device with a plurality of cache latches and switches and method for operating non-volatile memory device
US10474581B2 (en) * 2016-03-25 2019-11-12 Micron Technology, Inc. Apparatuses and methods for cache operations
US9542980B1 (en) 2016-03-29 2017-01-10 Nanya Technology Corp. Sense amplifier with mini-gap architecture and parallel interconnect
US10082964B2 (en) 2016-04-27 2018-09-25 Micron Technology, Inc Data caching for ferroelectric memory
WO2017192759A1 (en) 2016-05-03 2017-11-09 Rambus Inc. Memory component with efficient write operations
TWI734781B (zh) * 2016-05-20 2021-08-01 日商半導體能源研究所股份有限公司 半導體裝置、電子構件及電子裝置
US10090027B2 (en) 2016-05-25 2018-10-02 Ememory Technology Inc. Memory system with low read power
US10249351B2 (en) 2016-11-06 2019-04-02 Intel Corporation Memory device with flexible internal data write control circuitry
US10503649B2 (en) * 2016-11-28 2019-12-10 Taiwan Semiconductor Manufacturing Co., Ltd. Integrated circuit and address mapping method for cache memory
US10490239B2 (en) 2016-12-27 2019-11-26 Intel Corporation Programmable data pattern for repeated writes to memory
US10991418B2 (en) 2017-03-06 2021-04-27 Zentel Japan Corporation Semiconductor memory device comprising an interface conforming to JEDEC standard and control device therefor
JP6943600B2 (ja) * 2017-04-18 2021-10-06 ラピスセミコンダクタ株式会社 半導体記憶装置および半導体記憶装置の読み出し方法
US10650899B2 (en) * 2017-04-27 2020-05-12 Everspin Technologies, Inc. Delayed write-back in memory with calibration support
US10789175B2 (en) 2017-06-01 2020-09-29 Mellanox Technologies Ltd. Caching policy in a multicore system on a chip (SOC)
US10510383B2 (en) 2017-10-03 2019-12-17 Sandisk Technologies Llc State dependent sense circuits and pre-charge operations for storage devices
US10667621B2 (en) * 2018-04-19 2020-06-02 Micron Technology, Inc. Multi-stage memory sensing
US10395710B1 (en) * 2018-05-21 2019-08-27 Avalanche Technology, Inc. Magnetic memory emulating dynamic random access memory (DRAM)

Similar Documents

Publication Publication Date Title
JPWO2020132430A5 (zh)
US10497438B2 (en) Cross-point memory array addressing
JP4530641B2 (ja) 高速データアクセスのための半導体メモリ装置及びその駆動方法
US20130329491A1 (en) Hybrid Memory Module
US8935467B2 (en) Memory system, and a method of controlling an operation thereof
Meza et al. A case for small row buffers in non-volatile main memories
US9792978B2 (en) Semiconductor memory device and memory system including the same
JP2006114206A5 (zh)
JP2007527592A (ja) Ｄｒａｍの部分的リフレッシュのための方法及び装置
US20190012264A1 (en) Memory system and operation method thereof
JP2020502606A5 (zh)
US7917692B2 (en) Method and system for using dynamic random access memory as cache memory
CN101165662A (zh) 实现存储器访问的方法和装置
JPWO2007116486A1 (ja) メモリ装置、その制御方法、その制御プログラム、メモリ・カード、回路基板及び電子機器
CN115129240A (zh) 两级主存储器层次结构管理
KR101436442B1 (ko) 읽기 및 쓰기 접근에 따른 선택적 리프레쉬 기능을 구비한 동적 메모리 장치 및 그 선택적 리프레쉬 방법
KR101861647B1 (ko) 메모리 시스템 및 그 리프레시 제어 방법
US20200034259A1 (en) Memory module, memory system including the same and operation method thereof
WO2007116483A1 (ja) メモリ装置、その制御方法、その制御プログラム、メモリ・カード、回路基板及び電子機器
US10592163B2 (en) Controlling write pulse width to non-volatile memory based on free space of a storage
US10872041B2 (en) Method and apparatus for journal aware cache management
KR101977866B1 (ko) 병렬 ｔｌｃ ｓｔｔ ｍｒａｍ 기반 대용량 ｌｌｃ 및 이의 동작 제어 방법
US20240177746A1 (en) Address decoding method, and memory controller and semiconductor memory system using the same
US20240112716A1 (en) Memory device and operation method thereof
US11669393B2 (en) Memory device for swapping data and operating method thereof