JPWO2018185932A1 - 半導体の製造方法 - Google Patents
半導体の製造方法 Download PDFInfo
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- JPWO2018185932A1 JPWO2018185932A1 JP2019511038A JP2019511038A JPWO2018185932A1 JP WO2018185932 A1 JPWO2018185932 A1 JP WO2018185932A1 JP 2019511038 A JP2019511038 A JP 2019511038A JP 2019511038 A JP2019511038 A JP 2019511038A JP WO2018185932 A1 JPWO2018185932 A1 JP WO2018185932A1
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- 239000004065 semiconductor Substances 0.000 title claims description 75
- 238000004519 manufacturing process Methods 0.000 title claims description 65
- 238000005520 cutting process Methods 0.000 claims description 44
- 238000000034 method Methods 0.000 claims description 23
- 230000002093 peripheral effect Effects 0.000 claims description 23
- 235000012431 wafers Nutrition 0.000 description 131
- 125000006850 spacer group Chemical group 0.000 description 10
- 230000000052 comparative effect Effects 0.000 description 4
- 230000007547 defect Effects 0.000 description 2
- 230000007257 malfunction Effects 0.000 description 2
- 230000003014 reinforcing effect Effects 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000002250 progressing effect Effects 0.000 description 1
- 230000002787 reinforcement Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67092—Apparatus for mechanical treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02013—Grinding, lapping
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
- H01L21/3043—Making grooves, e.g. cutting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76861—Post-treatment or after-treatment not introducing additional chemical elements into the layer
- H01L21/76862—Bombardment with particles, e.g. treatment in noble gas plasmas; UV irradiation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Dicing (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
Description
図1は、本発明の実施の形態1において使用されるウエハW1の構成を示す図である。図1(a)は、ウエハW1の斜視図である。図1(b)は、図1(a)のA1−A2線に沿ったウエハW1の断面図である。
本実施の形態の構成は、前述の半導体製造方法Prにおいて、紫外線を使用する工程を追加した構成(以下、「構成CtA」ともいう)である。以下においては、構成CtAが適用された半導体製造方法Prを、「半導体製造方法Pra」ともいう。
本実施の形態の構成は、前述の半導体製造方法Prにおいて、サイズの大きいチャックテーブルを使用する構成(以下、「構成CtB」ともいう)である。以下においては、構成CtBが適用された半導体製造方法Prを、「半導体製造方法Prb」ともいう。
Claims (3)
- ウエハ(W1)の裏面(W1b)に、リング状の突起部(X1)が形成されている当該ウエハ(W1)を使用した、半導体の製造方法であって、
前記裏面(W1b)が上向きである前記ウエハ(W1)の前記突起部(X1)を支持することにより、当該ウエハ(W1)を保持する保持工程(S110,S110B)と、
前記突起部(X1)が前記ウエハ(W1)から切り離されるように、当該ウエハ(W1)の表面(W1a)側から、ブレード(BL1)により当該ウエハ(W1)を切断する切断工程(S120)とを含む
半導体の製造方法。 - 前記ウエハ(W1)の裏面(W1b)には、ダイシングテープ(Tp1)が前記突起部(X1)を覆うように、当該ダイシングテープ(Tp1)が張り付けられており、
前記半導体の製造方法は、さらに、
前記切断工程(S120)と並列的に行われる紫外線照射工程(S130)を含み、
前記紫外線照射工程では、前記突起部(X1)に向けて紫外線を照射する
請求項1に記載の半導体の製造方法。 - 前記突起部(X1)は、前記ウエハ(W1)の周縁部(Wp)に形成されており、
前記切断工程(S120)が行われる際には、
(a1)前記裏面(W1b)が上向きである前記ウエハ(W1)の中央部の下方に空間(Sp1)が存在するように、当該ウエハ(W1)の周縁部(Wp)がステージ(St1)上に載置されており、
(a2)前記ウエハ(W1)の裏面(W1b)のうち、リング状の前記突起部(X1)の内側の部分には、チャックテーブル(Tb1m)が入っており、
(a3)平面視において、前記チャックテーブル(Tb1m)の周縁部は、前記ステージ(St1)のうち前記空間(Sp1)に接する部分と重なっている
請求項1に記載の半導体の製造方法。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2017/014523 WO2018185932A1 (ja) | 2017-04-07 | 2017-04-07 | 半導体の製造方法 |
Publications (2)
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JPWO2018185932A1 true JPWO2018185932A1 (ja) | 2019-06-27 |
JP6647452B2 JP6647452B2 (ja) | 2020-02-14 |
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JP2019511038A Active JP6647452B2 (ja) | 2017-04-07 | 2017-04-07 | 半導体の製造方法 |
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US (1) | US10964524B2 (ja) |
JP (1) | JP6647452B2 (ja) |
CN (1) | CN110476224B (ja) |
DE (1) | DE112017007411T5 (ja) |
WO (1) | WO2018185932A1 (ja) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
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DE102019211540A1 (de) * | 2019-08-01 | 2021-02-04 | Disco Corporation | Verfahren zum bearbeiten eines substrats |
JP7464472B2 (ja) * | 2020-07-17 | 2024-04-09 | 株式会社ディスコ | 加工装置 |
JP2023025560A (ja) * | 2021-08-10 | 2023-02-22 | 株式会社ディスコ | 加工装置 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06275712A (ja) * | 1993-03-24 | 1994-09-30 | Nec Kansai Ltd | ダイシング装置 |
JP2007019379A (ja) * | 2005-07-11 | 2007-01-25 | Disco Abrasive Syst Ltd | ウェーハの加工方法 |
JP2013161863A (ja) * | 2012-02-02 | 2013-08-19 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
JP2016157903A (ja) * | 2015-02-26 | 2016-09-01 | 株式会社ディスコ | ウエーハの分割方法及びチャックテーブル |
JP2016192450A (ja) * | 2015-03-30 | 2016-11-10 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
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JPS5390740A (en) | 1977-01-19 | 1978-08-09 | Murata Manufacturing Co | Elastic surface wave device |
JP5390740B2 (ja) | 2005-04-27 | 2014-01-15 | 株式会社ディスコ | ウェーハの加工方法 |
JP4741332B2 (ja) * | 2005-09-30 | 2011-08-03 | 株式会社ディスコ | ウエーハの加工方法 |
JP2010186971A (ja) * | 2009-02-13 | 2010-08-26 | Disco Abrasive Syst Ltd | ウエーハの加工方法 |
JP5654810B2 (ja) * | 2010-09-10 | 2015-01-14 | 株式会社ディスコ | ウェーハの加工方法 |
-
2017
- 2017-04-07 US US16/466,458 patent/US10964524B2/en active Active
- 2017-04-07 JP JP2019511038A patent/JP6647452B2/ja active Active
- 2017-04-07 WO PCT/JP2017/014523 patent/WO2018185932A1/ja active Application Filing
- 2017-04-07 DE DE112017007411.8T patent/DE112017007411T5/de active Pending
- 2017-04-07 CN CN201780089207.2A patent/CN110476224B/zh active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06275712A (ja) * | 1993-03-24 | 1994-09-30 | Nec Kansai Ltd | ダイシング装置 |
JP2007019379A (ja) * | 2005-07-11 | 2007-01-25 | Disco Abrasive Syst Ltd | ウェーハの加工方法 |
JP2013161863A (ja) * | 2012-02-02 | 2013-08-19 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
JP2016157903A (ja) * | 2015-02-26 | 2016-09-01 | 株式会社ディスコ | ウエーハの分割方法及びチャックテーブル |
JP2016192450A (ja) * | 2015-03-30 | 2016-11-10 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
Also Published As
Publication number | Publication date |
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US20200075311A1 (en) | 2020-03-05 |
US10964524B2 (en) | 2021-03-30 |
JP6647452B2 (ja) | 2020-02-14 |
DE112017007411T5 (de) | 2019-12-19 |
WO2018185932A1 (ja) | 2018-10-11 |
CN110476224B (zh) | 2023-06-09 |
CN110476224A (zh) | 2019-11-19 |
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