JPWO2009013826A1 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JPWO2009013826A1 JPWO2009013826A1 JP2009524353A JP2009524353A JPWO2009013826A1 JP WO2009013826 A1 JPWO2009013826 A1 JP WO2009013826A1 JP 2009524353 A JP2009524353 A JP 2009524353A JP 2009524353 A JP2009524353 A JP 2009524353A JP WO2009013826 A1 JPWO2009013826 A1 JP WO2009013826A1
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- Prior art keywords
- layer
- semiconductor device
- electrode
- electrode pad
- insulating layer
- Prior art date
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Abstract
Description
41 半導体基板
43 多層配線層
44 配線層
45 層間絶縁層
46 配線接続部
47 電極パッド
48 無機絶縁層
49 有機絶縁層
50 第1バンプ下地金属層
51 第2バンプ下地金属層
52 外部接続用突起電極
55 絶縁部材
71 配線基板
200 半導体装置
[第1の実施の形態]
本発明の第1の実施の形態に係る半導体素子の主面を図4に示す。また、当該図4の、点線A−Aにおける断面を図5に示す。
本発明の第2の実施の形態に係る半導体素子について、図10を参照して説明する。
[第1の実施の形態に係る半導体装置の製造方法]
図5、図7、図9及び図11を参照して、本発明の第1の実施の形態に係る半導体装置200の製造方法について説明する。
図10に示す、本発明の第2の実施の形態に係る半導体素子150は、以下の工程を経て形成される。
Claims (17)
- 半導体基板上の配線層に配設された複数の電極パッドと、
前記電極パッドを表出して前記配線層上に配設された絶縁層と、
一端が前記電極パッドの表出部に接続され、前記複数の電極パッド毎に前記絶縁層上に延在して配設された複数の導電層と、
前記導電層の他端に配設された突起電極と、を備え、
前記導電層の延在する方向は、前記複数の電極パッドに対して一定の方向に延在していることを特徴とする半導体装置。 - 請求項1記載の半導体装置であって、
全ての前記導電層の延在する方向が、一定の方向に延在していることを特徴とする半導体装置。 - 請求項1記載の半導体装置であって、
前記導電層の延在する方向は、前記半導体基板の中心部から外周方向に延在していることを特徴とする半導体装置。 - 請求項1記載の半導体装置であって、
前記導電層の延在する方向は、前記半導体基板の外周部から中心方向に延在していることを特徴とする半導体装置。 - 請求項1記載の半導体装置であって、
前記電極パッドは、前記半導体基板の主面において、縦方向及び横方向に略同一の間隔にマトリクス状に複数配設されていることを特徴とする半導体装置。 - 請求項1乃至5いずれか一項記載の半導体装置であって、
前記配線層は、比誘電率が5以下の層間絶縁膜を含むことを特徴とする半導体装置。 - 請求項1乃至6いずれか一項記載の半導体装置であって、
前記絶縁層は、無機絶縁膜と、前記無機絶縁膜上に形成された有機絶縁膜とから構成されることを特徴とする半導体装置。 - 請求項7記載の半導体装置であって、
前記無機絶縁膜は、前記電極パッド上において、開口径が15μm以上である開口部を有していることを特徴とする半導体装置。 - 請求項8記載の半導体装置であって、
前記無機絶縁膜の前記開口部内において、前記有機絶縁膜の開口部が形成されていることを特徴とする半導体装置。 - 請求項7乃至9いずれか一項記載の半導体装置であって、
前記有機絶縁膜の膜厚は、5μm以上であることを特徴とする半導体装置。 - 請求項1乃至10いずれか一項記載の半導体装置であって、
前記導電層は複数の金属層から構成されることを特徴とする半導体装置。 - 請求項1乃至11いずれか一項記載の半導体装置であって、
前記導電層はチタン(Ti)又はクロム(Cr)を含む材料から構成される第1バンプ下地金属層、及び、銅(Cu)あるいはニッケル(Ni)を含む材料から構成されるが第2バンプ下地金属層51からなることを特徴とする半導体装置。 - 請求項1乃至12いずれか一項記載の半導体装置であって、
前記突起電極は、略半球状又は略円柱状の形状を有することを特徴とする半導体装置。 - 半導体基板上の配線層に配設された電極パッドと、
前記電極パッドの表面の一部及び前記配線層上に配設された絶縁層と、
前記電極パッドの表出部を覆い且つ前記絶縁層上に延在して配設された導電層と、
前記電極パッド上の、前記導電層上に配設された突起電極と
を有することを特徴とする半導体装置。 - 請求項14記載の半導体装置であって、
前記電極パッドの表出部は前記絶縁膜により複数の領域に分割され、当該分割された領域上に前記導電層が配設されていることを特徴とする半導体装置。 - 請求項14又は15記載の半導体装置であって、
前記導電層は複数の金属層から構成されることを特徴とする半導体装置。 - 請求項1乃至16記載の半導体装置であって、
前記半導体装置は、配線基板にフリップチップ実装されることを特徴とする半導体装置。
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PCT/JP2007/064601 WO2009013826A1 (ja) | 2007-07-25 | 2007-07-25 | 半導体装置 |
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JP (1) | JP5387407B2 (ja) |
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JP4538764B2 (ja) * | 2008-07-24 | 2010-09-08 | カシオ計算機株式会社 | 半導体装置およびその製造方法 |
JP5350022B2 (ja) * | 2009-03-04 | 2013-11-27 | パナソニック株式会社 | 半導体装置、及び該半導体装置を備えた実装体 |
US8378485B2 (en) | 2009-07-13 | 2013-02-19 | Lsi Corporation | Solder interconnect by addition of copper |
JP5378130B2 (ja) | 2009-09-25 | 2013-12-25 | 株式会社東芝 | 半導体発光装置 |
US8624391B2 (en) * | 2009-10-08 | 2014-01-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Chip design with robust corner bumps |
JP2011096918A (ja) * | 2009-10-30 | 2011-05-12 | Oki Semiconductor Co Ltd | 半導体装置および半導体装置の製造方法 |
US9070851B2 (en) | 2010-09-24 | 2015-06-30 | Seoul Semiconductor Co., Ltd. | Wafer-level light emitting diode package and method of fabricating the same |
US9449933B2 (en) | 2012-03-29 | 2016-09-20 | Taiwan Semiconductor Manufacturing Co., Ltd. | Packaging device and method of making the same |
JP5475077B2 (ja) * | 2012-09-07 | 2014-04-16 | 日本特殊陶業株式会社 | 配線基板およびその製造方法 |
US9418877B2 (en) | 2014-05-05 | 2016-08-16 | Qualcomm Incorporated | Integrated device comprising high density interconnects in inorganic layers and redistribution layers in organic layers |
CN205944139U (zh) | 2016-03-30 | 2017-02-08 | 首尔伟傲世有限公司 | 紫外线发光二极管封装件以及包含此的发光二极管模块 |
JP7279624B2 (ja) | 2019-11-27 | 2023-05-23 | 株式会社ソシオネクスト | 半導体装置 |
US11495561B2 (en) | 2020-05-11 | 2022-11-08 | X Display Company Technology Limited | Multilayer electrical conductors for transfer printing |
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US5802699A (en) * | 1994-06-07 | 1998-09-08 | Tessera, Inc. | Methods of assembling microelectronic assembly with socket for engaging bump leads |
JPH08222571A (ja) * | 1995-02-13 | 1996-08-30 | Sony Corp | フリップチップicとその製造方法 |
JP2000512065A (ja) * | 1996-05-24 | 2000-09-12 | テセラ,インコーポレイテッド | 超小型電子素子のコネクタ |
JP2000243876A (ja) * | 1999-02-23 | 2000-09-08 | Fujitsu Ltd | 半導体装置とその製造方法 |
JP2000299406A (ja) * | 1999-04-15 | 2000-10-24 | Sanyo Electric Co Ltd | 半導体装置 |
US6332988B1 (en) * | 1999-06-02 | 2001-12-25 | International Business Machines Corporation | Rework process |
JP3629178B2 (ja) * | 2000-02-21 | 2005-03-16 | Necエレクトロニクス株式会社 | フリップチップ型半導体装置及びその製造方法 |
US7034402B1 (en) * | 2000-06-28 | 2006-04-25 | Intel Corporation | Device with segmented ball limiting metallurgy |
JP4068801B2 (ja) * | 2000-11-30 | 2008-03-26 | 株式会社ルネサステクノロジ | 半導体装置 |
JP4156205B2 (ja) * | 2001-03-16 | 2008-09-24 | 株式会社フジクラ | 半導体パッケージおよび半導体パッケージの製造方法 |
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JP2003124393A (ja) * | 2001-10-17 | 2003-04-25 | Hitachi Ltd | 半導体装置およびその製造方法 |
US6617696B1 (en) * | 2002-03-14 | 2003-09-09 | Fairchild Semiconductor Corporation | Supporting control gate connection on a package using additional bumps |
US20030218246A1 (en) * | 2002-05-22 | 2003-11-27 | Hirofumi Abe | Semiconductor device passing large electric current |
US7531898B2 (en) * | 2002-06-25 | 2009-05-12 | Unitive International Limited | Non-Circular via holes for bumping pads and related structures |
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US7468545B2 (en) * | 2005-05-06 | 2008-12-23 | Megica Corporation | Post passivation structure for a semiconductor device and packaging process for same |
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JP4452217B2 (ja) * | 2005-07-04 | 2010-04-21 | 富士通マイクロエレクトロニクス株式会社 | 半導体装置 |
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