CN101755334B - 半导体器件 - Google Patents

半导体器件 Download PDF

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Publication number
CN101755334B
CN101755334B CN200780100002.6A CN200780100002A CN101755334B CN 101755334 B CN101755334 B CN 101755334B CN 200780100002 A CN200780100002 A CN 200780100002A CN 101755334 B CN101755334 B CN 101755334B
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mentioned
semiconductor device
layer
electrode
substrate
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Expired - Fee Related
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CN200780100002.6A
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CN101755334A (zh
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松木浩久
今村和之
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Socionext Inc
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Fujitsu Semiconductor Ltd
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Abstract

提供一种半导体器件,其具有多个电极焊盘(47),配设在半导体元件(100)中的绝缘层上;多个导电层(51),被配设为一端与上述电极焊盘(47)的露出部连接,并针对各个上述电极焊盘(47)而分别在上述绝缘层上延伸;突起电极(52),配设在上述导电层(51)的另一端上;上述导电层(51)相对于上述多个电极焊盘(47),向一定的方向延伸。

Description

半导体器件
技术领域
本发明涉及半导体器件,特别涉及隔着外部连接用突起电极,以倒装片(flip chip)方式安装在布线衬底等支撑衬底上的半导体元件的结构。
背景技术
近年来,随着电子设备的高功能化和高速化,对于在该电子设备上安装的半导体器件,也要求进一步的高功能化、高集成化和小型化。因此,当在布线衬底等支撑衬底上安装半导体元件时,作为该半导体元件的安装方式,采用如下所谓的倒装片方式安装方式,即,隔着称为焊料凸块(solder bump)的外部连接用突起电极,在布线衬底上以倒置(face down)状态安装该半导体元件。
在图1中示出了在这样的倒装片方式安装中适用的半导体元件的焊料凸块配设面,另外,在图2中示出了图1的虚线A-A处的剖面。
参照图1和图2,在半导体元件30中,对由硅(Si)形成的半导体衬底1应用所谓的晶片工序,从而在其一侧的主面上形成多个晶体管等有源元件以及电容元件等无源元件(未图示)。而且,这些有源元件、无源元件等功能元件经由多层布线层3相互连接,从而形成电子电路,其中,上述多层布线层3隔着氧化硅(SiO2)层等绝缘层2而形成在该半导体衬底1的一侧的主面上。
隔着层间绝缘层5层叠多层由铝(Al)或铜(Cu)等形成的布线层4,从而形成上述多层布线层3。而且,经由层间连接部6,适宜连接上下布线层4之间,以及适宜地连接形成在上述半导体衬底1上的功能元件。
作为用于构成上述层间绝缘层5的材料,例如,使用有机树脂、添加了碳(C)的氧化硅(SiOC)、添加了氟(F)的硅玻璃(FSG:Fluorine dopedSilicon Glass)等介电常数低的材料(所谓的Low-K材料),从而减少布线间产生的电容,能够实现电信号传输的高速化。
在该多层布线层3的上部,有选择地配设有多个由铝(Al)形成的电极 焊盘7,该电极焊盘7适宜地与用于构成多层布线层3的布线层4连接。
另外,在该多层布线层3上,有选择地具有开口,以使上述电极焊盘7的中央部露出,从而有选择地配设有被称为钝化层的无机绝缘层8,该无机绝缘层8例如由氮化硅(SiN)或氧化硅(SiO2)形成。
进而,为了保护半导体元件的表面,有选择地配设有有机绝缘层9,该有机绝缘层9覆盖上述无机绝缘层8的上表面以及电极焊盘7上的无机绝缘层8的端面。
该有机绝缘层9的材料例如选自聚酰亚胺、苯丙环丁烯、酚醛树脂或聚苯并唖唑等有机绝缘性材料。
在未被无机绝缘层8以及有机绝缘层9覆盖的电极焊盘7上,层叠配置有由钛(Ti)或铬(Cr)形成的第一凸块基底金属(UBM:Under-BumpMetallization)层10、以及由镍(Ni)或铜(Cu)形成的第二凸块基底金属层11,该第一凸块基底金属层10和第二凸块基底金属层11被配设成从上述有机绝缘层89的口部端面起覆盖其周围。
而且,在第二凸块基底金属层11上配设有大致球状的外部连接用突起电极12。该外部连接用突起电极12由锡(Sn)-银(Ag)、或不含有铜(Cu)的锡(Sn)-银(Ag)等不含有铅(Pb)的焊料构成,还被称为焊料凸块。
经由如下工序形成具有这样的结构的半导体元件30。
即,在上述多层布线层3上,使配设在该多层布线层3上部的电极焊盘7有选择地露出,并配设无机绝缘层8和有机绝缘层9。通过所谓的气相生长法等来形成该绝缘层8、9,另外,在对该绝缘层有选择地形成开口时,能够应用所谓的光刻法。
接着,形成第一凸块基底金属层10,该第一凸块基底金属层10包括该电极焊盘7的露出部,并向有机绝缘层9延伸。第一凸块基底金属层10能够通过所谓的溅射法来涂敷。
接着,在第一凸块基底金属层10上形成光致抗蚀剂层,并进行曝光、显影、固化处理,从而对该光致抗蚀剂层形成与上述电极焊盘7中的外部连接用突起电极12的形成预定位置对应的开口。
接着,进行电解电镀(electrolytic plating)处理,从而在从上述光致抗蚀剂层的开口部露出的第一凸块基底金属层10上形成第二凸块基底金属层 11。接着,在该第二凸块基底金属层11上形成外部连接用电极层12。此时,使该外部连接用电极层12在上述光致抗蚀剂层上延伸。
然后,剥离除去光致抗蚀剂层,进而,将外部连接用电极层12用作为蚀刻掩模,除去上述第一凸块基底金属层10的不需要的部分。
接着,进行回流加热,从而使上述外部连接用电极层12熔融,并进行整形处理,使其呈大致球状。由此,形成在半导体衬底1的第二凸块基底金属层11上配设有大致球状的外部连接用电极12的半导体元件30。
在图3中示出了在布线衬底上以倒装片方式安装了该半导体元件30的状态。该半导体元件30以倒置状态安装在布线衬底21上。该布线衬底21由有机组合衬底形成,该有机组合衬底由环氧玻璃材料、聚酰亚胺胶带等形成。在该布线衬底21的一侧的主面(上表面)上有选择地配设有多个电极焊盘22,并且覆盖配设有防焊层23,该防焊层23有选择地具有开口,以使该电极焊盘22的中央部露出。
在配设于该布线衬底21上的电极焊盘22上连接有上述半导体元件30的外部连接用突起电极12,另外,在该半导体元件30和布线衬底21之间填充有所谓的底层填料24。另一方面,在该布线衬底21的另一侧的主面(下表面)上配设有由焊料形成的外部连接用突起电极25。
通过如下工序来形成具有这样的结构的半导体器件50。
即,在布线衬底21的一侧的主面(上表面)上,以倒装片(倒置)方式安装半导体元件30。
接着,通过回流加热处理,使该半导体元件30的外部连接用突起电极12和预先配设在布线衬底21的电极焊盘22上的预备焊料(焊料预涂层,省略图示)熔融,从而使得该半导体元件30的外部连接用突起电极12和布线衬底21上的电极焊盘22相连接。
接着,在半导体元件10和布线衬底21之间填充底层填料24,并使其固化。
然后,在布线衬底21的另一侧的主面(下表面)上安装焊料球,并经由回流加热工序和冷却工序,配设外部连接用突起电极25。
这样,当在半导体衬底上设置外部连接端子时,为了防止半导体器件的电特性的劣化,提出了半导体器件的如下结构,即,该半导体器件具有:内 部布线层,其与形成在半导体衬底内的电子电路连接;导通部,其在上述半导体衬底上的任意位置与该内部布线层连接,并且从形成在上述半导体衬底上的保护层露出;布线层,其形成在上述保护层上,与该导通部连接;外部连接端子,其与该布线层连接,并且具有规定的高度;在上述导通部的正下方不设置电子电路,并且上述导通部的直径的尺寸在上述布线层的宽度以下(例如,参照专利文献1)。
另外,提出了如下半导体集成电路装置,即,在形成于半导体衬底上的半导体集成电路的引出电极上,隔着凸块基底导体层而设置含有锡(Sn)的焊料凸块电极,从而形成半导体集成电路装置,上述凸块基底导体层是通过在设置于引出电极上的具有粘接功能的导体层上设置含有钯(Pd)的导体层而成的(例如,参照专利文献2)。
专利文献1:JP特开2000-243876号公报
专利文献2:JP特许3645391号公报
发明内容
发明要解决的课题
如上所述,在制造将半导体元件30隔着配设在其表面上的外部连接用突起电极12安装在布线衬底21上的半导体器件时,在回流加热工序中,使外部连接用突起电极12以及预先覆盖在布线衬底21的电极焊盘22上的预备焊料(焊料预涂层)熔融,由此连接半导体元件30的外部连接用突起电极12和布线衬底21上的电极焊盘22。然后,实施冷却处理,从而使该外部连接用突起电极固化。
构成该半导体元件30的硅(Si)衬底的热膨胀系数约为3至4ppm/℃,另一方面,由有机材料形成的布线衬底21的热膨胀系数约为10至17ppm/℃,该布线衬底21的热膨胀系数大于半导体元件30的热膨胀系数。
因此,若在外部连接用突起电极的回流加热工序后进行冷却,则基于半导体元件30的热膨胀系数和布线衬底21的热膨胀系数的不同,产生明显的变形应力。即,由于布线衬底21的热膨胀系数大于半导体元件30的热膨胀系数,因此在进行上述冷却处理时,从因温度变化而引起的伸缩较大的布线衬底21向半导体元件30施加应力。
上述状态是在焊料材料(外部连接用突起电极12以及预备焊料)固化的状态下发生的,因此,不能用该焊料来吸收从布线衬底21作用于半导体元件30的应力。
因此,从布线衬底21作用于半导体元件30的外部连接用突起电极12的应力经由第二凸块基底金属层11、第一凸块基底金属层10以及电极焊盘7而作用于多层布线层3中的层间绝缘层5,其中,该层间绝缘层5由所谓的Low-K(低介电常数)材料形成。
其结果,在隔着该层间绝缘层5而层叠的布线层4中会发生层间剥离,并且在半导体器件50中会发生电不良。
本发明是鉴于上述问题而形成的,其目的在于提供一种半导体器件,在隔着外部连接用突起电极将半导体元件安装在布线衬底上时,使从布线衬底经由上述外部连接用突起电极而作用于半导体元件的多层布线部的应力缓和,能够防止在该布线层中发生层间剥离,上述多层布线部包含由Low-K材料等形成的层间绝缘层。
解决课题的手段
根据本发明的一个观点,提供一种半导体器件,其具有:多个电极焊盘,配设在半导体衬底上的布线层上;绝缘层,以使上述电极焊盘露出的方式配设在上述布线层上;多个导电层,一端与上述电极焊盘的露出部连接,针对各个上述电极焊盘分别在上述绝缘层上延伸,所述多个导电层在从上述电极焊盘的露出部延伸的方向上宽度逐渐扩大;突起电极,配设在上述导电层的另一端;上述导电层相对于上述多个电极焊盘,向一定的方向延伸。
也可以使所有上述导电层向一定的方向延伸。另外,上述导电层也可以从上述半导体衬底的中心部向外周方向延伸。进而,上述导电层也可以从上述半导体衬底的外周部向中心方向延伸。也可以在上述半导体衬底的主面上,在纵向以及横向上,以矩阵状大致等间隔地配设有多个上述电极焊盘。上述布线层也可以包括介电常数为5以下的层间绝缘膜。上述导电层也可以由多个金属层构成。
根据本发明的另一观点,提供一种半导体器件,其具有:电极焊盘,配设在半导体衬底上的布线层上;绝缘层,配设在上述电极焊盘的表面的一部分以及上述布线层上;导电层,被配设成覆盖上述电极焊盘的露出部,并且向上述绝缘层上延伸;突起电极,配设在上述电极焊盘上的上述导电层上。
上述电极焊盘的露出部也可以被上述绝缘膜分割成多个区域,在该分割的区域上配设有上述导电层。
上述半导体器件也可以以倒装片方式安装在布线衬底上。
发明的效果
根据本发明,能够提供如下半导体器件,即,当隔着外部连接用突起电极将半导体元件安装在布线衬底上时,能够使从布线衬底经由上述外部连接用突起电极而作用于半导体元件的多层布线部的应力缓和,能够防止在布线层中发生层间剥离,其中,上述多层布线层包含由Low-K材料等形成的层间绝缘层。
附图说明
图1是表示现有的半导体元件的结构的俯视图。
图2是图1的虚线A-A处的剖视图。
图3是表示在布线衬底上以倒装片方式安装了图1和图2所示的半导体元件的状态的图。
图4是应用于本发明第一实施方式的半导体器件中的半导体元件的俯视图。
图5是图4的虚线A-A处的剖视图。
图6是图5所示的半导体元件的变形例的图。
图7是表示在布线衬底上以倒装片方式安装了图4和图5所示的半导体元件的状态的图。
图8是表示本发明第一实施方式的半导体元件中的、第一凸块基底金属层以及第二凸块基底金属层的层叠结构体的导出以及延伸方式的第一变形例的俯视图。
图9是表示本发明第一实施方式的半导体元件中的、第一凸块基底金属层以及第二凸块基底金属层的层叠结构体的导出以及延伸方式的第二变形例的俯视图。
图10是表示应用于本发明第二实施方式的半导体器件中的半导体元件的结构的图。
图11是用于说明本发明第一实施方式的半导体器件的制造方法的流程图。
附图标记的说明
100、110、120、150半导体元件
41半导体衬底
43多层布线层
44布线层
45层间绝缘层
46布线连接部
47电极焊盘
48无机绝缘层
49有机绝缘层
50第一凸块基底金属层
51第二凸块基底金属层
52外部连接用突起电极
55绝缘构件
71布线衬底
200半导体器件
具体实施方式
下面,参照附图对本发明的实施方式的半导体器件及其制造方法进行说明。
1.半导体器件
[第一实施方式]
在图4中示出了本发明第一实施方式的半导体元件的主面。另外,在图5中示出了该图4的虚线A-A处的剖面。
参照图4和图5,在本发明第一实施方式的半导体元件100中,在由硅(si)形成的半导体衬底41上应用所谓的晶片工序,从而在其一侧的主面上配设晶体管等有源元件以及电容元件等无源元件(未图示)。
而且,这些有源元件、无源元件等功能元件经由多层布线层43而相互连接,从而形成电子电路,其中,上述多层布线层43隔着氧化硅(SiO)层等绝缘层42而形成在该半导体衬底41的一侧的主面上。
在这样的结构中,如图5所示,隔着层间绝缘层45而层叠多个由铝(Al)或铜(Cu)等形成的布线层44,从而形成多层布线层43。而且,经由层间连接部46,连接上下的布线层44间,以及适宜地连接形成在上述半导体衬底1上的功能元件。即,该布线层的一部分有选择地贯通上述绝缘层42,从而与形成在上述半导体衬底41上的功能元件连接。
使用上述铝(Al)、铜(Cu)或钨(W)等来形成该层间连接部46。
在此,作为用于构成层间绝缘层45的材料,例如使用有机树脂、含有碳(C)的氧化硅(SiOC)、或添加了氟(F)的硅玻璃(FSG:Fluorine dopedSilicon Glass)等介电常数为5以下的材料(所谓的Low-K材料),从而减少形成在布线间的电容量,能够实现电信号传输的高速化。
在该多层布线层43的上部,配设有多个由铝(Al)形成的电极焊盘(电极部)47,适宜地与构成多层布线层43的布线层44连接。如图4所示,在半导体元件100的主面上,以格子状配设有该电极焊盘47,即,在纵向和横向上,大致等间隔地配设有多个电极焊盘47而成为所谓的矩阵状。
另外,在上述多层布线层43上具有使上述电极焊盘47的中央部露出的开口,并有选择地配设有氮化硅(SiN)或氧化硅(SiO2)等无机绝缘层48。该无机绝缘层48还被称为钝化层。
此外,将配设在电极焊盘47上的无机绝缘层48的开口的开口直径设为15μm以上。若该开口直径小于15μm,则接触电阻变大,很难实现良好的电连接。
进而,为了保护半导体元件100的表面,以覆盖上述无机绝缘层48的上表面以及电极焊盘47上的无机绝缘层48的内侧面的方式,配设有有机绝缘层49。
作为该有机绝缘层49,应用具有约2至20GPa的杨氏模量的绝缘材料, 例如,应用选自聚酰亚胺、苯丙环丁烯、酚醛树脂、或聚苯并唖唑等的绝缘材料。将该有机绝缘层49的膜厚设为5μm以上。
而且,在上述电极焊盘47的露出部,即,在未被上述无机绝缘层48和有机绝缘层49覆盖的表面上,在该有机绝缘层49上延伸配设有第一凸块基底金属层(UBM:Under-Bump Metallization)50和第二凸块基底金属层51,使它们呈层叠状态。该第一凸块基底金属层50和第二凸块基底金属层51的层叠结构体在从上述电极焊盘47的露出部延伸的方向上,其宽度逐渐扩大。
在此,上述第一凸块基底金属50具有由钛(Ti)或铬(Cr)形成的下层金属层50A以及配设在该下层金属层50A上的、由铜(Cu)形成的上层金属层50B(未图示)。通过溅射法来涂敷这些金属层。而且,关于下层金属层50A,还考虑与用于构成有机绝缘层49的有机绝缘材料之间的紧贴性来进行选择。
另一方面,作为第二凸块基底金属层51,应用铜(Cu)或镍(Ni)。通过电镀法来覆盖用于构成该第二凸块基底金属层51的金属层。此时,上述第一凸块基底金属50中的上层金属层50A使该第二凸块基底金属层51的覆盖变得容易。使该第二凸块基底金属层51的厚度为5μm以上,从而有助于热收缩时的应力的缓和。
而且,在该第二凸块基底金属层51上有选择地配设有外部连接用突起电极52。该外部连接用突起电极52具有由镍(Ni)或铜(Cu)形成的基底层52A以及配设在该基底层52A上的低熔点金属层52B。
该低熔点金属层52B由熔点约为350℃以下的合金构成,例如,由锡(Sn)-银(Ag)或含有铜(Cu)的锡(Sn)-银(Ag)等的不含有铅(Pb)的焊料构成,即,由所谓的无铅焊料(Sn-Ag-Cu alloy)构成。该低熔点金属层52B还被称为焊料凸块。该低熔点金属层52B以大于上述电极焊盘47的面积与基底层52A接触。
而且,在该外部连接用突起电极52的表面上也可以配设形成有金(Au)、铜(Cu)、镍(Ni)或锡(Sn)等金属覆盖层。另外,该外部连接用突起电极52并不仅限于图示的大致半球状的形状,也可以呈大致圆柱状。
在这样的结构中,如图4所示,与多个电极焊盘47连接的上述第一凸块基底金属50以及第二凸块基底金属层51的层叠结构体分别以相同的长度 向同一方向延伸。
其结果,在半导体元件100的主面上,在纵向和横向上,大致等间隔地配设有外部连接用突起电极52而成为所谓的矩阵状,其间隔与上述电极焊盘47的间隔大致相同。
此外,如图6所示,在该半导体元件100中,也可以用由有机物形成的绝缘构件55来覆盖第一凸块基底金属层50以及第二凸块基底金属层51的层叠结构体的上表面,即,对包括未被外部连接用突起电极52覆盖而露出的部位的有机绝缘层49的上表面进行覆盖。
通过这样的绝缘材料部55的覆盖,能够防止第二凸块基底金属层51的表面氧化,另外,能够保护有机绝缘层49。
在图7中示出了在布线衬底上以倒装片方式安装了具有这样结构的半导体元件100的状态,将其作为半导体器件200。
在此,布线衬底71由有机组合衬底构成,该有机组合衬底由环氧玻璃材料、聚酰亚胺胶带(polyimide tape)等形成。在该布线衬底71的一侧主面(上表面)上有选择地配设有多个电极焊盘72,并且有选择地配设有防焊层73,该防焊层73具有开口,以使该电极焊盘72的中央部露出。
对于配设在布线衬底71上的电极焊盘72连接有半导体元件100的外部连接用突起电极52。在该半导体元件100和布线衬底71之间填充有所谓的底层填料(underfill material)74。另外,在布线衬底71的另一侧的主面(下表面)上配设有由焊料形成的外部连接用突起电极75。
如上所述,在本发明第一实施方式的半导体元件100中,外部连接用突起电极52因凸块基底金属51、52的延伸而位于从电极焊盘47向横方向偏移的区域上。即,该外部连接用突起电极52的整个下表面隔着第二凸块基底金属层51以及第一凸块基底金属层50而位于有机绝缘层49上。
因此,当在布线衬底71上安装半导体元件100时,在回流加热工序后进行冷却,从而,即使因半导体元件100的热膨胀系数和布线衬底71的热膨胀系数之差而导致从布线衬底70向半导体元件100的外部连接用突起电极52施加应力,该应力也不会直接作用于电极焊盘47部。而且,该应力被第二凸块基底金属51、第一凸块基底金属层50以及有机绝缘层49等分散,从而被缓和。
由此,当在布线衬底71上安装半导体元件100时,能够防止作用于该半导体元件100的外部连接用突起电极52上的应力经由电极焊盘47而传递到多层布线层43中的由所谓的Low-K材料构成的层间绝缘层45部分。而且,能够防止在隔着该层间绝缘层45而层叠的布线层44中发生层间剥离,能够避免在半导体器件200中发生电不良。
此外,由于上述有机绝缘层49具有弹性,因此,在将半导体元件100安装在布线衬底71上时,使从该布线衬底71经由外部连接用突起电极52而作用于第二凸块基底金属(第二金属部)51方向的应力分散(缓和)。
上述半导体元件100中的第一凸块基底金属层50以及第二凸块基底金属层51的层叠结构体的导出以及延伸方向并不仅限于上述实施方式,能够进行各种选择。即,例如还能够采用图8或图9所示的方式。
在图8中示出了本发明第一实施方式的半导体元件110中的、第一凸块基底金属层49以及第二凸块基底金属层50的层叠结构体的导出以及延伸方式的第一变形例。
在该半导体元件110的主面上,在除了其中央部的部分以外的部分,以格子状配设有多个电极焊盘47,即,在纵向以及横向上等间隔地配设有多个电极焊盘47。而且,在此,该电极焊盘47关于其配设位置被分成四组,对于与该电极焊盘47连接的第一凸块基底金属层50以及第二凸块基底金属层51的层叠结构体,以与该组对应的方式进行分组,该组分别向半导体元件110的四个角部(角落部)方向被导出及延伸。
通过这样的结构,不会使相邻的外部连接用突起电极52各自的位置相互重叠,能够提高配置的自由度,另外,能够防止在该半导体元件110的主面的端部附近向偏离的方向形成外部连接用突起电极52。
另外,在图9中示出了本发明第一实施方式的半导体元件120中的、第一凸块基底金属层50以及第二凸块基底金属层51的导出以及延伸方式的第二变形例。
在该半导体元件120的主面上,如向其四个角部(角落部)分散那样,以格子状配设有多个电极焊盘47,即,在纵向以及横向上等间隔地配设有多个电极焊盘47。
而且,在此,该电极焊盘47关于其配设位置被分成四组,对与该电极 焊盘47连接的第一凸块基底金属层50以及第二凸块基底金属层51的层叠结构体,以与该组对应的方式进行分组,该组分别向半导体元件120的大致中央部被导出及延伸。
通过这样的结构,也不会使相邻的外部连接用突起电极52各自的位置相互重叠,能够提高配置的自由度,另外,能够防止在该半导体元件120的主面的端部附近向偏离的方向形成外部连接用突起电极52。
一般,在安装半导体元件的布线衬底上,根据因温度变化所引起的伸缩而作用的应力在半导体元件的四个角部(角落部)较大。因此,通过如此地配设第一凸块基底金属层50以及第二凸块基底金属层51的层叠结构体,以及在从电极焊盘47的位置向该半导体元件120的中央部侧靠近的位置配设外部连接用突起电极52,能够抑制作用于该电极焊盘47的应力。
[第二实施方式]
参照图10对本发明第二实施方式的半导体元件进行说明。
在该图10中,主要示出了第二实施方式的半导体元件150中的、一个外部连接用突起电极52以及与该外部连接用突起电极52连接的布线层结构。在此,图10A表示该外部连接用突起电极52以及与该外部连接用突起电极52连接的布线层的剖面结构,另一方面,图10B表示配设该外部连接用突起电极52以及凸块基底金属层之前的电极焊盘部的平面形状。图10A相当于图10B的A-A′剖面。
此外,在该图10中,对于与上述第一实施方式的半导体元件100中的结构对应的部位标注相同的附图标记。
在本发明第二实施方式的半导体元件150中,对半导体衬底41应用所谓的晶片工序,从而在其一侧的主面上形成晶体管等有源元件和电容元件等无源元件(未图示),进而,在该半导体衬底41的一侧的主面上,隔着氧化硅(SiO2)层42等绝缘层配而设有多层布线层43。
隔着层间绝缘层45而层叠多个布线层44,从而形成这样的多层布线层43。并且,经由层间连接部46而适宜地连接上下布线层44间。
在该多层布线层43的上部,配设有多个由铝(Al)形成的电极焊盘(电极部)47,并且适宜地连接有用于构成多层布线层43的布线层44。在本实 施方式中,也在半导体元件150的主面上以格子状配设有多个电极焊盘47,即,在纵向以及横向上以所谓的矩阵状大致等间隔地配设有多个电极焊盘47。
另外,在上述多层布线层43上具有使上述电极焊盘47的中央部有选择地露出的开口,并层叠配设有由氮化硅(SiN)或氧化硅(SiO2)形成的无机绝缘层48以及聚酰亚胺等有机绝缘层49。
本实施方式的结构的特征为,在该电极焊盘47上有选择地配设有上述绝缘层,以使该电极焊盘47的表面被分割成多个区域露出。即,在上述电极焊盘47上配设有无机绝缘层48和有机绝缘层49,该无机绝缘层48用于有选择地覆盖该电极焊盘47的表面,该有机绝缘层49用于覆盖该无机绝缘层47的上表面以及侧面。
由此,有机绝缘层49覆盖无机绝缘层48的表面,并且使上述电极焊盘47的表面有选择地露出。
如图10所示,在本实施方式中,在电极焊盘47的表面上以十字形状配设有无机绝缘层48,而且覆盖该无机绝缘层48而配设有有机绝缘层49。
由此,该电极焊盘47的表面被分割成四个区域47a至47d,它们分别从有机绝缘层49中的扇形形状的开口49A露出。
而且,该电极焊盘47在各个扇形形状的开口49A中与凸块基底金属层57相接。即,将该凸块基底金属层57分割成四个部分来与电极焊盘47进行连接。
该第凸块基底金属层57的厚度比将上述有机绝缘层49和无机绝缘层48进行层叠后的厚度薄,从而在上述扇形形状的开口内外具有阶梯差。
在此,作为该凸块基底金属层57,应用由下层、中间层以及上层构成的三层结构,其中,上述下层由与上述第一实施方式的第一凸块基底金属50相同的材料形成,上述中间层由与第二凸块基底金属51相同的材料形成,上述上层由与外部连接用突起电极的基底层52A相同的材料形成。
而且,在该凸块基底金属57上配设有外部连接用突起电极52。该外部连接用突起电极52经由该凸块基底金属57而电连接至上述电极焊盘47,并且该外部连接用突起电极52与上述电极焊盘47导通连接。
通过这样的半导体元件结构,当在布线衬底71上进行安装时,在回流 加热工序后进行冷却,从而即使因半导体元件150的热膨胀系数和布线衬底71的热膨胀系数之差而导致从布线衬底71向半导体元件150的外部连接用突起电极52施加应力,在该外部连接用突起电极52上产生的应力也会被分割成多个区域后经由凸块基底金属57而作用于电极焊盘47的表面。即,该应力被分散作用于电极焊盘47。由此,缓和该电极焊盘47中的应力的集中。
因此,在本实施方式中,当在布线衬底71上安装半导体元件150时,能够防止作用于该半导体元件150的外部连接用突起电极52的应力经由电极焊盘47而作用于多层布线层43中的层间绝缘层45部分,该层间绝缘层45由所谓的Low-K材料形成。由此,能够防止在隔着该层间绝缘层45层叠的布线层44中发生层间剥离,并且能够避免在半导体器件150中发生电不良。
此外,在图10所示的实施方式中,电极焊盘47的露出的表面被分割成扇形形状的四个区域,但是本发明并不仅限于这样的方式。
即,在用于覆盖该电极焊盘47的表面的绝缘层上设置的开口形状能够根据需要进行选择。而且,通过设置多个开口,在向布线衬底等进行安装时,能够使作用于半导体元件的外部连接用突起电极的应力分散。
2.半导体器件的制造方法
[第一实施方式的半导体器件的制造方法]
参照图5、图7、图9以及图11,对本发明的第一实施方式的半导体器件200的制造方法进行说明。
在半导体衬底的一侧的主面上,通过溅射法,在有机绝缘层49上覆盖第一凸块基底金属层50,其中,在上述有机绝缘层49上有选择地形成有开口,以使隔着多层布线层而配设的电极焊盘47露出(图11的步骤S1)。此时,例如,将用于使上述电极焊盘47露出的有机绝缘层49的开口直径设定为15μm以上,另外,例如,将该有机绝缘层49的膜厚设定为约5μm以上。
接着,通过旋涂法,在第一凸块基底金属层50上形成光致抗蚀剂层(图11的步骤S2)。对该光致抗蚀剂层进行曝光、显影、固化处理,从而对该光致抗蚀剂层形成与第二凸块基底金属51的形成预定位置对应的开口。
在图5所示的例子中,在从电极焊盘47的形成位置向同一方向偏离的 位置形成该开口,另外,在图8所示的例子中,在从电极焊盘47的形成位置进一步向外缘部方向偏离的位置形成该开口,进而,在图9所示的例子中,在从电极焊盘47的形成位置向半导体元件的中心方向偏离的位置形成该开口。
接着,进行电解电镀处理,从而在上述光致抗蚀剂层的开口部内形成第二凸块基底金属层51(图11的步骤S3)。此时,例如,将该第二凸块基底金属层51的厚度选择为5μm以上。
接着,除去上述光致抗蚀剂层(图11的步骤S4)。
然后,通过旋涂法,在第一凸块基底金属层50和第二凸块基底金属层51的层叠结构体上再次形成光致抗蚀剂层(图11的步骤S5)。
然后,进行曝光、显影、固化处理,从而对该光致抗蚀剂层形成与上述外部连接用突起电极的形成预定位置对应的开口。
接着,在该光致抗蚀剂层开口部内依次形成外部连接用突起电极基底层52A和外部连接用突起电极52B(图11的步骤S6)。此时,外部连接用突起电极52B的一部分延伸至光致抗蚀剂层上。
然后,除去上述光致抗蚀剂层(图11的步骤S7)。
接着,将上述第二凸块基底金属层51作为掩模,通过所谓的湿式蚀刻法,除去上述第一凸块基底金属50的不需要的部分(图11的步骤S8)。
接着,通过回流加热,使上述外部连接用电极层52熔融,并对其进行整形处理,使其呈大致球状(图11的步骤S9)。即,在半导体衬底1的上述第一凸块基底金属层50和第二凸块基底金属51的层叠结构体上形成大致球状的外部连接用电极52。
这样,在布线衬底71上以倒装片(倒置)方式安装形成有大致球状的外部连接用电极51的半导体元件100后,通过回流加热处理,使外部连接用突起电极52以及设置在布线衬底71的电极焊盘72上的预备焊料(焊料预涂层,省略图示)熔融,从而连接该半导体元件100的外部连接用突起电极52和布线衬底70中的电极焊盘72。
接着,在半导体元件100和布线衬底71之间填充底层填料74,并使其固化。
然后,在布线衬底71的下表面上安装焊料球,并经由回流加热工序以 及冷却工序,配设外部连接用突起电极75。
此外,如果需要,也可以在配设该外部连接用突起电极75之前配设用于覆盖上述半导体元件100的树脂密封部。
由此,形成本发明第一实施方式的半导体器件200。
[第二实施方式的半导体器件的制造方法]
通过如下工序来形成图10所示的本发明第二实施方式的半导体元件150。
通过公知的方法,在设置于半导体衬底41上的布线层43上,依次覆盖形成无机绝缘层48和有机绝缘层49。此时,在无机绝缘层48和有机绝缘层49上有选择地形成用于使电极焊盘47的表面有选择地露出的开口。
即,对覆盖该电极焊盘47的无机绝缘层48进行选择蚀刻处理,从而在该无机绝缘层48上形成用于使电极焊盘47的表面在多个区域露出的开口。
接着,在该无机绝缘层48上覆盖有机绝缘层49,并对该有机绝缘层49也进行选择蚀刻处理,从而在上述电极焊盘47上形成与设置在无机绝缘层46上的开口对应的开口。由此,使上述电极焊盘47的上表面从设置在该有机绝缘层49上的各个开口露出。
接着,利用溅射法,在上述电极焊盘47的露出部和有机绝缘层49上形成凸块基底金属层57的下层(由与上述第一实施方式中的第一凸块基底金属50相同的材料形成的金属层)。
接着,在该凸块基底金属层57的下层上,通过所谓的选择电镀法来覆盖凸块基底金属层的上层(由与上述第一实施方式的第二凸块基底金属51相同的材料形成的金属层),其中,上述选择电镀法将光致抗蚀剂层作为掩模。
进而,通过旋涂法,在上述凸块基底金属57的上层上涂布形成光致抗蚀剂层,并进行曝光、显影、固化处理,从而对该光致抗蚀剂层形成与上述电极焊盘47上的外部连接用突起电极52的形成位置对应的开口。
然后,进行电解电镀处理,从而在上述光致抗蚀剂层的开口部内形成外部连接用突起电极基底层52A(由与上述第一实施方式的外部连接用突起电极的基底层52A相同的材料形成的金属层)。
接着,进行电解电镀处理,在上述光致抗蚀剂层的开口部内,在上述外部连接用突起电极基底层52A上形成外部连接用电极层52B。该外部连接用电极层52B的一部分延伸至上述光致抗蚀剂层上。
然后,剥离除去上述光致抗蚀剂层,进而,将上述外部连接用电极层52作为掩模,通过所谓的湿式蚀刻法,除去上述凸块基底金属层57的不需要的部分。
由此,在各电极焊盘部中,使凸块基底金属层57在有机绝缘层49的开口部内与电极焊盘47的表面接触,并且延伸至该电极焊盘47周围的有机绝缘层49上。
接着,通过回流加热,使上述外部连接用电极层52B熔融,并对其进行整形处理,使其呈大致球状。由此,在凸块基底金属层57上形成大致球状的外部连接用电极52。
这样,在布线衬底上以倒装片(倒置)方式安装形成有大致球状的外部连接用电极52的半导体元件150后,通过回流加热处理,使外部连接用突起电极52以及设置在布线衬底的电极焊盘72上的预备焊料(焊料预涂层,省略图示)熔融,从而连接该半导体元件150的外部连接用突起电极52和布线衬底上的电极焊盘72。
接着,在半导体元件150和布线衬底之间填充底层填料,并使其固化。
然后,在布线衬底的下表面上安装焊料球,并经由回流加热工序和冷却工序,连接外部连接用突起电极75。此外,如果需要,也可以在配设该外部连接用突起电极之前配设用于覆盖上述半导体元件150的树脂密封部。
由此,形成本发明第二实施方式的半导体器件。
以上,通过实施例对本发明进行了说明,但是本发明并不限定于上述实施例,在本发明的思想的范围内,显然能够进行各种变形以及改良。
产业上的可利用性
本发明适用于半导体器件,更具体地说,适用于隔着外部连接用突起电极安装在布线衬底上的半导体器件。

Claims (15)

1.一种半导体器件,其特征在于,具有:
多个电极焊盘,配设在半导体衬底上的布线层上,
绝缘层,以使上述电极焊盘露出的方式配设在上述布线层上,
多个导电层,被配设为一端与上述电极焊盘的露出部连接,并且针对各个上述电极焊盘分别延伸配设在上述绝缘层上,所述多个导电层在从上述电极焊盘的露出部延伸的方向上宽度逐渐扩大,
突起电极,配设在上述导电层的另一端;
上述多个导电层相对于多个上述电极焊盘,向一定的方向延伸。
2.根据权利要求1所述的半导体器件,其特征在于,在上述半导体衬底的主面上,在纵向以及横向上,以大致等间隔配设有多个上述电极焊盘而形成矩阵状。
3.根据权利要求2所述的半导体器件,其特征在于,在上述半导体衬底的主面上,在纵向以及横向上,以大致等间隔配设有多个上述突起电极而形成矩阵状。
4.根据权利要求1所述的半导体器件,其特征在于,从上述电极焊盘到通过上述导电层而与上述电极焊盘连接的上述突起电极之间的距离,全部相等。
5.根据权利要求1所述的半导体器件,其特征在于,全部的上述导电层向一定的方向延伸。
6.根据权利要求1所述的半导体器件,其特征在于,上述导电层从上述半导体衬底的中心部向外周方向延伸。
7.根据权利要求1所述的半导体器件,其特征在于,上述导电层从上述半导体衬底的外周部向中心方向延伸。
8.根据权利要求1所述的半导体器件,其特征在于,上述绝缘层由无机绝缘膜以及形成在上述无机绝缘膜上的有机绝缘膜构成。
9.根据权利要求8所述的半导体器件,其特征在于,上述无机绝缘膜在上述电极焊盘上具有开口直径为15μm以上的开口部。
10.根据权利要求9所述的半导体器件,其特征在于,在上述无机绝缘膜的上述开口部内形成有上述有机绝缘膜的开口部。
11.根据权利要求8所述的半导体器件,其特征在于,上述有机绝缘膜的膜厚为5μm以上。
12.根据权利要求1所述的半导体器件,其特征在于,上述导电层由多个金属层构成。
13.根据权利要求12所述的半导体器件,其特征在于,上述导电层由第一凸块基底金属层和第二凸块基底金属层构成,其中,构成上述第一凸块基底金属层的材料含有钛和铬中的任意一种,构成上述第二凸块基底金属层的材料含有铜和镍中的任意一种。
14.根据权利要求1所述的半导体器件,其特征在于,上述布线层包括介电常数为5以下的层间绝缘膜。
15.根据权利要求1所述的半导体器件,其特征在于,上述突起电极的形状为大致球状和大致圆柱状中的任意一种。
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