JPS49131863U - - Google Patents

Info

Publication number
JPS49131863U
JPS49131863U JP1973030099U JP3009973U JPS49131863U JP S49131863 U JPS49131863 U JP S49131863U JP 1973030099 U JP1973030099 U JP 1973030099U JP 3009973 U JP3009973 U JP 3009973U JP S49131863 U JPS49131863 U JP S49131863U
Authority
JP
Japan
Prior art keywords
layer
semiconductor chips
conductive layer
windows
thermoplastic resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1973030099U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1973030099U priority Critical patent/JPS49131863U/ja
Priority to US449085A priority patent/US3903590A/en
Priority to FR7407977A priority patent/FR2220879B1/fr
Priority to GB1062374A priority patent/GB1426539A/en
Priority to CA194,496A priority patent/CA994004A/en
Priority to DE2411259A priority patent/DE2411259C3/de
Publication of JPS49131863U publication Critical patent/JPS49131863U/ja
Pending legal-status Critical Current

Links

Classifications

    • H10W40/258
    • H10W40/10
    • H10W70/093
    • H10W70/60
    • H10W70/614
    • H10W70/6875
    • H10W72/0711
    • H10W70/099
    • H10W70/682
    • H10W72/073
    • H10W72/07337
    • H10W72/874
    • H10W90/00
    • H10W90/10
    • H10W90/736

Landscapes

  • Wire Bonding (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP1973030099U 1973-03-10 1973-03-10 Pending JPS49131863U (enExample)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP1973030099U JPS49131863U (enExample) 1973-03-10 1973-03-10
US449085A US3903590A (en) 1973-03-10 1974-03-07 Multiple chip integrated circuits and method of manufacturing the same
FR7407977A FR2220879B1 (enExample) 1973-03-10 1974-03-08
GB1062374A GB1426539A (en) 1973-03-10 1974-03-08 Multiple chip integrated circuits and method of manufacturing the same
CA194,496A CA994004A (en) 1973-03-10 1974-03-08 Multiple semiconductor chip assembly and manufacture
DE2411259A DE2411259C3 (de) 1973-03-10 1974-03-08 Verfahren zur Herstellung integrierter Schaltkreise

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1973030099U JPS49131863U (enExample) 1973-03-10 1973-03-10

Publications (1)

Publication Number Publication Date
JPS49131863U true JPS49131863U (enExample) 1974-11-13

Family

ID=12294316

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1973030099U Pending JPS49131863U (enExample) 1973-03-10 1973-03-10

Country Status (6)

Country Link
US (1) US3903590A (enExample)
JP (1) JPS49131863U (enExample)
CA (1) CA994004A (enExample)
DE (1) DE2411259C3 (enExample)
FR (1) FR2220879B1 (enExample)
GB (1) GB1426539A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52139762U (enExample) * 1976-04-16 1977-10-22
JPS52139761U (enExample) * 1976-04-16 1977-10-22

Families Citing this family (89)

* Cited by examiner, † Cited by third party
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US3978578A (en) * 1974-08-29 1976-09-07 Fairchild Camera And Instrument Corporation Method for packaging semiconductor devices
FR2320633A1 (fr) * 1975-08-04 1977-03-04 Itt Boitier de circuit integre
GB1599852A (en) * 1977-02-17 1981-10-07 Varian Associates Package for holding a composite semiconductor device
US4088546A (en) * 1977-03-01 1978-05-09 Westinghouse Electric Corp. Method of electroplating interconnections
JPS5837713B2 (ja) * 1978-12-01 1983-08-18 富士通株式会社 半導体レ−ザ−装置の製造方法
JPS5850417B2 (ja) * 1979-07-31 1983-11-10 富士通株式会社 半導体装置の製造方法
FR2466103A1 (fr) * 1979-09-18 1981-03-27 Lerouzic Jean Procede de realisation d'un reseau d'interconnexion de composants electroniques a conducteurs en aluminium et isolant en alumine et reseau d'interconnexion obtenu par ce procede
EP0029334B1 (en) * 1979-11-15 1984-04-04 The Secretary of State for Defence in Her Britannic Majesty's Government of the United Kingdom of Great Britain and Series-connected combination of two-terminal semiconductor devices and their fabrication
JPS57207356A (en) * 1981-06-15 1982-12-20 Fujitsu Ltd Semiconductor device
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FR2560437B1 (fr) * 1984-02-28 1987-05-29 Citroen Sa Procede de report a plat d'elements de puissance sur un reseau conducteur par brasage de leurs connexions
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FR2601502B1 (fr) * 1986-07-09 1989-04-28 Em Microelectronic Marin Sa Dispositif electronique semi-conducteur comportant un element metallique de refroidissement
US4918811A (en) * 1986-09-26 1990-04-24 General Electric Company Multichip integrated circuit packaging method
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US5422513A (en) * 1992-10-16 1995-06-06 Martin Marietta Corporation Integrated circuit chip placement in a high density interconnect structure
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JPH07161919A (ja) * 1993-12-03 1995-06-23 Seiko Instr Inc 半導体装置およびその製造方法
US6864570B2 (en) * 1993-12-17 2005-03-08 The Regents Of The University Of California Method and apparatus for fabricating self-assembling microstructures
KR100420792B1 (ko) * 1996-09-26 2004-05-31 삼성전자주식회사 파워마이크로웨이브하이브리드집적회로
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AU3467500A (en) * 1999-03-23 2000-10-09 Vladimir Evgenievich Golynets Polycrystalline module and method for producing a semiconductor module
FR2793990B1 (fr) * 1999-05-19 2001-07-27 Sagem Boitier electronique sur plaque et procede de fabrication d'un tel boitier
DE19945855A1 (de) * 1999-09-24 2001-03-29 Bosch Gmbh Robert Mikrospule
EP1990833A3 (en) * 2000-02-25 2010-09-29 Ibiden Co., Ltd. Multilayer printed circuit board and multilayer printed circuit board manufacturing method
JP2002026280A (ja) * 2000-06-30 2002-01-25 Seiko Epson Corp 強誘電体メモリ及びその製造方法
US20020020898A1 (en) * 2000-08-16 2002-02-21 Vu Quat T. Microelectronic substrates with integrated devices
US6627477B1 (en) * 2000-09-07 2003-09-30 International Business Machines Corporation Method of assembling a plurality of semiconductor devices having different thickness
KR100797422B1 (ko) * 2000-09-25 2008-01-23 이비덴 가부시키가이샤 반도체소자, 반도체소자의 제조방법, 다층프린트배선판 및다층프린트배선판의 제조방법
US6555906B2 (en) * 2000-12-15 2003-04-29 Intel Corporation Microelectronic package having a bumpless laminated interconnection layer
US7498196B2 (en) 2001-03-30 2009-03-03 Megica Corporation Structure and manufacturing method of chip scale package
US20020175402A1 (en) * 2001-05-23 2002-11-28 Mccormack Mark Thomas Structure and method of embedding components in multi-layer substrates
US6606247B2 (en) 2001-05-31 2003-08-12 Alien Technology Corporation Multi-feature-size electronic structures
US6696910B2 (en) * 2001-07-12 2004-02-24 Custom One Design, Inc. Planar inductors and method of manufacturing thereof
US6838750B2 (en) * 2001-07-12 2005-01-04 Custom One Design, Inc. Interconnect circuitry, multichip module, and methods of manufacturing thereof
TW517361B (en) * 2001-12-31 2003-01-11 Megic Corp Chip package structure and its manufacture process
US6673698B1 (en) 2002-01-19 2004-01-06 Megic Corporation Thin film semiconductor package utilizing a glass substrate with composite polymer/metal interconnect layers
TW584950B (en) 2001-12-31 2004-04-21 Megic Corp Chip packaging structure and process thereof
TW503496B (en) * 2001-12-31 2002-09-21 Megic Corp Chip packaging structure and manufacturing process of the same
TW544882B (en) 2001-12-31 2003-08-01 Megic Corp Chip package structure and process thereof
US7214569B2 (en) * 2002-01-23 2007-05-08 Alien Technology Corporation Apparatus incorporating small-feature-size and large-feature-size components and method for making same
US6964881B2 (en) * 2002-08-27 2005-11-15 Micron Technology, Inc. Multi-chip wafer level system packages and methods of forming same
US7135780B2 (en) * 2003-02-12 2006-11-14 Micron Technology, Inc. Semiconductor substrate for build-up packages
US7253735B2 (en) 2003-03-24 2007-08-07 Alien Technology Corporation RFID tags and processes for producing RFID tags
DE10317018A1 (de) * 2003-04-11 2004-11-18 Infineon Technologies Ag Multichipmodul mit mehreren Halbleiterchips sowie Leiterplatte mit mehreren Komponenten
JP4339739B2 (ja) * 2004-04-26 2009-10-07 太陽誘電株式会社 部品内蔵型多層基板
DE102004025684B4 (de) 2004-04-29 2024-08-22 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Verfahren zum Ausbilden einer Kontaktstruktur zur elektrischen Kontaktierung eines optoelektronischen Halbleiterchips
JP4575071B2 (ja) * 2004-08-02 2010-11-04 新光電気工業株式会社 電子部品内蔵基板の製造方法
TWI260079B (en) * 2004-09-01 2006-08-11 Phoenix Prec Technology Corp Micro-electronic package structure and method for fabricating the same
JP3992038B2 (ja) * 2004-11-16 2007-10-17 セイコーエプソン株式会社 電子素子の実装方法、電子装置の製造方法、回路基板、電子機器
US7688206B2 (en) 2004-11-22 2010-03-30 Alien Technology Corporation Radio frequency identification (RFID) tag for an item having a conductive layer included or attached
DE102004061907A1 (de) * 2004-12-22 2006-07-13 Siemens Ag Halbleitermodul mit geringer thermischer Belastung
US8335084B2 (en) * 2005-08-01 2012-12-18 Georgia Tech Research Corporation Embedded actives and discrete passives in a cavity within build-up layers
JP5164362B2 (ja) * 2005-11-02 2013-03-21 キヤノン株式会社 半導体内臓基板およびその製造方法
KR100656300B1 (ko) * 2005-12-29 2006-12-11 (주)웨이브닉스이에스피 3차원 알루미늄 패키지 모듈, 그의 제조방법 및 3차원알루미늄 패키지 모듈에 적용되는 수동소자 제작방법
DE102006009723A1 (de) * 2006-03-02 2007-09-06 Siemens Ag Verfahren zum Herstellen und planaren Kontaktieren einer elektronischen Vorrichtung und entsprechend hergestellte Vorrichtung
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TWI453877B (zh) * 2008-11-07 2014-09-21 日月光半導體製造股份有限公司 內埋晶片封裝的結構及製程
US8288207B2 (en) * 2009-02-13 2012-10-16 Infineon Technologies Ag Method of manufacturing semiconductor devices
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TWI411075B (zh) 2010-03-22 2013-10-01 日月光半導體製造股份有限公司 半導體封裝件及其製造方法
TWI442526B (zh) * 2010-09-17 2014-06-21 旭德科技股份有限公司 導熱基板及其製作方法
US8927339B2 (en) 2010-11-22 2015-01-06 Bridge Semiconductor Corporation Method of making thermally enhanced semiconductor assembly with bump/base/flange heat spreader and build-up circuitry
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CN103828043B (zh) * 2011-09-07 2017-11-24 株式会社村田制作所 模块的制造方法及模块
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US8912641B1 (en) 2013-09-09 2014-12-16 Harris Corporation Low profile electronic package and associated methods
US9443789B2 (en) 2013-09-11 2016-09-13 Harris Corporation Embedded electronic packaging and associated methods
WO2015043495A1 (zh) * 2013-09-30 2015-04-02 南通富士通微电子股份有限公司 晶圆封装结构和封装方法
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Family Cites Families (4)

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US3405442A (en) * 1964-02-13 1968-10-15 Gen Micro Electronics Inc Method of packaging microelectronic devices
US3614832A (en) * 1966-03-09 1971-10-26 Ibm Decal connectors and methods of forming decal connections to solid state devices
US3679941A (en) * 1969-09-22 1972-07-25 Gen Electric Composite integrated circuits including semiconductor chips mounted on a common substrate with connections made through a dielectric encapsulator
US3691628A (en) * 1969-10-31 1972-09-19 Gen Electric Method of fabricating composite integrated circuits

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52139762U (enExample) * 1976-04-16 1977-10-22
JPS52139761U (enExample) * 1976-04-16 1977-10-22

Also Published As

Publication number Publication date
CA994004A (en) 1976-07-27
GB1426539A (en) 1976-03-03
DE2411259A1 (de) 1974-09-19
US3903590A (en) 1975-09-09
FR2220879A1 (enExample) 1974-10-04
DE2411259B2 (de) 1980-01-24
FR2220879B1 (enExample) 1978-01-06
DE2411259C3 (de) 1980-11-06

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