GB1221914A - Manufacture of integrated circuits - Google Patents

Manufacture of integrated circuits

Info

Publication number
GB1221914A
GB1221914A GB3006569A GB3006569A GB1221914A GB 1221914 A GB1221914 A GB 1221914A GB 3006569 A GB3006569 A GB 3006569A GB 3006569 A GB3006569 A GB 3006569A GB 1221914 A GB1221914 A GB 1221914A
Authority
GB
United Kingdom
Prior art keywords
chips
circuit
deposited
pattern
conductor pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB3006569A
Inventor
Thomas Meirion Jackson
Alan Douglas Brisbane
Victor George Smith
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STC PLC
Original Assignee
Standard Telephone and Cables PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Standard Telephone and Cables PLC filed Critical Standard Telephone and Cables PLC
Priority to GB3006569A priority Critical patent/GB1221914A/en
Publication of GB1221914A publication Critical patent/GB1221914A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01014Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01042Molybdenum [Mo]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01074Tungsten [W]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19043Component type being a resistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

1,221,914. Circuit assemblies. STANDARD TELEPHONES & CABLES Ltd. 13 June, 1969, No. 30065/69. Heading HlR. In the manufacture of a hybrid circuit module, monolithic integrated circuit chips 11 are bonded in holes in a substrate, which may or may not be provided with the conductor pattern of the circuit, and a conducting pattern is deposited between terminals 14 on each of the chips and the substrate. In one method, the substrate, e.g. of glass or ceramic, is first provided with a first pattern of conductors, e.g. by evaporation, a dielectric layer 6 is then applied with appropriately spaced windows, a second pattern of conductors 10 is deposited so as to complete the conductor pattern of the circuit, the chips are bonded in the holes, and finally a conductor pattern 13 interconnecting terminals 14 on the chips to terminals 5 on the substrate is deposited, e.g. by evaporation and photographic techniques. Alternatively, the chips are first bonded in the holes and the conductor pattern is then deposited as above with the interconnection pattern 13 deposited simultaneously with the second conductor pattern. A dielectric layer (15), Fig. 8 (not shown), having windows for the chip terminals, may be deposited over the chips before the conductor pattern of the circuit is formed in the latter method. The completed circuit may then be encapsulated.
GB3006569A 1969-06-13 1969-06-13 Manufacture of integrated circuits Expired GB1221914A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB3006569A GB1221914A (en) 1969-06-13 1969-06-13 Manufacture of integrated circuits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB3006569A GB1221914A (en) 1969-06-13 1969-06-13 Manufacture of integrated circuits

Publications (1)

Publication Number Publication Date
GB1221914A true GB1221914A (en) 1971-02-10

Family

ID=10301695

Family Applications (1)

Application Number Title Priority Date Filing Date
GB3006569A Expired GB1221914A (en) 1969-06-13 1969-06-13 Manufacture of integrated circuits

Country Status (1)

Country Link
GB (1) GB1221914A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2117570A (en) * 1982-04-01 1983-10-12 Standard Telephones Cables Ltd Circuit boards
GB2130794A (en) * 1982-11-27 1984-06-06 Prutec Ltd Electrical circuit assembly
GB2147148A (en) * 1983-09-27 1985-05-01 John Patrick Burke Electronic circuit assembly
GB2153144A (en) * 1984-01-13 1985-08-14 Standard Telephones Cables Ltd Circuit packaging
GB2183546A (en) * 1985-11-29 1987-06-10 Pitney Bowes Plc Electronic postage meter
GB2199182A (en) * 1986-12-18 1988-06-29 Marconi Electronic Devices Multilayer circuit arrangement
GB2204184A (en) * 1987-04-29 1988-11-02 Stanley Bracey Mounting electronic components on substrates
GB2212669A (en) * 1987-11-20 1989-07-26 Junkosha Co Ltd A printed circuit substrate
US4904887A (en) * 1982-06-30 1990-02-27 Fujitsu Limited Semiconductor integrated circuit apparatus

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2117570A (en) * 1982-04-01 1983-10-12 Standard Telephones Cables Ltd Circuit boards
US4904887A (en) * 1982-06-30 1990-02-27 Fujitsu Limited Semiconductor integrated circuit apparatus
GB2130794A (en) * 1982-11-27 1984-06-06 Prutec Ltd Electrical circuit assembly
GB2147148A (en) * 1983-09-27 1985-05-01 John Patrick Burke Electronic circuit assembly
GB2153144A (en) * 1984-01-13 1985-08-14 Standard Telephones Cables Ltd Circuit packaging
GB2183546A (en) * 1985-11-29 1987-06-10 Pitney Bowes Plc Electronic postage meter
GB2199182A (en) * 1986-12-18 1988-06-29 Marconi Electronic Devices Multilayer circuit arrangement
GB2204184A (en) * 1987-04-29 1988-11-02 Stanley Bracey Mounting electronic components on substrates
GB2212669A (en) * 1987-11-20 1989-07-26 Junkosha Co Ltd A printed circuit substrate

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