GB2204184A

GB2204184A - Mounting electronic components on substrates

Info

Publication number: GB2204184A
Application number: GB08710213A
Authority: GB
Inventors: Stanley Bracey
Original assignee: Individual
Current assignee: Individual
Priority date: 1987-04-29
Filing date: 1987-04-29
Publication date: 1988-11-02
Also published as: GB8710213D0

Abstract

Electronic components are mounted in apertures in a substrate and connected to an electrically conductive circuit pattern on the substrate.

Description

SUBSTRATES FOR THIN ELECTRONIC ASSEMBLIES This invention relates to a form of electronic assembly that is capable of producing thin, densely packed and easily repairable assemblies.

An electronic assembly normally consists of a base mechanism or substrate of an insulating material on the surface of which is formed electrically conductive patterns to give the desired electrical connections between a variety of electronic components when these are added or assembled to it. These components are normally placed on the surface of the substrate and electrically connected either by wires (leads) or suitably provided terminations on them to specific points within the interconnection pattern on the substrate, the mechanical and electrical integrity being maintained by the application of solder or by welding.

There is a requirement that not only must the packing density (the number of components assembled in a certain substrate area) be increased, but that the thickness of the assembly must also be reduced.

The most relevant examples of prior art are now described: 1) Surface Mount Technology: here the components attach to pads on the surface of the substrate and are normally soldered. Semiconductors are pre-packaged in leaded or leadless containment. In either case this component is then much larger than the contained semiconductor die. This method gave improved packing density over earlier methods of semiconductor die packaging, but the thickness is still governed by the substrate thickness plus the maximum height of the added components.

2) Tape Bonded Semiconductor Die (TAB) : here the semiconductor die is attached to a pattern of electrically conductive fingers (or beams) contained within/on a continuous tape. When assembled the die and the finger pattern are stamped from the tape and the outer ends of the fingers attached to an appropriate substrate surface. Provision of these outer finger end connection points uses an area on the substrate larger than the die and again the thickness is the summation of substrate and component thickness. This method is applicable only to higher volume requirements if it is to be cost effective and is often impossible to repair.

3) Flip Chip Semiconductors: these offer the ultimate in surface packing density. The electrical attachment pads on the die surface are processed to include solder bumps projecting from them. The die is placed face down on the surface of the substrate and then solder reflowed. The principle problems are that contamination is easily trapped under the die and the solder connection is not able to be inspected, both serious failings. Thickness is again the summation of component and substrate thickness.

This invention provides a novel method of electronic assembly that combines the advantages of the previously mentioned methods whilst achieving the minimum feasible thickness and retaining full repairability. In the normal method of application of the invention a substrate will be manufactured containing a multiplicity of holes. Into the holes will be placed the desired components which will be connected by solder to the required electrical interconnection pattern contained on or in the substrate. The attachment point of the interconnect pattern is a suitable pad provided either on the side wall of the hole or on a beam projecting over the hole. Exceptionally a component may be connected to a pad on either surface of the substrate.

The major object of the invention is to produce an assembly as thin as possible which retains the repairability associated with solder attachment. The second object of the invention is to maximise the packing density by suitable component construction.

So that the details of the invention may be more clearly understood a detailed description of substrate manufacture and assembly of components is now given with reference to the accompanying drawings in which: Fig. 1 A plan view of a substrate indicating various aspects and component attachment.

Fig. 2 Crossection of a substrate having two level interconnection patterns showing component attachment methods.

Fig. 3 Crossection of a substrate with three level interconnection patterns showing how the components may be connected to intermediate levels in a multilevel requirement.

Fig. 4 A typical single component tool.

Fig. 5 A reflow jig tool.

Fig. 6 A 3D diagram of an assembly.

Fig. 7 A heatsink method of the assembly which may also be the case.

The main invention is the substrate, various construction examples of which are shown in the accompanying drawings.

In the majority of applications a single layer or a double sided substrate will be required (Figs. 1 and 2).

In its simplest form a single layer substrate with beam connections (7, 11, 18, 27, 31 Fig. 1) would be produced.

The substrate base material would be fabricated by machining or otherwise so that holes are produced at the desired component locations and of a size sufficient to enable the placement of the desired components within them.

To t-he fabricated base is now added and suitably bonded an electrically conductive layer. In the first embodiment of the invention, this layer will completely cover the component holes. The desired interconnection pattern and beams can now be formed by removing the unwanted parts of the added conductive layer by any suitable means.

Assembly of the components may now take place.

Each component will have a set number of terminations to which may be made electrical connections. For each of these terminations to which an electrical connection is required there will have been provided a beam projecting over the component hole in the substrate. The component is positioned in the hole so that the component terminations and the beams are in correct alignment. Electrical connection is now achieved between the beam and termination by suitable means.

For repairability the ideal way of achieving this connection is by soldering, but this method is not exclusive.

As an extention to the first embodiment, or alternative second embodiment of the invention the component may be attached electrically to pads included in the interconnect pattern and placed at suitable points on the surface of the substrate (14 Fig. 1) relative to the hole into which the component (15 Fig. 1) is placed.

Components for which this method is, though not exclusively so, most suitable will have leads or wires as their electrical termination. The components will be placed in the hole so that its terminations are accurately aligned with the pads on the surface of the substrate and electrical connnection produced by suitable means.

The third embodiment of the invention is to provide the electrical attachment point (2 Fig. 1) on a side wall of the component hole (1 Fig. 1). This is both an extention and alternative to either or both of the previous embodiments.

The component will again require placement in the component hole with its temination aligned with the substrate connection points, after which electrical connection is achieved by suitable means.

In achieving the third embodiment of the invention several of the manufacturing methods available require the substrate to have an electrically conductive layer on both surfaces of the substrate, this being equivalent to a substrate requiring two or more layers of interconnect.

The substrate base in this case has the component holes over which beams are required fabricated in the desired positions. Both sides of the substrate now have attached by a suitable method a layer of electrically conductive material. This includes completely covering the component holes already formed. Holes are now fabricated in the substrate sandwich where there is a sidewall termination or an interconnection required between the two layers of conductive material. A suitable electrically conductive media is introduced into these holes. The desired interconnection pattern and beams are now formed by removal of the unwanted conductive material. The component holes for the remaining sidewall connection and desired surface connected components are now fabricated.

The methods of substrate manufacture desired are not exclusive so that any additive or substractive process and order of fabrication that produces a substrate with the necessary characteristics may be used.

Implementation of the invention by two preferred, but not exclusive, methods of fabricating the invention are now described and include many of the possible variations that it may be wished to incorporate when producing the substrate by Printed Circuit Board techniques.

In the first preferred method a suitable material, such as a single or double sided laminate, as used for Printed Circuit Board manufacture, would be selected. Where this is for a double sided application the required electrical via holes would be drilled.

Also, in either case, holes which may be drilled or otherwise formed would be produced everywhere a termination pad is desired on the side wall of a component hole (3, 5 Fig.

1; 1 Fig. 2). (Note that the main component hole is not formed at this stage.) Minimal plating for mechanical strength during the following fabrication stages is now carried out if beams (18 Fig 1; 3 Fig. 2) are also required over the component holes, otherwise full plating is performed.

The component holes (1, 6 Fig. 1; 4 Fig. 2) are now formed by a suitable method such as routing. If beams are required thin foil pieces of a dimension larger than the component holes are now placed approximately centrally aligned with the component holes on the appropriate surface of the substrate and microwelded. The foil will be of a similar material to the metallisation surfaces of the laminate.

Full plating will now be carried out.

In all cases the desired interconnect pattern(s) will now be produced on the substrate surface, together with any surface connection pads (14 Fig. 1; 6 Fig. 2).

Photolithographic methods are considered necessary for registration to be of the required accuracy. Tin lead etch resist may be used.

Etching will be compatible with normal PCB production except where beams are an included feature. The etching within the component hole area will depend on the application method of the original photosensitive material (applied prior to exposure) and the application of the tin lead etch resist.

It is preferable that the metallic plated foil cover over the component hole is not coated with tin lead on the side adjacent to the hole and therefore the etch takes place to pattern on the surface away from the hole. The beams will then etch to approximately half the post plating thickness. Solder resist is now applied as desired.

In the second desired method, identical materials to those applicable in the first method may be used. Care will, however, be necessary in the order of processing, when in addition to beams pver component holes, pads on the side wall of the component holes are also required, these not being possible in the same hole as that containing beams.

Starting with the base. material (5 Fig. 2) of the substrate, the component holes requiring beams (for example 1 Fig.

2, but not 2 Fig. 2) are fabricated in the desired locations.

Metallic foil, for example copper, is now laminated to one or both sides as desired.

If a double sided application is needed, then the required vias and position of side wall pads in component holes to be later formed will be drilled and plated in the normal way and minute gas escape holes added where a component hole is present if temperatures of following process stages render this desirable. The remaining component holes (if any) with side wall or surface attachment pads will now be fabricated.

The desired interconnect pattern is now processed with photolithographic and etching methods as detailed earlier.

Finally the desired solder resist is added.

Where a multilayer application is being fabricated, connection should be to the connection pads or beams via a connection to either of the surface level interconnect patterns (1 Fig. 3) or direct to the termination pad (2 Fig. 3).

Having produced the necessary substrate in the basic form outlined above it may now be assembled.

The assembly method(s) will depend on the components being used.

To gain all the advantages of the invention the preferred components to use are:1) When beam attachment to the substrate is planned face (8 Fig. 1) or end terminated (4 Fig. 1; Fig.

2) chip resistors, capacitors and inductors may be used. Only end terminated versions are recommended when the connection is to a pad on the side wall of the component hole. For general applications surface printed resistors would be preferred, though the characteristics of the resistive material compatible with the substrate material should be checked as meeting the necessary specification.

2) For semiconductors it is preferred beam connections direct to the die should be used with a die of the Flip Chip form (28 Fig. 1; 7 Fig. 2). In this application, however, it is not necessary to form a hemispherical bump. After the final aluminium metallisation the semiconductor die pad should be plated first with a metal such as chromium then copper, and then finished with a gold flash or a tin lead layer to form a pillar about 10 microns above the final glass layer of the die. This pillar may be flat or curved on its upper surface and preferably not less than 0. imam square and spaced a minimum of 0.1mum from an adjacent pillar.

However, where pre-packaged semiconductors (15, 20, 24 Fig. 1; 8, 9 Fig.2) are to be used, provided they have terminations or leads that may be soldered to the necessarily provided side wall pads, beams or surface pads, they will be equally acceptable provided the desired packing density is achieved and providing thermal expansion mismatch is taken into account between the chosen component style and the substrate.

3) Other components should be selected in line with the preferred types outlined in 1) and 2).

The preferred production method of applying the solder is by first printing solder cream. This may be achieved by printing onto extent ion or specially provided pads on either surface of the substrate adjacent to a component hole side wall pad, or on to the top surface of a beam where a component is attached to the lower surface of that beam.

Obviously surface pads are printed in the conventional manner. In all cases at reflow of the solder cream, wetting of the whole area not coated with solder resist should occur and therefore attachment to the component terminatiQn achieved.

Describing Fig. 1 therefore in detail (1) is a hole or aperture for a chip component with (2) a solder print receiving pad on the surface which is connected to the interconnect pattern on the upper surface and to a side wall pad in the hole, (3) is a similar pad but connected to the interconnect pattern on the reverse of the substrate.

(4) is an end terminated chip in a component hole similar to (1), and (5) is the actual solder link between the side wall pad and the end termination after soldering is completed. (6) is a component hole with beam connections and solder print pads combined (7). (8) is a face terminated chip in a hole similar to (6) and (9) is the solder link after soldering. (10) is a component hole similar to (6) in which the beams (11) are on the lower surface of the substrate. (12) is a chip after attachment to the beams in a hole similar to (10). (13) is a component hole with surface attachment pads (14) for a leaded component to be attached, (15) is such a component in a hole similar to (13) and (16) is the solder link after solder has been ref lowed. (17) is a component hole with beam attachment points (18) for a leaded device similar to (15), (20) being such a device in a hole similar to (17), (19) being the solder link between lead and the underside of the beam.

(21) is a component hole with side wall termination pads (22) and solder print pad extentions (23), (24) is a leadless chip carrier and (25) the solder link after soldering is completed. (26) is a. component hole for a semiconductor -die with solder pads or microweldable pads. (27) are the beams for attachment to the die. (28) is a die in a hole similar to (26) and (29) is the solder link when microwelding is not used. (30) is a component hole for a die when the attachment pads are spread over the surface. Beams (31) are similar to (27) earlier but extended in some cases.

(32) is an overlay supporting membrane for the extended beams, (33) is a die in a hole similar to (30) and (34) is the solder link when microwelding is not used. Although components are primarily shown attached to an interconnect on the upper surface of the substrate, it may be equally attached to the lower surface interconnect layer or an intermediary level.

Fig. 2 shows in crossection various component styles connected to either surface of a substrate and which are equally applicable, with suitable orientation, were the substrate single or double sided. (2) is an end terminated component attached by solder links (1) to the side wall terminations in the substrate (5). (4) is a component hole for a semiconductor die (7) attached by solder links (3) to beams. A similar crossection would be seen if microwelding were used. (8) is a leaded component attached to surface pads by solder links (6). (li) is an end terminated chip component attached to beams by solder links (12). (9) is a leaded component similar to (8) attached to beams by solder links (10). (13) is a face terminated chip attached by solder (14) to beams.

In most of the examples microwelding is an alternative to solder linking the component and substrate terminations.

Fig. 3 demonstrates in crossection some of the methods available for connection to an intermediary interconnection layer within the substrate. These are detailed at (1) a connection direct to a side wall termination, (2) connection to a beam on the surface with a via and (3) connection to a surface pad with a via.

Assembly, whether by mass attachment of the components or individually, will require special aids.

In low level production, initial prototype assemblies and repair situation, a single component assembly aid is desirable (Fig. 4).

In such applications soldering may be by the addition of solder cream as above or by any microsoldering technique that is suitable. However, the application of cream is the preferred method. Here the tool would consist of a single vacuum chuck (4 Fig. 4-) above which would be the substrate holding chuck (1 Fig. 4) and, depending on the method chosen to apply heat, may be a third level that is effectively the. heated soldering iron (6 Fig. 4) thus either heater element (3 or 5 Fig. 4J would be required. Above these levels would be a visual magnification system (7 Fig. 4) or means of generating signals for a pattern recognition system so that particularly semiconductor die or other components may be accurately positioned with the substrate beams (pads).

In the case of volume production the chosen method will require an assembly jig (Fig. 5) consisting of two parts, when the beams of a beamed substrate only exist at one surface of the substrate, or three parts when they exist at both surfaces.

The outer part(s) of the jig will be plates (4 Fig. 5) containing vacuum chucks (6, 7, 8 Fig. 5) connected to a vacuum by a pipe (9 Fig. 5) onto which are placed in accurately determined positions the various components.

The substrate will be held in the central (or 2nd part of a 2 part jig) part (1 Fig. 5) of the jig accurately positioned. When the jig is closed pins (5 Fig. 5) are positioned accurately with holes (3 Fig. 5), heat is applied through the window in the upper part (2 Fig. 5) and solder reflow takes place. With a three part jig only the central and one of the outer parts are used at the same time and care into organising the order of attachment (soldering) must be exercised.

A general overview of a typical assembly is shown in Fig.

6. (1) and (2) are leadless packages connected to sidewall terminations. (3) is a chip with end terminations connected to a side wall termination. (4) is a leaded component attached to surface pads. (5) is a face terminated chip attached to beams and (6) is a semiconductor die soldered or microwelded to beams. (7) is the view of a similar die attached to beams the lower surfaces.

In some applications of the invention thermal dissipation or heat sinking may be required. A typical heat sink plate is shown (Fig. 7) that relates to the assembly shown (Fig.

6). If only for heat sink purposes, the base part (1 Fig.

7) with required pillars (3 Fig. 7) or recesses (4 Fig.

7) shaped to accommodate the components and facilitate the necessary thermal contact would be required. If, however, it was also to form part of the case then an additional structure (2 Fig. 7) may be added. A similar part may also be provided for the upper section of the case.

Claims

1) An electrical assembly comprising of a substrate consisting of a base material and an electrically conductive interconnection pattern to which electronic components are electrically attached, the components being placed in apertures formed in the said substrate.

2) A substrate as outlined in Claim 1 that is fabricated for the assembly of electronic components thereto, containing apertures for the main composite part of the component to be placed therein and having provision for at least one such component; it also to have at least one layer of a conductive material fabricated to a pre-determined pattern contained in or on the base material and have provision for the electrical connection of said component(s) to suitable provided connection points on, in or between said provided conductive layer(s) as desired.

3) A substrate as claimed in Claim 2 where the component connection point is a termination pad fabricated on the side wall of the component aperture.

4) A substrate as claimed in Claim 2 where the component connection point is a termination pad fabricated as a beam extending over the component aperture.

5) A substrate as claimed in Claim 2 where the component connection point is a termination pad fabricated as a pad at either surface of the substrate positioned as desired adjacent or near said component aperture.

6) A substrate as claimed in any of the preceding claims that is a combination of those claims in part or full.

7) A substrate as claimed in any of the preceding claims that also contains provision for other non aperture methods of component assembly.

8) A substrate as claimed in any of the preceding claims which has added in part or full the components for which provision has been made.

9) A substrate as claimed in Claim 8 in which at least one of the components is electrically connected by a soldering technique.

10) A substrate as claimed in Claim 8 in which at least one of the components is electrically connected by a welding technique.

11) A substrate as claimed in Claim 8 in which at least one of the components is electrically attached by the addition of an electrically conductive media.

12) An assembly tool for aiding the assembly of single components to the substrate as claimed in the preceding claims of basic form described in the accompanying text and drawings.

-13) An assembly jig for aiding the assembly of components to the substrate as claimed in Claims 1 to 11 inclusive of basic form detailed in the accompanying text and drawings.

14) A heatsink contain#ing provision for thermal connection to the components when assembled to a substrate as claimed in Claims 1 to 11 inclusive of a basic form detailed in the accompanying text and drawings.

15) A combined heatsink as claimed in Claim 14 and case for the assembled substrate of basic form as detailed in the accompanying text and drawings.

16) A substrate as claimed in any of the preceding claims and hereinbefore substantially described with reference to the accompanying drawings and text.