GB2004127A - A device for interconnecting microcircuits - Google Patents

A device for interconnecting microcircuits

Info

Publication number
GB2004127A
GB2004127A GB7836298A GB7836298A GB2004127A GB 2004127 A GB2004127 A GB 2004127A GB 7836298 A GB7836298 A GB 7836298A GB 7836298 A GB7836298 A GB 7836298A GB 2004127 A GB2004127 A GB 2004127A
Authority
GB
United Kingdom
Prior art keywords
microcircuits
conductors
interconnecting
film
apertures
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB7836298A
Other versions
GB2004127B (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Thomson CSF SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson CSF SA filed Critical Thomson CSF SA
Publication of GB2004127A publication Critical patent/GB2004127A/en
Application granted granted Critical
Publication of GB2004127B publication Critical patent/GB2004127B/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/043—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
    • H01L23/047—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body the other leads being parallel to the base
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49572—Lead-frames or other flat leads consisting of thin flexible metallic tape with or without a film carrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5384—Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5387—Flexible insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19043—Component type being a resistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Wire Bonding (AREA)
  • Led Device Packages (AREA)

Abstract

A device for interconnecting microcircuits, such as integrated circuits, resistors, LEDs and photo-diodes, comprises a network of conductors 107, on a dielectric film 101, having apertures 105, 106 for receiving the microcircuits 110, 111,to which ends of conductors 107 are welded. External connections are made to portions of conductors 107 bridging apertures 103, 104 in film 101. Further conductors may be formed on the remote side of film 101, via holes being provided. <IMAGE>
GB7836298A 1977-09-12 1978-09-11 Device for interconnecting microcircuits Expired GB2004127B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7727469A FR2402995A1 (en) 1977-09-12 1977-09-12 MICRO-CIRCUIT INTERCONNECTION DEVICE

Publications (2)

Publication Number Publication Date
GB2004127A true GB2004127A (en) 1979-03-21
GB2004127B GB2004127B (en) 1982-07-14

Family

ID=9195259

Family Applications (1)

Application Number Title Priority Date Filing Date
GB7836298A Expired GB2004127B (en) 1977-09-12 1978-09-11 Device for interconnecting microcircuits

Country Status (4)

Country Link
JP (1) JPS5450871A (en)
DE (1) DE2839215A1 (en)
FR (1) FR2402995A1 (en)
GB (1) GB2004127B (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2593639A1 (en) * 1985-10-25 1987-07-31 Sharp Kk PROCESS FOR REPLACING SEMICONDUCTOR DEVICES IN A MULTI-CHIP MODULE
WO1987006766A1 (en) * 1986-05-01 1987-11-05 Honeywell Inc. Multiple integrated circuit interconnection arrangement
WO1988002210A1 (en) * 1986-09-15 1988-03-24 Baysage Pty. Ltd. Electrical isolation device
GB2204184A (en) * 1987-04-29 1988-11-02 Stanley Bracey Mounting electronic components on substrates
EP0370438A1 (en) * 1988-11-21 1990-05-30 Hewlett-Packard Company Method for preparing a flexible electrical connector
US4933810A (en) * 1987-04-30 1990-06-12 Honeywell Inc. Integrated circuit interconnector
EP0375908A2 (en) * 1988-12-29 1990-07-04 International Business Machines Corporation Method and structure for implementing dynamic chip burn-in
WO1991000618A1 (en) * 1989-07-03 1991-01-10 General Electric Company Electronic systems disposed in a high force environment
EP0409290A2 (en) * 1984-02-21 1991-01-23 Environmental Research Institute of Michigan Wafer scale package system and header and method of manufacture thereof
US5164888A (en) * 1988-12-29 1992-11-17 International Business Machines Method and structure for implementing dynamic chip burn-in

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3061383D1 (en) * 1979-02-19 1983-01-27 Fujitsu Ltd Semiconductor device and method for manufacturing the same
JP3985016B2 (en) * 1997-10-31 2007-10-03 沖電気工業株式会社 Semiconductor device

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0409290A2 (en) * 1984-02-21 1991-01-23 Environmental Research Institute of Michigan Wafer scale package system and header and method of manufacture thereof
EP0409290A3 (en) * 1984-02-21 1991-12-18 Mosaic Systems, Inc. Wafer scale package system and header and method of manufacture thereof
FR2593639A1 (en) * 1985-10-25 1987-07-31 Sharp Kk PROCESS FOR REPLACING SEMICONDUCTOR DEVICES IN A MULTI-CHIP MODULE
WO1987006766A1 (en) * 1986-05-01 1987-11-05 Honeywell Inc. Multiple integrated circuit interconnection arrangement
US5126920A (en) * 1986-05-01 1992-06-30 Honeywell Inc. Multiple integrated circuit interconnection arrangement
WO1988002210A1 (en) * 1986-09-15 1988-03-24 Baysage Pty. Ltd. Electrical isolation device
GB2204184A (en) * 1987-04-29 1988-11-02 Stanley Bracey Mounting electronic components on substrates
US4933810A (en) * 1987-04-30 1990-06-12 Honeywell Inc. Integrated circuit interconnector
US4989317A (en) * 1988-11-21 1991-02-05 Hewlett-Packard Company Method for making tab circuit electrical connector supporting multiple components thereon
EP0370438A1 (en) * 1988-11-21 1990-05-30 Hewlett-Packard Company Method for preparing a flexible electrical connector
EP0375908A3 (en) * 1988-12-29 1991-04-03 International Business Machines Corporation Method and structure for implementing dynamic chip burn-in
EP0375908A2 (en) * 1988-12-29 1990-07-04 International Business Machines Corporation Method and structure for implementing dynamic chip burn-in
US5164888A (en) * 1988-12-29 1992-11-17 International Business Machines Method and structure for implementing dynamic chip burn-in
WO1991000618A1 (en) * 1989-07-03 1991-01-10 General Electric Company Electronic systems disposed in a high force environment

Also Published As

Publication number Publication date
JPS5450871A (en) 1979-04-21
FR2402995B1 (en) 1980-12-26
FR2402995A1 (en) 1979-04-06
GB2004127B (en) 1982-07-14
DE2839215A1 (en) 1979-03-22

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee