DE3678023D1 - Integrierte schaltungsanordnung mit gestapelten leiterschichten zum verbinden von schaltungselementen. - Google Patents
Integrierte schaltungsanordnung mit gestapelten leiterschichten zum verbinden von schaltungselementen.Info
- Publication number
- DE3678023D1 DE3678023D1 DE8686400782T DE3678023T DE3678023D1 DE 3678023 D1 DE3678023 D1 DE 3678023D1 DE 8686400782 T DE8686400782 T DE 8686400782T DE 3678023 T DE3678023 T DE 3678023T DE 3678023 D1 DE3678023 D1 DE 3678023D1
- Authority
- DE
- Germany
- Prior art keywords
- circuit elements
- stacked
- integrated circuit
- signals
- conductor layers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004020 conductor Substances 0.000 title 1
- 238000009413 insulation Methods 0.000 abstract 2
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/184—Components including terminals inserted in holes through the printed circuit board and connected to printed contacts on the walls of the holes or at the edges thereof or protruding over or into the holes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
- H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/645—Inductive arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/0243—Printed circuits associated with mounted high frequency components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48235—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a via metallisation of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/4901—Structure
- H01L2224/4903—Connectors having different sizes, e.g. different diameters
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/4905—Shape
- H01L2224/49051—Connectors having different shapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01014—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01023—Vanadium [V]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01031—Gallium [Ga]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01042—Molybdenum [Mo]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01057—Lanthanum [La]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01061—Promethium [Pm]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01072—Hafnium [Hf]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/1026—Compound semiconductors
- H01L2924/1032—III-V
- H01L2924/10329—Gallium arsenide [GaAs]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19043—Component type being a resistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
- H01L2924/30111—Impedance matching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10227—Other objects, e.g. metallic pieces
- H05K2201/10265—Metallic coils or springs, e.g. as part of a connection element
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10227—Other objects, e.g. metallic pieces
- H05K2201/10409—Screws
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10689—Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/325—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4046—Through-connections; Vertical interconnect access [VIA] connections using auxiliary conductive elements, e.g. metallic spheres, eyelets, pieces of wire
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Waveguide Connection Structure (AREA)
- Waveguides (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60077549A JPS61239649A (ja) | 1985-04-13 | 1985-04-13 | 高速集積回路パツケ−ジ |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3678023D1 true DE3678023D1 (de) | 1991-04-18 |
Family
ID=13637092
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8686400782T Expired - Fee Related DE3678023D1 (de) | 1985-04-13 | 1986-04-11 | Integrierte schaltungsanordnung mit gestapelten leiterschichten zum verbinden von schaltungselementen. |
Country Status (9)
Country | Link |
---|---|
US (1) | US4827327A (de) |
EP (1) | EP0199635B1 (de) |
JP (1) | JPS61239649A (de) |
KR (1) | KR900007299B1 (de) |
AT (1) | ATE61696T1 (de) |
CA (1) | CA1249379A (de) |
DE (1) | DE3678023D1 (de) |
HK (1) | HK46992A (de) |
SG (1) | SG45692G (de) |
Families Citing this family (58)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA1246755A (en) * | 1985-03-30 | 1988-12-13 | Akira Miyauchi | Semiconductor device |
US4945399A (en) * | 1986-09-30 | 1990-07-31 | International Business Machines Corporation | Electronic package with integrated distributed decoupling capacitors |
GB2197540B (en) * | 1986-11-12 | 1991-04-17 | Murata Manufacturing Co | A circuit structure. |
US4922324A (en) * | 1987-01-20 | 1990-05-01 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit device |
JPH0682945B2 (ja) * | 1987-02-25 | 1994-10-19 | 三菱電機株式会社 | 半導体装置 |
JP2507476B2 (ja) * | 1987-09-28 | 1996-06-12 | 株式会社東芝 | 半導体集積回路装置 |
JPH0756887B2 (ja) * | 1988-04-04 | 1995-06-14 | 株式会社日立製作所 | 半導体パッケージ及びそれを用いたコンピュータ |
US5170245A (en) * | 1988-06-15 | 1992-12-08 | International Business Machines Corp. | Semiconductor device having metallic interconnects formed by grit blasting |
US5014114A (en) * | 1988-09-30 | 1991-05-07 | Harris Corporation | High speed, high density semiconductor memory package with chip level repairability |
US5122475A (en) * | 1988-09-30 | 1992-06-16 | Harris Corporation | Method of making a high speed, high density semiconductor memory package with chip level repairability |
US5099306A (en) * | 1988-11-21 | 1992-03-24 | Honeywell Inc. | Stacked tab leadframe assembly |
US5089878A (en) * | 1989-06-09 | 1992-02-18 | Lee Jaesup N | Low impedance packaging |
EP0502958A4 (en) * | 1989-11-28 | 1992-09-30 | Leocor, Inc. | Low profile catheter |
US5157477A (en) * | 1990-01-10 | 1992-10-20 | International Business Machines Corporation | Matched impedance vertical conductors in multilevel dielectric laminated wiring |
US5184210A (en) * | 1990-03-20 | 1993-02-02 | Digital Equipment Corporation | Structure for controlling impedance and cross-talk in a printed circuit substrate |
DE59105080D1 (de) * | 1990-05-28 | 1995-05-11 | Siemens Ag | IC-Gehäuse, bestehend aus drei beschichteten dielektrischen Platten. |
US5132613A (en) * | 1990-11-30 | 1992-07-21 | International Business Machines Corporation | Low inductance side mount decoupling test structure |
JP3009788B2 (ja) * | 1991-11-15 | 2000-02-14 | 日本特殊陶業株式会社 | 集積回路用パッケージ |
EP0544329A3 (en) * | 1991-11-28 | 1993-09-01 | Kabushiki Kaisha Toshiba | Semiconductor package |
JPH06291520A (ja) * | 1992-04-03 | 1994-10-18 | Matsushita Electric Ind Co Ltd | 高周波多層集積回路 |
JPH06291521A (ja) * | 1992-04-21 | 1994-10-18 | Matsushita Electric Ind Co Ltd | 高周波多層集積回路 |
US5422615A (en) * | 1992-09-14 | 1995-06-06 | Hitachi, Ltd. | High frequency circuit device |
GB9219661D0 (en) * | 1992-09-17 | 1992-10-28 | Oxley Dev Company Limited | Ceramic microwave packages |
JPH08504541A (ja) * | 1992-12-15 | 1996-05-14 | イー・アイ・デユポン・ドウ・ヌムール・アンド・カンパニー | 電気的相互接続構造 |
US5338970A (en) * | 1993-03-24 | 1994-08-16 | Intergraph Corporation | Multi-layered integrated circuit package with improved high frequency performance |
TW271496B (de) * | 1994-06-09 | 1996-03-01 | Samsung Electronics Co Ltd | |
US6486528B1 (en) | 1994-06-23 | 2002-11-26 | Vertical Circuits, Inc. | Silicon segment programming apparatus and three terminal fuse configuration |
US6124633A (en) * | 1994-06-23 | 2000-09-26 | Cubic Memory | Vertical interconnect process for silicon segments with thermally conductive epoxy preform |
US5675180A (en) * | 1994-06-23 | 1997-10-07 | Cubic Memory, Inc. | Vertical interconnect process for silicon segments |
US5657206A (en) * | 1994-06-23 | 1997-08-12 | Cubic Memory, Inc. | Conductive epoxy flip-chip package and method |
US6255726B1 (en) | 1994-06-23 | 2001-07-03 | Cubic Memory, Inc. | Vertical interconnect process for silicon segments with dielectric isolation |
US6080596A (en) * | 1994-06-23 | 2000-06-27 | Cubic Memory Inc. | Method for forming vertical interconnect process for silicon segments with dielectric isolation |
US5891761A (en) * | 1994-06-23 | 1999-04-06 | Cubic Memory, Inc. | Method for forming vertical interconnect process for silicon segments with thermally conductive epoxy preform |
US5698895A (en) * | 1994-06-23 | 1997-12-16 | Cubic Memory, Inc. | Silicon segment programming method and apparatus |
JPH08288462A (ja) * | 1995-04-14 | 1996-11-01 | Mitsubishi Electric Corp | 半導体集積回路装置 |
US5623160A (en) * | 1995-09-14 | 1997-04-22 | Liberkowski; Janusz B. | Signal-routing or interconnect substrate, structure and apparatus |
US9054094B2 (en) | 1997-04-08 | 2015-06-09 | X2Y Attenuators, Llc | Energy conditioning circuit arrangement for integrated circuit |
US7336468B2 (en) | 1997-04-08 | 2008-02-26 | X2Y Attenuators, Llc | Arrangement for energy conditioning |
US7321485B2 (en) | 1997-04-08 | 2008-01-22 | X2Y Attenuators, Llc | Arrangement for energy conditioning |
US6191475B1 (en) * | 1997-11-26 | 2001-02-20 | Intel Corporation | Substrate for reducing electromagnetic interference and enclosure |
US6057600A (en) * | 1997-11-27 | 2000-05-02 | Kyocera Corporation | Structure for mounting a high-frequency package |
US6483406B1 (en) * | 1998-07-31 | 2002-11-19 | Kyocera Corporation | High-frequency module using slot coupling |
JP3339473B2 (ja) * | 1999-08-26 | 2002-10-28 | 日本電気株式会社 | パッケージ基板、該パッケージ基板を備える半導体装置及びそれらの製造方法 |
JP3500335B2 (ja) * | 1999-09-17 | 2004-02-23 | 株式会社東芝 | 高周波回路装置 |
US6414396B1 (en) | 2000-01-24 | 2002-07-02 | Amkor Technology, Inc. | Package for stacked integrated circuits |
JP3455498B2 (ja) * | 2000-05-31 | 2003-10-14 | 株式会社東芝 | プリント基板および情報処理装置 |
US7215018B2 (en) | 2004-04-13 | 2007-05-08 | Vertical Circuits, Inc. | Stacked die BGA or LGA component assembly |
US7705432B2 (en) * | 2004-04-13 | 2010-04-27 | Vertical Circuits, Inc. | Three dimensional six surface conformal die coating |
WO2006104613A2 (en) | 2005-03-01 | 2006-10-05 | X2Y Attenuators, Llc | Conditioner with coplanar conductors |
DE102005062344B4 (de) * | 2005-12-23 | 2010-08-19 | Infineon Technologies Ag | Halbleiterbauteil für Hochfrequenzanwendungen und Verfahren zur Herstellung eines derartigen Halbleiterbauteils |
US7768098B2 (en) * | 2006-06-23 | 2010-08-03 | Triquint Semiconductor, Inc. | Integrated low inductance interconnect for RF integrated circuits |
KR100802358B1 (ko) * | 2006-08-22 | 2008-02-13 | 주식회사 이엠따블유안테나 | 전송선로 |
JP5031696B2 (ja) * | 2008-08-22 | 2012-09-19 | シャープ株式会社 | 半導体装置 |
US9911715B2 (en) * | 2013-12-20 | 2018-03-06 | Cyntec Co., Ltd. | Three-dimensional package structure and the method to fabricate thereof |
US9929087B2 (en) | 2015-11-16 | 2018-03-27 | Taiwan Semiconductor Manufacturing Co., Ltd | Enhancing integrated circuit density with active atomic reservoir |
US9818694B2 (en) * | 2015-11-16 | 2017-11-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Active atomic reservoir for enhancing electromigration reliability in integrated circuits |
US10950540B2 (en) | 2015-11-16 | 2021-03-16 | Taiwan Semiconductor Manufacturing Co., Ltd. | Enhancing integrated circuit density with active atomic reservoir |
KR101806198B1 (ko) * | 2016-12-30 | 2017-12-08 | 연세대학교 산학협력단 | 무선 주파수 코일 및 이를 포함하는 의료용 영상 장치 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4416858Y1 (de) * | 1967-04-03 | 1969-07-21 | ||
FR1598284A (de) * | 1968-12-04 | 1970-07-06 | ||
JPS5329469B2 (de) * | 1973-07-16 | 1978-08-21 | ||
US4221047A (en) * | 1979-03-23 | 1980-09-09 | International Business Machines Corporation | Multilayered glass-ceramic substrate for mounting of semiconductor device |
US4320438A (en) * | 1980-05-15 | 1982-03-16 | Cts Corporation | Multi-layer ceramic package |
US4302625A (en) * | 1980-06-30 | 1981-11-24 | International Business Machines Corp. | Multi-layer ceramic substrate |
US4608592A (en) * | 1982-07-09 | 1986-08-26 | Nec Corporation | Semiconductor device provided with a package for a semiconductor element having a plurality of electrodes to be applied with substantially same voltage |
US4498122A (en) * | 1982-12-29 | 1985-02-05 | At&T Bell Laboratories | High-speed, high pin-out LSI chip package |
US4541035A (en) * | 1984-07-30 | 1985-09-10 | General Electric Company | Low loss, multilevel silicon circuit board |
-
1985
- 1985-04-13 JP JP60077549A patent/JPS61239649A/ja active Granted
-
1986
- 1986-04-03 CA CA000505739A patent/CA1249379A/en not_active Expired
- 1986-04-09 KR KR1019860002694A patent/KR900007299B1/ko not_active IP Right Cessation
- 1986-04-11 AT AT86400782T patent/ATE61696T1/de not_active IP Right Cessation
- 1986-04-11 DE DE8686400782T patent/DE3678023D1/de not_active Expired - Fee Related
- 1986-04-11 EP EP86400782A patent/EP0199635B1/de not_active Expired - Lifetime
-
1988
- 1988-07-05 US US07/214,838 patent/US4827327A/en not_active Expired - Fee Related
-
1992
- 1992-04-24 SG SG456/92A patent/SG45692G/en unknown
- 1992-06-25 HK HK469/92A patent/HK46992A/xx unknown
Also Published As
Publication number | Publication date |
---|---|
CA1249379A (en) | 1989-01-24 |
JPH0325082B2 (de) | 1991-04-05 |
KR860008600A (ko) | 1986-11-17 |
EP0199635B1 (de) | 1991-03-13 |
KR900007299B1 (ko) | 1990-10-08 |
HK46992A (en) | 1992-07-03 |
US4827327A (en) | 1989-05-02 |
JPS61239649A (ja) | 1986-10-24 |
EP0199635A3 (en) | 1987-11-19 |
SG45692G (en) | 1992-06-12 |
ATE61696T1 (de) | 1991-03-15 |
EP0199635A2 (de) | 1986-10-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
ATE61696T1 (de) | Integrierte schaltungsanordnung mit gestapelten leiterschichten zum verbinden von schaltungselementen. | |
TW341722B (en) | Surface-mounted semiconductor package and its manufacturing method | |
KR880003419A (ko) | 반도체 장치 | |
EP0377932A3 (de) | Baugruppe von integrierten Halbleiterschaltungen | |
KR850005158A (ko) | 반도체 집적회로 장치 | |
KR920702024A (ko) | 다수의 칩을 갖는 반도체 장치 | |
EP0890989A4 (de) | Halbleitervorrichtung und herstellungsverfahren | |
IE830584L (en) | Dense mounting of semiconductor chip packages | |
JPS6428930A (en) | Semiconductor device | |
KR920007199A (ko) | 반도체기억장치 | |
ES8503196A1 (es) | Un metodo de fabricar un modulo de circuito integrado. | |
MY123034A (en) | Semiconductor device and method of fabricating the same | |
KR860005438A (ko) | 반도체칩과 기판과의 접합구조가 개선된 반도체장치 | |
DE3482719D1 (de) | Halbleiterelement und herstellungsverfahren. | |
EP0149317A3 (de) | Das Umhüllen gedruckter Leiterzüge | |
KR920010872A (ko) | 멀티칩 모듈 | |
EP0221496A3 (de) | Integrierte Schaltungspackung | |
JPS57107059A (en) | Semiconductor package | |
JPS6471165A (en) | Resin capsule sealed multi-chip modular circuit | |
KR940008023A (ko) | 집적 회로 디바이스의 전기적 잡음을 감소시키기 위한 구조물 및 이의 감소 방법 | |
JPS5671926A (en) | Chip carrier | |
ATE51455T1 (de) | Datenverarbeitungssystem in einer karte und verfahren zu dessen herstellung. | |
JPS62183155A (ja) | 半導体集積回路装置 | |
GB1365824A (en) | Multi layer circuit | |
JPH0358464A (ja) | 半導体装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |