ATE61696T1 - Integrierte schaltungsanordnung mit gestapelten leiterschichten zum verbinden von schaltungselementen. - Google Patents

Integrierte schaltungsanordnung mit gestapelten leiterschichten zum verbinden von schaltungselementen.

Info

Publication number
ATE61696T1
ATE61696T1 AT86400782T AT86400782T ATE61696T1 AT E61696 T1 ATE61696 T1 AT E61696T1 AT 86400782 T AT86400782 T AT 86400782T AT 86400782 T AT86400782 T AT 86400782T AT E61696 T1 ATE61696 T1 AT E61696T1
Authority
AT
Austria
Prior art keywords
circuit elements
stacked
integrated circuit
signals
conductor layers
Prior art date
Application number
AT86400782T
Other languages
English (en)
Inventor
Akira Miyauchi
Hiroshi Nishimoto
Tadashi Okiyama
Hiroo Kitasagami
Shirahatadai
Masahiro Sugimoto
Haruo Tamada
Shinji Emori
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of ATE61696T1 publication Critical patent/ATE61696T1/de

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC]
    • H05K1/184—Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC] associated with components inserted in holes through the PCBs and wherein terminals of the components are connected to printed contacts on the walls of the holes or at the edges thereof or protruding over or into the holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/0243—Printed circuits associated with mounted high frequency components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W44/00—Electrical arrangements for controlling or matching impedance
    • H10W44/501—Inductive arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/10—Containers or parts thereof
    • H10W76/12—Containers or parts thereof characterised by their shape
    • H10W76/15—Containers comprising an insulating or insulated base
    • H10W76/157—Containers comprising an insulating or insulated base having interconnections parallel to the insulating or insulated base
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10265—Metallic coils or springs, e.g. as part of a connection element
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10409—Screws
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10689—Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/325—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by abutting or pinching; Mechanical auxiliary parts therefor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4046—Through-connections; Vertical interconnect access [VIA] connections using auxiliary conductive elements, e.g. metallic spheres, eyelets, pieces of wire
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07552—Controlling the environment, e.g. atmosphere composition or temperature changes in structures or sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07553—Controlling the environment, e.g. atmosphere composition or temperature changes in shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/521—Structures or relative sizes of bond wires
    • H10W72/527—Multiple bond wires having different sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/537—Multiple bond wires having different shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Waveguide Connection Structure (AREA)
  • Waveguides (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
AT86400782T 1985-04-13 1986-04-11 Integrierte schaltungsanordnung mit gestapelten leiterschichten zum verbinden von schaltungselementen. ATE61696T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP60077549A JPS61239649A (ja) 1985-04-13 1985-04-13 高速集積回路パツケ−ジ
EP86400782A EP0199635B1 (de) 1985-04-13 1986-04-11 Integrierte Schaltungsanordnung mit gestapelten Leiterschichten zum Verbinden von Schaltungselementen

Publications (1)

Publication Number Publication Date
ATE61696T1 true ATE61696T1 (de) 1991-03-15

Family

ID=13637092

Family Applications (1)

Application Number Title Priority Date Filing Date
AT86400782T ATE61696T1 (de) 1985-04-13 1986-04-11 Integrierte schaltungsanordnung mit gestapelten leiterschichten zum verbinden von schaltungselementen.

Country Status (9)

Country Link
US (1) US4827327A (de)
EP (1) EP0199635B1 (de)
JP (1) JPS61239649A (de)
KR (1) KR900007299B1 (de)
AT (1) ATE61696T1 (de)
CA (1) CA1249379A (de)
DE (1) DE3678023D1 (de)
HK (1) HK46992A (de)
SG (1) SG45692G (de)

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JP2507476B2 (ja) * 1987-09-28 1996-06-12 株式会社東芝 半導体集積回路装置
JPH0756887B2 (ja) * 1988-04-04 1995-06-14 株式会社日立製作所 半導体パッケージ及びそれを用いたコンピュータ
US5170245A (en) * 1988-06-15 1992-12-08 International Business Machines Corp. Semiconductor device having metallic interconnects formed by grit blasting
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US5122475A (en) * 1988-09-30 1992-06-16 Harris Corporation Method of making a high speed, high density semiconductor memory package with chip level repairability
US5099306A (en) * 1988-11-21 1992-03-24 Honeywell Inc. Stacked tab leadframe assembly
US5089878A (en) * 1989-06-09 1992-02-18 Lee Jaesup N Low impedance packaging
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US5157477A (en) * 1990-01-10 1992-10-20 International Business Machines Corporation Matched impedance vertical conductors in multilevel dielectric laminated wiring
US5184210A (en) * 1990-03-20 1993-02-02 Digital Equipment Corporation Structure for controlling impedance and cross-talk in a printed circuit substrate
DE59105080D1 (de) * 1990-05-28 1995-05-11 Siemens Ag IC-Gehäuse, bestehend aus drei beschichteten dielektrischen Platten.
US5132613A (en) * 1990-11-30 1992-07-21 International Business Machines Corporation Low inductance side mount decoupling test structure
JP3009788B2 (ja) * 1991-11-15 2000-02-14 日本特殊陶業株式会社 集積回路用パッケージ
DE69232912T2 (de) * 1991-11-28 2003-12-24 Kabushiki Kaisha Toshiba, Kawasaki Halbleitergehäuse
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US5422615A (en) * 1992-09-14 1995-06-06 Hitachi, Ltd. High frequency circuit device
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US6255726B1 (en) 1994-06-23 2001-07-03 Cubic Memory, Inc. Vertical interconnect process for silicon segments with dielectric isolation
US6124633A (en) * 1994-06-23 2000-09-26 Cubic Memory Vertical interconnect process for silicon segments with thermally conductive epoxy preform
US5891761A (en) * 1994-06-23 1999-04-06 Cubic Memory, Inc. Method for forming vertical interconnect process for silicon segments with thermally conductive epoxy preform
US5657206A (en) * 1994-06-23 1997-08-12 Cubic Memory, Inc. Conductive epoxy flip-chip package and method
US6486528B1 (en) 1994-06-23 2002-11-26 Vertical Circuits, Inc. Silicon segment programming apparatus and three terminal fuse configuration
US5698895A (en) * 1994-06-23 1997-12-16 Cubic Memory, Inc. Silicon segment programming method and apparatus
US6080596A (en) * 1994-06-23 2000-06-27 Cubic Memory Inc. Method for forming vertical interconnect process for silicon segments with dielectric isolation
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US5623160A (en) * 1995-09-14 1997-04-22 Liberkowski; Janusz B. Signal-routing or interconnect substrate, structure and apparatus
US9054094B2 (en) 1997-04-08 2015-06-09 X2Y Attenuators, Llc Energy conditioning circuit arrangement for integrated circuit
US7321485B2 (en) 1997-04-08 2008-01-22 X2Y Attenuators, Llc Arrangement for energy conditioning
US7336468B2 (en) 1997-04-08 2008-02-26 X2Y Attenuators, Llc Arrangement for energy conditioning
US6191475B1 (en) * 1997-11-26 2001-02-20 Intel Corporation Substrate for reducing electromagnetic interference and enclosure
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US6483406B1 (en) * 1998-07-31 2002-11-19 Kyocera Corporation High-frequency module using slot coupling
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JP3500335B2 (ja) * 1999-09-17 2004-02-23 株式会社東芝 高周波回路装置
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JP3455498B2 (ja) * 2000-05-31 2003-10-14 株式会社東芝 プリント基板および情報処理装置
US7215018B2 (en) 2004-04-13 2007-05-08 Vertical Circuits, Inc. Stacked die BGA or LGA component assembly
US7705432B2 (en) * 2004-04-13 2010-04-27 Vertical Circuits, Inc. Three dimensional six surface conformal die coating
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DE102005062344B4 (de) * 2005-12-23 2010-08-19 Infineon Technologies Ag Halbleiterbauteil für Hochfrequenzanwendungen und Verfahren zur Herstellung eines derartigen Halbleiterbauteils
US7768098B2 (en) * 2006-06-23 2010-08-03 Triquint Semiconductor, Inc. Integrated low inductance interconnect for RF integrated circuits
KR100802358B1 (ko) * 2006-08-22 2008-02-13 주식회사 이엠따블유안테나 전송선로
JP5031696B2 (ja) * 2008-08-22 2012-09-19 シャープ株式会社 半導体装置
US9859250B2 (en) * 2013-12-20 2018-01-02 Cyntec Co., Ltd. Substrate and the method to fabricate thereof
US9929087B2 (en) 2015-11-16 2018-03-27 Taiwan Semiconductor Manufacturing Co., Ltd Enhancing integrated circuit density with active atomic reservoir
US9818694B2 (en) * 2015-11-16 2017-11-14 Taiwan Semiconductor Manufacturing Company, Ltd. Active atomic reservoir for enhancing electromigration reliability in integrated circuits
US10950540B2 (en) 2015-11-16 2021-03-16 Taiwan Semiconductor Manufacturing Co., Ltd. Enhancing integrated circuit density with active atomic reservoir
KR101806198B1 (ko) * 2016-12-30 2017-12-08 연세대학교 산학협력단 무선 주파수 코일 및 이를 포함하는 의료용 영상 장치
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US4541035A (en) * 1984-07-30 1985-09-10 General Electric Company Low loss, multilevel silicon circuit board

Also Published As

Publication number Publication date
EP0199635B1 (de) 1991-03-13
SG45692G (en) 1992-06-12
DE3678023D1 (de) 1991-04-18
JPH0325082B2 (de) 1991-04-05
CA1249379A (en) 1989-01-24
EP0199635A2 (de) 1986-10-29
EP0199635A3 (en) 1987-11-19
KR900007299B1 (ko) 1990-10-08
HK46992A (en) 1992-07-03
JPS61239649A (ja) 1986-10-24
US4827327A (en) 1989-05-02
KR860008600A (ko) 1986-11-17

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Legal Events

Date Code Title Description
UEP Publication of translation of european patent specification
REN Ceased due to non-payment of the annual fee