JPS5850417B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS5850417B2
JPS5850417B2 JP54097656A JP9765679A JPS5850417B2 JP S5850417 B2 JPS5850417 B2 JP S5850417B2 JP 54097656 A JP54097656 A JP 54097656A JP 9765679 A JP9765679 A JP 9765679A JP S5850417 B2 JPS5850417 B2 JP S5850417B2
Authority
JP
Japan
Prior art keywords
polyimide resin
photoresist film
layer
manufacturing
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54097656A
Other languages
English (en)
Other versions
JPS5621335A (en
Inventor
一雄 時友
敏彦 小野
敏男 倉橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP54097656A priority Critical patent/JPS5850417B2/ja
Priority to DE8080302569T priority patent/DE3071804D1/de
Priority to EP80302569A priority patent/EP0026967B1/en
Priority to US06/172,822 priority patent/US4328262A/en
Priority to IE1579/80A priority patent/IE52316B1/en
Publication of JPS5621335A publication Critical patent/JPS5621335A/ja
Publication of JPS5850417B2 publication Critical patent/JPS5850417B2/ja
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0272—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers for lift-off processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/312—Organic layers, e.g. photoresist
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293—Organic, e.g. plastic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293—Organic, e.g. plastic
    • H01L23/296—Organo-silicon compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3192—Multilayer coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H01L23/556—Protection against radiation, e.g. light or electromagnetic waves against alpha rays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Description

【発明の詳細な説明】 本発明は半導体装置の製造方法、特に半導体素子の被覆
保護法に関する。
近年、耐熱性があるためにポリイミド系樹脂が注目され
、半導体製造にも色々と利用されているが、最近線ポリ
イミド系樹脂は被覆保護膜としても使用される様になっ
ている。
これは半導体製造中又は製造後に生ずる表面傷などから
保護することが目的であるが、そのほかにメモリ素子の
ソフト・エラーを防止する効果もあることが知られてい
る。
ソフト・エラーとは封止容器材料中にＰＰＭ単位で含有
される放射性物質からα線が放出され、それによりメモ
リ・データが破壊されるもので、甚だ厄介な故障である
。
ところが、この様なポリイミド系樹脂は密着性が良くな
く、シリコン酸化膜などに対しては密着性が特に悪いの
で、充分に遮蔽効果をなさない欠点がある。
そのために現在は先づ膜厚を１μｍ前後となる様に薄く
ポリイミド系樹脂を被覆し熱処理して硬化させて良く密
着させた後に、例えば２０μｍ程度の膜厚となる様に再
度ポリイミド系樹脂を被覆して熱処理硬化させているが
、それでも密着性は充分に改良されない。
本発明はこの様な欠点を除去して、密着性を良くする製
造方法を提案するもので、本発明の特徴は半導体素子表
面に予めポジティブ型フォトレジスト膜を被覆して熱処
理し、該フォトレジスト膜上面にポリイミド系樹脂を被
覆して熱処理することにある。
以ド、本発明を図面を参照して工程順に説明する。
第１図ないし第６図は本発明の一実施例の工程順図で、
第１図は半導体基板１上にアルミニウム配線層２がパタ
ーンニング形成され、その上面にＣＶＤ法によって燐け
い酸ガラス（ＰＳＧ）層３を被着せしめた工程図を示し
ている。
次に第２図に示す様にポジティブ型フォトレジスト膜４
をスピナーで塗布し、１００〜１２０８Ｃの温度で熱処
理して硬化させる。
膜厚はＰＳＧ層の表面状態で異なるが７０００λ〜３μ
ｍが適当である。
次に第３図に示す様に該フォトレジスト膜４を露光処理
してパターンニングし、電極接続部５のＰＳＧ層を露出
せしめる。
次いでフォトレジスト膜４をマスクとして露出したＰＳ
Ｇ層をエツチング除去した後、窒素ガスなどの中性雰囲
気中で、４５０’Ｃの高温度熱処理を１０分間行なう。
そうするとポジティブ型フォトレジスト膜４は熱的に安
定となる。
次に第４図に示す様にポリイミド系樹脂６をスピナーで
塗布し、約２００℃の温度で熱処理して硬化させる。
膜厚は１０〜２０μｍとする。次に第５図に示す様に電
極接続部５のポリイミド系樹脂６を除去するために、ネ
ガティブ型フォトレジスト膜７を塗布してパターンニン
グし、ポリイミド系樹脂のエツチング剤でエツチングし
て窓あけする。
次に第６図に示す様にネガティブ型フォトレジスト膜７
を有機溶剤で除去した後、再ｖ４５０℃の高温度で熱処
理して、ポリイミド系樹脂６の高温度での安定化をはか
る。
又、ハあ実施例として、例えばアルミニウム配線層上に
ＰＳＧ層がなく、アルミニウム配線層が露出している場
合でも、ポジティブ型フォトレジスト膜を中間層として
介在せしめ、その上面に上記例と同様にポリイミド系樹
脂を被覆させて熱処理を行ない、保護層とすることが出
来る。
上記実施例ではポリイミド系樹脂を４５０℃の温度で熱
処理を行なっているが、これは以降の工程でワイヤ・ボ
ンデングを行なうためになされたもので、４５０℃の温
度に限定するものではない。
以上の様にポリイミド系樹脂を保護層とする際には、下
層にポジティブ型フォトレジスト膜を形成し、高温度熱
処理にて熱的安定にせしめると、密着性の良好なポジテ
ィブ型フォトレジスト膜は半導体素子表面のシリコン酸
化膜やＰＳＧ層又はアルミニウムなどの金属層とポリイ
ミド系樹脂との密着性を改善するのに役立つ。
又、半導体製造工程において、封止容器に半導体チップ
を取り付けてワイヤ・ボンデングした後、全半導体チッ
プ表面にポリイミド系樹脂を被着させる場合もあり、又
多層配線層間にポリイミド系樹脂を絶縁層として用いる
場合もあるが、倒れもポジティブ型フォトレジスト膜を
中間層として形成せしめることにより密着性を大巾に良
くすることができる。
従って本発明によればポリイミド系樹脂を所望の表面に
充分に密着させ、表面傷は勿論のこと、ソフト・エラー
からも半導体装置を保護することができるので、半導体
装置の信頼性を向上させる効果があるものである。
【図面の簡単な説明】
第１図ないし第６図は本発明の製造工程順図である。 図中、１は半導体基板、２はアルミニウム配線層、４は
ポジ型フォトレジスト膜、６はポリイミド系樹脂を示す
。

Claims (1)

    【特許請求の範囲】
  1. １ 半導体素子表面にポジティブ型フォトレジスト膜を
    被覆して熱処理し、該フォトレジスト膜上面にポリイミ
    ド系樹脂を被覆して熱処理する工程を含むことを特徴と
    する半導体装置の製造方法。
JP54097656A 1979-07-31 1979-07-31 半導体装置の製造方法 Expired JPS5850417B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP54097656A JPS5850417B2 (ja) 1979-07-31 1979-07-31 半導体装置の製造方法
DE8080302569T DE3071804D1 (en) 1979-07-31 1980-07-28 A method of manufacturing a semiconductor device using a thermosetting resin film
EP80302569A EP0026967B1 (en) 1979-07-31 1980-07-28 A method of manufacturing a semiconductor device using a thermosetting resin film
US06/172,822 US4328262A (en) 1979-07-31 1980-07-28 Method of manufacturing semiconductor devices having photoresist film as a permanent layer
IE1579/80A IE52316B1 (en) 1979-07-31 1980-07-29 A method of manufacturing a semiconductor device using a thermosetting resin film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54097656A JPS5850417B2 (ja) 1979-07-31 1979-07-31 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS5621335A JPS5621335A (en) 1981-02-27
JPS5850417B2 true JPS5850417B2 (ja) 1983-11-10

Family

ID=14198112

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54097656A Expired JPS5850417B2 (ja) 1979-07-31 1979-07-31 半導体装置の製造方法

Country Status (5)

Country Link
US (1) US4328262A (ja)
EP (1) EP0026967B1 (ja)
JP (1) JPS5850417B2 (ja)
DE (1) DE3071804D1 (ja)
IE (1) IE52316B1 (ja)

Families Citing this family (47)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4339526A (en) * 1981-06-24 1982-07-13 International Business Machines Corporation Acetylene terminated, branched polyphenylene resist and protective coating for integrated circuit devices
DE3125284A1 (de) * 1981-06-26 1983-01-13 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von bauelementen aus halbleiterscheiben
CA1204527A (en) * 1982-08-13 1986-05-13 Theodore F. Retajczyk, Jr. Polymeric films for electronic circuits
EP0145727A4 (en) * 1983-04-22 1985-09-18 M & T Chemicals Inc POLYAMIDE-ACIDS AND IMPROVED POLYIMIDES.
US4495220A (en) * 1983-10-07 1985-01-22 Trw Inc. Polyimide inter-metal dielectric process
US4796075A (en) * 1983-12-21 1989-01-03 Advanced Micro Devices, Inc. Fusible link structure for integrated circuits
US4592132A (en) * 1984-12-07 1986-06-03 Hughes Aircraft Company Process for fabricating multi-level-metal integrated circuits at high yields
US4693780A (en) * 1985-02-22 1987-09-15 Siemens Aktiengesellschaft Electrical isolation and leveling of patterned surfaces
US4631806A (en) * 1985-05-22 1986-12-30 Gte Laboratories Incorporated Method of producing integrated circuit structures
JPH0652732B2 (ja) * 1985-08-14 1994-07-06 三菱電機株式会社 パツシベ−シヨン膜の形成方法
GB8523373D0 (en) * 1985-09-21 1985-10-23 Stc Plc Via profiling in integrated circuits
US4908689A (en) * 1986-05-06 1990-03-13 International Business Machines Corporation Organic solder barrier
US4830706A (en) * 1986-10-06 1989-05-16 International Business Machines Corporation Method of making sloped vias
US5171716A (en) * 1986-12-19 1992-12-15 North American Philips Corp. Method of manufacturing semiconductor device with reduced packaging stress
US5045918A (en) * 1986-12-19 1991-09-03 North American Philips Corp. Semiconductor device with reduced packaging stress
US5091289A (en) * 1990-04-30 1992-02-25 International Business Machines Corporation Process for forming multi-level coplanar conductor/insulator films employing photosensitive polyimide polymer compositions
US5229257A (en) * 1990-04-30 1993-07-20 International Business Machines Corporation Process for forming multi-level coplanar conductor/insulator films employing photosensitive polymide polymer compositions
KR940008327B1 (ko) * 1991-10-10 1994-09-12 삼성전자 주식회사 반도체 패키지 및 그 실장방법
JPH05190684A (ja) * 1992-01-16 1993-07-30 Mitsubishi Electric Corp 半導体装置およびその製造方法
US5448095A (en) * 1993-12-20 1995-09-05 Eastman Kodak Company Semiconductors with protective layers
JP3586468B2 (ja) * 1995-01-17 2004-11-10 新日鐵化学株式会社 積層体
DE19540309A1 (de) * 1995-10-28 1997-04-30 Philips Patentverwaltung Halbleiterbauelement mit Passivierungsaufbau
JP2003502449A (ja) * 1999-06-10 2003-01-21 ハネウエル・インターナシヨナル・インコーポレーテツド フォトリソグラフィ用スピンオンガラス反射防止コーティング
JP2001284499A (ja) * 2000-03-09 2001-10-12 Lucent Technol Inc 半導体デバイスとその製造方法
AU5095601A (en) * 2000-03-24 2001-10-08 Cymbet Corp Thin-film battery having ultra-thin electrolyte and associated method
US6368400B1 (en) * 2000-07-17 2002-04-09 Honeywell International Absorbing compounds for spin-on-glass anti-reflective coatings for photolithography
US7059048B2 (en) * 2002-06-07 2006-06-13 Intel Corporation Wafer-level underfill process making use of sacrificial contact pad protective material
US20040102022A1 (en) * 2002-11-22 2004-05-27 Tongbi Jiang Methods of fabricating integrated circuitry
US20040131760A1 (en) * 2003-01-02 2004-07-08 Stuart Shakespeare Apparatus and method for depositing material onto multiple independently moving substrates in a chamber
US7294209B2 (en) * 2003-01-02 2007-11-13 Cymbet Corporation Apparatus and method for depositing material onto a substrate using a roll-to-roll mask
US6906436B2 (en) * 2003-01-02 2005-06-14 Cymbet Corporation Solid state activity-activated battery device and method
US7603144B2 (en) * 2003-01-02 2009-10-13 Cymbet Corporation Active wireless tagging system on peel and stick substrate
JP3892826B2 (ja) * 2003-05-26 2007-03-14 株式会社東芝 電力増幅器及びこれを用いた無線通信装置
US7211351B2 (en) * 2003-10-16 2007-05-01 Cymbet Corporation Lithium/air batteries with LiPON as separator and protective barrier and method
US8053159B2 (en) 2003-11-18 2011-11-08 Honeywell International Inc. Antireflective coatings for via fill and photolithography applications and methods of preparation thereof
KR20070024473A (ko) * 2004-01-06 2007-03-02 사임베트 코퍼레이션 층상 배리어구조와 그 형성방법
WO2007011899A2 (en) * 2005-07-15 2007-01-25 Cymbet Corporation Thin-film batteries with polymer and lipon electrolyte layers and method
US7776478B2 (en) * 2005-07-15 2010-08-17 Cymbet Corporation Thin-film batteries with polymer and LiPON electrolyte layers and method
US20070145549A1 (en) * 2005-12-23 2007-06-28 Texas Instruments Incorporated Hermetically sealed integrated circuits and method
US8642246B2 (en) 2007-02-26 2014-02-04 Honeywell International Inc. Compositions, coatings and films for tri-layer patterning applications and methods of preparation thereof
US8557877B2 (en) 2009-06-10 2013-10-15 Honeywell International Inc. Anti-reflective coatings for optically transparent substrates
US8864898B2 (en) 2011-05-31 2014-10-21 Honeywell International Inc. Coating formulations for optical elements
US11527774B2 (en) 2011-06-29 2022-12-13 Space Charge, LLC Electrochemical energy storage devices
US9853325B2 (en) 2011-06-29 2017-12-26 Space Charge, LLC Rugged, gel-free, lithium-free, high energy density solid-state electrochemical energy storage devices
US10601074B2 (en) 2011-06-29 2020-03-24 Space Charge, LLC Rugged, gel-free, lithium-free, high energy density solid-state electrochemical energy storage devices
WO2016167892A1 (en) 2015-04-13 2016-10-20 Honeywell International Inc. Polysiloxane formulations and coatings for optoelectronic applications
WO2019173626A1 (en) 2018-03-07 2019-09-12 Space Charge, LLC Thin-film solid-state energy-storage devices

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL134388C (ja) * 1964-05-15 1900-01-01
GB1230421A (ja) * 1967-09-15 1971-05-05
US3602635A (en) * 1970-06-30 1971-08-31 Ibm Micro-circuit device
JPS4835778A (ja) * 1971-09-09 1973-05-26
JPS49131863U (ja) * 1973-03-10 1974-11-13
DE2401613A1 (de) * 1974-01-14 1975-07-17 Siemens Ag Halbleitervorrichtung
DE2638799C3 (de) * 1976-08-27 1981-12-03 Ibm Deutschland Gmbh, 7000 Stuttgart Verfahren zur Verbesserung der Haftung von metallischen Leiterzügen auf Polyimidschichten in integrierten Schaltungen

Also Published As

Publication number Publication date
EP0026967A3 (en) 1983-04-27
EP0026967A2 (en) 1981-04-15
DE3071804D1 (en) 1986-11-20
EP0026967B1 (en) 1986-10-15
IE801579L (en) 1981-01-31
US4328262A (en) 1982-05-04
IE52316B1 (en) 1987-09-16
JPS5621335A (en) 1981-02-27

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