JPS53108372A - Substrate for wireless bonding - Google Patents
Substrate for wireless bondingInfo
- Publication number
- JPS53108372A JPS53108372A JP2275977A JP2275977A JPS53108372A JP S53108372 A JPS53108372 A JP S53108372A JP 2275977 A JP2275977 A JP 2275977A JP 2275977 A JP2275977 A JP 2275977A JP S53108372 A JPS53108372 A JP S53108372A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- wireless bonding
- bonding
- semiconductor element
- conductive pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Wire Bonding (AREA)
Abstract
PURPOSE: To simplify the checking of electrical connections for the semiconductor element and conductive pattern, by providing a plural number of lead wires with each terminal of the semiconductor element, in the wiring conductive pattern for bonding.
COPYRIGHT: (C)1978,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2275977A JPS53108372A (en) | 1977-03-04 | 1977-03-04 | Substrate for wireless bonding |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2275977A JPS53108372A (en) | 1977-03-04 | 1977-03-04 | Substrate for wireless bonding |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS53108372A true JPS53108372A (en) | 1978-09-21 |
JPS5733856B2 JPS5733856B2 (en) | 1982-07-20 |
Family
ID=12091600
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2275977A Granted JPS53108372A (en) | 1977-03-04 | 1977-03-04 | Substrate for wireless bonding |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS53108372A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4881029A (en) * | 1985-09-30 | 1989-11-14 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit devices and methods for testing same |
JP2005353757A (en) * | 2004-06-09 | 2005-12-22 | Toshiba Matsushita Display Technology Co Ltd | Semiconductor device and connection resistance measuring method |
-
1977
- 1977-03-04 JP JP2275977A patent/JPS53108372A/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4881029A (en) * | 1985-09-30 | 1989-11-14 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit devices and methods for testing same |
JP2005353757A (en) * | 2004-06-09 | 2005-12-22 | Toshiba Matsushita Display Technology Co Ltd | Semiconductor device and connection resistance measuring method |
Also Published As
Publication number | Publication date |
---|---|
JPS5733856B2 (en) | 1982-07-20 |
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