JPH11251589A5 - - Google Patents
Info
- Publication number
- JPH11251589A5 JPH11251589A5 JP1998053427A JP5342798A JPH11251589A5 JP H11251589 A5 JPH11251589 A5 JP H11251589A5 JP 1998053427 A JP1998053427 A JP 1998053427A JP 5342798 A JP5342798 A JP 5342798A JP H11251589 A5 JPH11251589 A5 JP H11251589A5
- Authority
- JP
- Japan
- Prior art keywords
- conductive layer
- gate electrode
- layer
- portion connected
- aluminum wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Priority Applications (8)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP05342798A JP3705919B2 (ja) | 1998-03-05 | 1998-03-05 | 半導体装置及びその製造方法 |
| US09/122,094 US6661054B1 (en) | 1998-03-05 | 1998-07-24 | Semiconductor device and method of fabricating the same |
| DE19845315A DE19845315B4 (de) | 1998-03-05 | 1998-10-01 | Halbleitervorrichtung und Herstellungsverfahren der Halbleitervorrichtung |
| DE19860962A DE19860962B4 (de) | 1998-03-05 | 1998-10-01 | Halbleitervorrichtung und Herstellungsverfahren der Halbleitervorrichtung |
| KR1019980047622A KR100317160B1 (ko) | 1998-03-05 | 1998-11-07 | 반도체장치및그제조방법 |
| KR1020010039229A KR100318571B1 (ko) | 1998-03-05 | 2001-07-02 | 반도체 장치 및 그 제조 방법 |
| US10/650,703 US7052954B2 (en) | 1998-03-05 | 2003-08-29 | Method of fabricating a MOS structure with two conductive layers on the gate electrode |
| US11/267,514 US7910987B2 (en) | 1998-03-05 | 2005-11-07 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP05342798A JP3705919B2 (ja) | 1998-03-05 | 1998-03-05 | 半導体装置及びその製造方法 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2005195999A Division JP4986420B2 (ja) | 2005-07-05 | 2005-07-05 | トランジスタ |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPH11251589A JPH11251589A (ja) | 1999-09-17 |
| JPH11251589A5 true JPH11251589A5 (enExample) | 2005-07-07 |
| JP3705919B2 JP3705919B2 (ja) | 2005-10-12 |
Family
ID=12942551
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP05342798A Expired - Lifetime JP3705919B2 (ja) | 1998-03-05 | 1998-03-05 | 半導体装置及びその製造方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (3) | US6661054B1 (enExample) |
| JP (1) | JP3705919B2 (enExample) |
| KR (2) | KR100317160B1 (enExample) |
| DE (1) | DE19845315B4 (enExample) |
Families Citing this family (46)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3502531B2 (ja) * | 1997-08-28 | 2004-03-02 | 株式会社ルネサステクノロジ | 半導体装置の製造方法 |
| JP5058406B2 (ja) * | 2000-10-31 | 2012-10-24 | ローム株式会社 | 半導体装置の製造方法 |
| JP2002176177A (ja) * | 2000-12-07 | 2002-06-21 | Denso Corp | 半導体装置及びその製造方法 |
| DE10063443B4 (de) | 2000-12-20 | 2005-03-03 | Infineon Technologies Ag | Verfahren zur Herstellung einer Elektrode eines mittels Feldeffekt steuerbaren Halbleiterbauelements und mittels Feldeffekt steuerbares Halbleiterbauelement |
| JP5025071B2 (ja) * | 2001-02-01 | 2012-09-12 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
| JP2002368220A (ja) * | 2001-06-04 | 2002-12-20 | Hitachi Ltd | 半導体装置及びこれを用いた電源システム |
| US6882000B2 (en) * | 2001-08-10 | 2005-04-19 | Siliconix Incorporated | Trench MIS device with reduced gate-to-drain capacitance |
| JP2004022941A (ja) * | 2002-06-19 | 2004-01-22 | Toshiba Corp | 半導体装置 |
| JP4219630B2 (ja) * | 2002-07-17 | 2009-02-04 | 株式会社豊田中央研究所 | トレンチゲート型半導体装置とその製造方法 |
| JP2004055803A (ja) * | 2002-07-19 | 2004-02-19 | Renesas Technology Corp | 半導体装置 |
| US8080459B2 (en) * | 2002-09-24 | 2011-12-20 | Vishay-Siliconix | Self aligned contact in a semiconductor device and method of fabricating the same |
| US8629019B2 (en) | 2002-09-24 | 2014-01-14 | Vishay-Siliconix | Method of forming self aligned contacts for a power MOSFET |
| KR100593445B1 (ko) * | 2004-02-13 | 2006-06-28 | 삼성전자주식회사 | 채널부 홀들 사이에 채널 영역을 갖는 트랜지스터들 및 그제조방법들 |
| US6960519B1 (en) | 2004-06-25 | 2005-11-01 | International Business Machines Corporation | Interconnect structure improvements |
| KR100562657B1 (ko) * | 2004-12-29 | 2006-03-20 | 주식회사 하이닉스반도체 | 리세스게이트 및 그를 구비한 반도체장치의 제조 방법 |
| US9111754B2 (en) * | 2005-07-26 | 2015-08-18 | Vishay-Siliconix | Floating gate structure with high electrostatic discharge performance |
| US8110868B2 (en) | 2005-07-27 | 2012-02-07 | Infineon Technologies Austria Ag | Power semiconductor component with a low on-state resistance |
| JP5087542B2 (ja) * | 2005-07-27 | 2012-12-05 | インフィネオン テクノロジーズ オーストリア アクチエンゲゼルシャフト | ドリフト領域とドリフト制御領域とを有する半導体素子 |
| US8461648B2 (en) | 2005-07-27 | 2013-06-11 | Infineon Technologies Austria Ag | Semiconductor component with a drift region and a drift control region |
| JP2007088010A (ja) * | 2005-09-20 | 2007-04-05 | Denso Corp | 半導体装置およびその製造方法 |
| JP4844077B2 (ja) * | 2005-10-13 | 2011-12-21 | 株式会社デンソー | 半導体装置の製造方法 |
| JP4867333B2 (ja) * | 2005-12-27 | 2012-02-01 | 三菱電機株式会社 | 炭化珪素半導体装置、及び炭化珪素半導体装置の製造方法 |
| US7544545B2 (en) | 2005-12-28 | 2009-06-09 | Vishay-Siliconix | Trench polysilicon diode |
| JP2008042166A (ja) * | 2006-07-12 | 2008-02-21 | Matsushita Electric Ind Co Ltd | 縦型ゲート半導体装置及びその製造方法 |
| US9437729B2 (en) | 2007-01-08 | 2016-09-06 | Vishay-Siliconix | High-density power MOSFET with planarized metalization |
| US9947770B2 (en) | 2007-04-03 | 2018-04-17 | Vishay-Siliconix | Self-aligned trench MOSFET and method of manufacture |
| US9484451B2 (en) | 2007-10-05 | 2016-11-01 | Vishay-Siliconix | MOSFET active area and edge termination area charge balance |
| JP4581011B2 (ja) | 2008-01-25 | 2010-11-17 | 株式会社東芝 | 電気部品とその製造方法 |
| US10600902B2 (en) | 2008-02-13 | 2020-03-24 | Vishay SIliconix, LLC | Self-repairing field effect transisitor |
| JP5599388B2 (ja) * | 2009-04-28 | 2014-10-01 | 三菱電機株式会社 | 電力用半導体装置 |
| JP2010283132A (ja) | 2009-06-04 | 2010-12-16 | Mitsubishi Electric Corp | 半導体装置 |
| US9443974B2 (en) * | 2009-08-27 | 2016-09-13 | Vishay-Siliconix | Super junction trench power MOSFET device fabrication |
| US9230810B2 (en) | 2009-09-03 | 2016-01-05 | Vishay-Siliconix | System and method for substrate wafer back side and edge cross section seals |
| US9431530B2 (en) | 2009-10-20 | 2016-08-30 | Vishay-Siliconix | Super-high density trench MOSFET |
| US9842911B2 (en) | 2012-05-30 | 2017-12-12 | Vishay-Siliconix | Adaptive charge balanced edge termination |
| KR101388706B1 (ko) * | 2012-08-30 | 2014-04-24 | 삼성전기주식회사 | 전력 반도체 소자 및 그 제조방법 |
| JP2014075483A (ja) * | 2012-10-04 | 2014-04-24 | Sanken Electric Co Ltd | 半導体装置及び半導体装置の製造方法 |
| JP6218423B2 (ja) * | 2013-04-25 | 2017-10-25 | 三菱電機株式会社 | 炭化珪素半導体装置およびその製造方法 |
| US9887259B2 (en) | 2014-06-23 | 2018-02-06 | Vishay-Siliconix | Modulated super junction power MOSFET devices |
| CN106575666B (zh) | 2014-08-19 | 2021-08-06 | 维西埃-硅化物公司 | 超结金属氧化物半导体场效应晶体管 |
| WO2016028943A1 (en) | 2014-08-19 | 2016-02-25 | Vishay-Siliconix | Electronic circuit |
| JP6623772B2 (ja) * | 2016-01-13 | 2019-12-25 | 富士電機株式会社 | 炭化珪素半導体装置の製造方法 |
| JP2018152514A (ja) * | 2017-03-14 | 2018-09-27 | 富士電機株式会社 | 半導体装置の製造方法および半導体装置 |
| JP7135302B2 (ja) * | 2017-11-08 | 2022-09-13 | 富士電機株式会社 | 炭化シリコン半導体装置及びその製造方法 |
| US10529662B2 (en) * | 2018-01-29 | 2020-01-07 | International Business Machines Corporation | Method and structure to construct cylindrical interconnects to reduce resistance |
| JP7048659B2 (ja) * | 2020-04-07 | 2022-04-05 | ローム株式会社 | 半導体装置 |
Family Cites Families (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4761385A (en) * | 1987-02-10 | 1988-08-02 | Motorola, Inc. | Forming a trench capacitor |
| EP0283964B1 (en) * | 1987-03-20 | 1994-09-28 | Nec Corporation | Dynamic random access memory device having a plurality of improved one-transistor type memory cells |
| JPS6427252A (en) * | 1987-04-13 | 1989-01-30 | Nec Corp | Semiconductor storage device |
| US4954854A (en) * | 1989-05-22 | 1990-09-04 | International Business Machines Corporation | Cross-point lightly-doped drain-source trench transistor and fabrication process therefor |
| US5055900A (en) * | 1989-10-11 | 1991-10-08 | The Trustees Of Columbia University In The City Of New York | Trench-defined charge-coupled device |
| JP3226669B2 (ja) | 1993-07-27 | 2001-11-05 | 株式会社東芝 | 半導体装置 |
| JP2586000B2 (ja) * | 1993-10-28 | 1997-02-26 | 日本電気株式会社 | 半導体装置の製造方法 |
| US5485031A (en) * | 1993-11-22 | 1996-01-16 | Actel Corporation | Antifuse structure suitable for VLSI application |
| JP3400846B2 (ja) * | 1994-01-20 | 2003-04-28 | 三菱電機株式会社 | トレンチ構造を有する半導体装置およびその製造方法 |
| JP3396553B2 (ja) * | 1994-02-04 | 2003-04-14 | 三菱電機株式会社 | 半導体装置の製造方法及び半導体装置 |
| TW360980B (en) * | 1994-05-04 | 1999-06-11 | Nippon Precision Circuits | Single transistor EEPROM memory device |
| JP3338178B2 (ja) | 1994-05-30 | 2002-10-28 | 株式会社東芝 | 半導体装置およびその製造方法 |
| JPH0823092A (ja) | 1994-07-06 | 1996-01-23 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
| JP3155894B2 (ja) * | 1994-09-29 | 2001-04-16 | 株式会社東芝 | 半導体装置およびその製造方法 |
| JP2792467B2 (ja) * | 1995-06-13 | 1998-09-03 | 日本電気株式会社 | 半導体装置の製造方法 |
| US5689128A (en) * | 1995-08-21 | 1997-11-18 | Siliconix Incorporated | High density trenched DMOS transistor |
| US5895766A (en) * | 1995-09-20 | 1999-04-20 | Micron Technology, Inc. | Method of forming a field effect transistor |
| US5894149A (en) * | 1996-04-11 | 1999-04-13 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device having high breakdown voltage and method of manufacturing the same |
| JPH09331063A (ja) | 1996-04-11 | 1997-12-22 | Mitsubishi Electric Corp | 高耐圧半導体装置およびその製造方法 |
| US5661085A (en) * | 1996-06-17 | 1997-08-26 | Chartered Semiconductor Manufacturing Pte, Ltd. | Method for forming a low contact leakage and low contact resistance integrated circuit device electrode |
| DE19638439C2 (de) * | 1996-09-19 | 2000-06-15 | Siemens Ag | Durch Feldeffekt steuerbares, vertikales Halbleiterbauelement und Herstellungsverfahren |
| US6025269A (en) * | 1996-10-15 | 2000-02-15 | Micron Technology, Inc. | Method for depositioning a substantially void-free aluminum film over a refractory metal nitride layer |
| US5744395A (en) * | 1996-10-16 | 1998-04-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Low resistance, self-aligned, titanium silicide structures, using a single rapid thermal anneal procedure |
| JP3976374B2 (ja) * | 1997-07-11 | 2007-09-19 | 三菱電機株式会社 | トレンチmosゲート構造を有する半導体装置及びその製造方法 |
| US5834353A (en) * | 1997-10-20 | 1998-11-10 | Texas Instruments-Acer Incorporated | Method of making deep sub-micron meter MOSFET with a high permitivity gate dielectric |
-
1998
- 1998-03-05 JP JP05342798A patent/JP3705919B2/ja not_active Expired - Lifetime
- 1998-07-24 US US09/122,094 patent/US6661054B1/en not_active Expired - Lifetime
- 1998-10-01 DE DE19845315A patent/DE19845315B4/de not_active Expired - Lifetime
- 1998-11-07 KR KR1019980047622A patent/KR100317160B1/ko not_active Expired - Lifetime
-
2001
- 2001-07-02 KR KR1020010039229A patent/KR100318571B1/ko not_active Expired - Lifetime
-
2003
- 2003-08-29 US US10/650,703 patent/US7052954B2/en not_active Expired - Lifetime
-
2005
- 2005-11-07 US US11/267,514 patent/US7910987B2/en not_active Expired - Fee Related
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