JPH0367334B2 - - Google Patents

Info

Publication number
JPH0367334B2
JPH0367334B2 JP57145601A JP14560182A JPH0367334B2 JP H0367334 B2 JPH0367334 B2 JP H0367334B2 JP 57145601 A JP57145601 A JP 57145601A JP 14560182 A JP14560182 A JP 14560182A JP H0367334 B2 JPH0367334 B2 JP H0367334B2
Authority
JP
Japan
Prior art keywords
cobalt
layer
disilicide
silicon
temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57145601A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5846633A (ja
Inventor
Josefu Reuinsutein Haiman
Purasado Muraaka Shaiamu
Kumaa Shinha Ashoku
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
AT&T Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AT&T Technologies Inc filed Critical AT&T Technologies Inc
Publication of JPS5846633A publication Critical patent/JPS5846633A/ja
Publication of JPH0367334B2 publication Critical patent/JPH0367334B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D64/0112—
    • H10D64/0132—

Landscapes

  • Engineering & Computer Science (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP57145601A 1981-08-27 1982-08-24 集積回路の製造方法 Granted JPS5846633A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/296,914 US4378628A (en) 1981-08-27 1981-08-27 Cobalt silicide metallization for semiconductor integrated circuits
US296914 1981-08-27

Publications (2)

Publication Number Publication Date
JPS5846633A JPS5846633A (ja) 1983-03-18
JPH0367334B2 true JPH0367334B2 (enExample) 1991-10-22

Family

ID=23144083

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57145601A Granted JPS5846633A (ja) 1981-08-27 1982-08-24 集積回路の製造方法

Country Status (8)

Country Link
US (1) US4378628A (enExample)
JP (1) JPS5846633A (enExample)
CA (1) CA1204045A (enExample)
DE (1) DE3231987C2 (enExample)
FR (1) FR2512274B1 (enExample)
GB (1) GB2104728B (enExample)
IT (1) IT1152039B (enExample)
NL (1) NL191424C (enExample)

Families Citing this family (74)

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US4700215A (en) * 1981-11-19 1987-10-13 Texas Instruments Incorporated Polycide electrodes for integrated circuits
FR2518810A1 (fr) 1981-12-23 1983-06-24 Morin Francois Procede de fabrication de transistors en couches minces en silicium sur substrat isolant
US4495512A (en) * 1982-06-07 1985-01-22 International Business Machines Corporation Self-aligned bipolar transistor with inverted polycide base contact
DE3314879A1 (de) * 1983-04-25 1984-10-25 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von stabilen, niederohmigen kontakten in integrierten halbleiterschaltungen
US4514893A (en) * 1983-04-29 1985-05-07 At&T Bell Laboratories Fabrication of FETs
GB2139418A (en) * 1983-05-05 1984-11-07 Standard Telephones Cables Ltd Semiconductor devices and conductors therefor
US4470189A (en) * 1983-05-23 1984-09-11 International Business Machines Corporation Process for making polycide structures
US4481046A (en) * 1983-09-29 1984-11-06 International Business Machines Corporation Method for making diffusions into a substrate and electrical connections thereto using silicon containing rare earth hexaboride materials
US4490193A (en) * 1983-09-29 1984-12-25 International Business Machines Corporation Method for making diffusions into a substrate and electrical connections thereto using rare earth boride materials
FR2555364B1 (fr) * 1983-11-18 1990-02-02 Hitachi Ltd Procede de fabrication de connexions d'un dispositif a circuits integres a semi-conducteurs comportant en particulier un mitset
JPS60116167A (ja) * 1983-11-29 1985-06-22 Toshiba Corp 半導体記憶装置及びその製造方法
JPS60163455A (ja) * 1984-02-03 1985-08-26 Toshiba Corp 読み出し専用記憶装置及びその製造方法
US4581623A (en) * 1984-05-24 1986-04-08 Motorola, Inc. Interlayer contact for use in a static RAM cell
US4743564A (en) * 1984-12-28 1988-05-10 Kabushiki Kaisha Toshiba Method for manufacturing a complementary MOS type semiconductor device
US4811076A (en) * 1985-05-01 1989-03-07 Texas Instruments Incorporated Device and process with doubled capacitors
US4821085A (en) * 1985-05-01 1989-04-11 Texas Instruments Incorporated VLSI local interconnect structure
US4811078A (en) * 1985-05-01 1989-03-07 Texas Instruments Incorporated Integrated circuit device and process with tin capacitors
CA1235824A (en) * 1985-06-28 1988-04-26 Vu Q. Ho Vlsi mosfet circuits using refractory metal and/or refractory metal silicide
US4660276A (en) * 1985-08-12 1987-04-28 Rca Corporation Method of making a MOS field effect transistor in an integrated circuit
US4825271A (en) * 1986-05-20 1989-04-25 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory
NL8700820A (nl) * 1987-04-08 1988-11-01 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting.
JPH063812B2 (ja) * 1987-07-13 1994-01-12 株式会社東芝 半導体装置の製造方法
US4914500A (en) * 1987-12-04 1990-04-03 At&T Bell Laboratories Method for fabricating semiconductor devices which include sources and drains having metal-containing material regions, and the resulting devices
US4833099A (en) * 1988-01-07 1989-05-23 Intel Corporation Tungsten-silicide reoxidation process including annealing in pure nitrogen and subsequent oxidation in oxygen
US4912061A (en) * 1988-04-04 1990-03-27 Digital Equipment Corporation Method of forming a salicided self-aligned metal oxide semiconductor device using a disposable silicon nitride spacer
US5260235A (en) * 1988-05-26 1993-11-09 Lasa Industries, Inc. Method of making laser generated I. C. pattern for masking
NL8801632A (nl) * 1988-06-27 1990-01-16 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting waarbij tijdens depositie van een metaal een metaalsilicide wordt gevormd.
US4959708A (en) * 1988-08-26 1990-09-25 Delco Electronics Corporation MOS integrated circuit with vertical shield
US4886765A (en) * 1988-10-26 1989-12-12 American Telephone And Telegraph Company, At&T Bell Laboratories Method of making silicides by heating in oxygen to remove contamination
JP2980966B2 (ja) * 1989-11-30 1999-11-22 アメリカン テレフォン アンド テレグラフ カムパニー デバイス及びその製造方法
US5047367A (en) * 1990-06-08 1991-09-10 Intel Corporation Process for formation of a self aligned titanium nitride/cobalt silicide bilayer
US5147820A (en) * 1991-08-26 1992-09-15 At&T Bell Laboratories Silicide formation on polysilicon
US5834368A (en) * 1992-02-13 1998-11-10 Nec Corporation Integrated circuit with a metal silicide film uniformly formed
TW209308B (en) * 1992-03-02 1993-07-11 Digital Equipment Corp Self-aligned cobalt silicide on MOS integrated circuits
US6624477B1 (en) * 1992-10-09 2003-09-23 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
TW232751B (en) * 1992-10-09 1994-10-21 Semiconductor Energy Res Co Ltd Semiconductor device and method for forming the same
EP0603461A3 (en) * 1992-10-30 1996-09-25 Ibm Manufacture of 3-D silicon silicide structures.
US5334545A (en) * 1993-02-01 1994-08-02 Allied Signal Inc. Process for forming self-aligning cobalt silicide T-gates of silicon MOS devices
US6197646B1 (en) 1993-02-12 2001-03-06 Fujitsu Limited Manufacture of semiconductor device with salicide electrode
JP3637069B2 (ja) 1993-03-12 2005-04-06 株式会社半導体エネルギー研究所 半導体装置の作製方法
KR100203982B1 (ko) * 1993-03-12 1999-06-15 야마자끼 순페이 반도체장치 및 그의 제작방법
JP2677168B2 (ja) * 1993-09-17 1997-11-17 日本電気株式会社 半導体装置の製造方法
US5449642A (en) * 1994-04-14 1995-09-12 Duke University Method of forming metal-disilicide layers and contacts
US5536684A (en) * 1994-06-30 1996-07-16 Intel Corporation Process for formation of epitaxial cobalt silicide and shallow junction of silicon
JP3334370B2 (ja) * 1994-10-13 2002-10-15 ヤマハ株式会社 半導体デバイス
JP2738333B2 (ja) * 1995-03-30 1998-04-08 日本電気株式会社 半導体装置の製造方法
EP0750338B1 (en) * 1995-06-19 2003-01-15 Interuniversitair Micro-Elektronica Centrum Vzw Etching process of CoSi2 layers and process for the fabrication of Schottky-barrier detectors using the same
US5780362A (en) * 1996-06-04 1998-07-14 Wang; Qingfeng CoSi2 salicide method
US5949114A (en) 1996-11-07 1999-09-07 Micron Technology, Inc. Semiconductor device having increased breakdown voltage and method of fabricating same
US5997634A (en) 1996-11-14 1999-12-07 Micron Technology, Inc. Method of forming a crystalline phase material
JPH10173046A (ja) * 1996-12-10 1998-06-26 Sony Corp 半導体装置の製造方法
KR100220253B1 (ko) * 1996-12-27 1999-09-15 김영환 Mosfet 제조 방법
US6169025B1 (en) * 1997-03-04 2001-01-02 United Microelectronics Corp. Method of fabricating self-align-contact
EP0865077A1 (en) * 1997-03-14 1998-09-16 Interuniversitair Micro-Elektronica Centrum Vzw Method for the formation of a thin metal silicide layer on a Si substrate, and use thereof in detector applications
US5902129A (en) * 1997-04-07 1999-05-11 Lsi Logic Corporation Process for forming improved cobalt silicide layer on integrated circuit structure using two capping layers
US6096639A (en) * 1998-04-07 2000-08-01 Advanced Micro Devices, Inc. Method of forming a local interconnect by conductive layer patterning
TW386283B (en) * 1998-05-25 2000-04-01 United Microelectronics Corp A method of manufacturing the buried contact of an SRAM cell
US6121098A (en) * 1998-06-30 2000-09-19 Infineon Technologies North America Corporation Semiconductor manufacturing method
US6235630B1 (en) * 1998-08-19 2001-05-22 Micron Technology, Inc. Silicide pattern structures and methods of fabricating the same
EP0991115A1 (en) 1998-09-28 2000-04-05 STMicroelectronics S.r.l. Process for the definition of openings in a dielectric layer
JP3216807B2 (ja) 1998-10-02 2001-10-09 日本電気株式会社 半導体装置の製造方法
US6238986B1 (en) * 1998-11-06 2001-05-29 Advanced Micro Devices, Inc. Formation of junctions by diffusion from a doped film at silicidation
US6194315B1 (en) 1999-04-16 2001-02-27 Micron Technology, Inc. Electrochemical cobalt silicide liner for metal contact fills and damascene processes
US6380040B1 (en) 1999-08-02 2002-04-30 Advanced Micro Devices, Inc. Prevention of dopant out-diffusion during silicidation and junction formation
JP4780818B2 (ja) * 2000-03-03 2011-09-28 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
AU2001262953A1 (en) * 2000-04-28 2001-11-12 Matrix Semiconductor, Inc. Three-dimensional memory array and method of fabrication
JP2002043315A (ja) * 2000-07-26 2002-02-08 Sony Corp 半導体装置およびその製造方法
DE10056866C2 (de) * 2000-11-16 2002-10-24 Advanced Micro Devices Inc Verfahren zur Bildung einer Ätzstoppschicht während der Herstellung eines Halbleiterbauteils
US6346477B1 (en) 2001-01-09 2002-02-12 Research Foundation Of Suny - New York Method of interlayer mediated epitaxy of cobalt silicide from low temperature chemical vapor deposition of cobalt
US6475893B2 (en) 2001-03-30 2002-11-05 International Business Machines Corporation Method for improved fabrication of salicide structures
US6440832B1 (en) * 2001-07-06 2002-08-27 Advanced Micro Devices, Inc. Hybrid MOS and schottky gate technology
WO2003088280A1 (en) * 2002-04-08 2003-10-23 Council Of Scientific And Industrial Research Process for the production of neodymium-iron-boron permanent magnet alloy powder
CN100452288C (zh) * 2005-12-01 2009-01-14 上海华虹Nec电子有限公司 湿法去除硅片背面钴沾污的方法
WO2009031232A1 (ja) * 2007-09-07 2009-03-12 Canon Anelva Corporation スパッタリング方法および装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3617824A (en) * 1965-07-12 1971-11-02 Nippon Electric Co Mos device with a metal-silicide gate
US4109372A (en) * 1977-05-02 1978-08-29 International Business Machines Corporation Method for making an insulated gate field effect transistor utilizing a silicon gate and silicide interconnection vias
US4180596A (en) * 1977-06-30 1979-12-25 International Business Machines Corporation Method for providing a metal silicide layer on a substrate
US4141022A (en) * 1977-09-12 1979-02-20 Signetics Corporation Refractory metal contacts for IGFETS
JPS5487175A (en) * 1977-12-23 1979-07-11 Cho Lsi Gijutsu Kenkyu Kumiai Method of fabricating semiconductor
US4285761A (en) * 1980-06-30 1981-08-25 International Business Machines Corporation Process for selectively forming refractory metal silicide layers on semiconductor devices
US4339869A (en) * 1980-09-15 1982-07-20 General Electric Company Method of making low resistance contacts in semiconductor devices by ion induced silicides

Also Published As

Publication number Publication date
JPS5846633A (ja) 1983-03-18
NL191424B (nl) 1995-02-16
IT8222942A0 (it) 1982-08-23
FR2512274B1 (fr) 1985-06-28
IT1152039B (it) 1986-12-24
IT8222942A1 (it) 1984-02-23
CA1204045A (en) 1986-05-06
NL191424C (nl) 1995-07-17
NL8203350A (nl) 1983-03-16
GB2104728B (en) 1985-08-14
DE3231987C2 (de) 1996-08-01
GB2104728A (en) 1983-03-09
FR2512274A1 (fr) 1983-03-04
US4378628A (en) 1983-04-05
DE3231987A1 (de) 1983-05-05

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