FR2555364B1 - Procede de fabrication de connexions d'un dispositif a circuits integres a semi-conducteurs comportant en particulier un mitset - Google Patents

Procede de fabrication de connexions d'un dispositif a circuits integres a semi-conducteurs comportant en particulier un mitset

Info

Publication number
FR2555364B1
FR2555364B1 FR848414909A FR8414909A FR2555364B1 FR 2555364 B1 FR2555364 B1 FR 2555364B1 FR 848414909 A FR848414909 A FR 848414909A FR 8414909 A FR8414909 A FR 8414909A FR 2555364 B1 FR2555364 B1 FR 2555364B1
Authority
FR
France
Prior art keywords
mitset
integrated semiconductor
circuits including
semiconductor circuits
manufacturing connections
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
FR848414909A
Other languages
English (en)
Other versions
FR2555364A1 (fr
Inventor
Akihiro Tomozawa
Yoku Kaino
Shigeru Shimada
Nozomi Horino
Yoshiaki Yoshiura
Osamu Tsuchiya
Shozo Hosoda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP58216320A external-priority patent/JPS60109251A/ja
Priority claimed from JP58216319A external-priority patent/JPS60109250A/ja
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of FR2555364A1 publication Critical patent/FR2555364A1/fr
Application granted granted Critical
Publication of FR2555364B1 publication Critical patent/FR2555364B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • H01L21/76889—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances by forming silicides of refractory metals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823462—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329—Insulating materials
    • H01L23/53295—Stacked insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
FR848414909A 1983-11-18 1984-09-28 Procede de fabrication de connexions d'un dispositif a circuits integres a semi-conducteurs comportant en particulier un mitset Expired - Lifetime FR2555364B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP58216320A JPS60109251A (ja) 1983-11-18 1983-11-18 半導体集積回路装置
JP58216319A JPS60109250A (ja) 1983-11-18 1983-11-18 半導体集積回路装置

Publications (2)

Publication Number Publication Date
FR2555364A1 FR2555364A1 (fr) 1985-05-24
FR2555364B1 true FR2555364B1 (fr) 1990-02-02

Family

ID=26521363

Family Applications (1)

Application Number Title Priority Date Filing Date
FR848414909A Expired - Lifetime FR2555364B1 (fr) 1983-11-18 1984-09-28 Procede de fabrication de connexions d'un dispositif a circuits integres a semi-conducteurs comportant en particulier un mitset

Country Status (7)

Country Link
US (1) US4782037A (fr)
KR (1) KR930004984B1 (fr)
DE (1) DE3442037A1 (fr)
FR (1) FR2555364B1 (fr)
GB (1) GB2150349B (fr)
HK (1) HK84188A (fr)
SG (1) SG41888G (fr)

Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ZA811427B (en) * 1981-03-04 1982-03-31 Gundle Holdings Ltd Welding of plastics material
JPS63128750A (ja) * 1986-11-19 1988-06-01 Toshiba Corp 半導体装置
US4935380A (en) * 1987-08-04 1990-06-19 Mitsubishi Denki Kabushiki Kaisha Method for manufacturing semiconductor device
JPH01138734A (ja) * 1987-11-25 1989-05-31 Mitsubishi Electric Corp 複導電体層を有する半導体装置およびその製造方法
US5252504A (en) * 1988-05-02 1993-10-12 Micron Technology, Inc. Reverse polysilicon CMOS fabrication
JPH0793354B2 (ja) * 1988-11-28 1995-10-09 株式会社東芝 半導体装置の製造方法
GB8907898D0 (en) 1989-04-07 1989-05-24 Inmos Ltd Semiconductor devices and fabrication thereof
JPH02291150A (ja) * 1989-04-28 1990-11-30 Hitachi Ltd 半導体装置
US4935376A (en) * 1989-10-12 1990-06-19 At&T Bell Laboratories Making silicide gate level runners
US5026657A (en) * 1990-03-12 1991-06-25 Micron Technology, Inc. Split-polysilicon CMOS DRAM process incorporating self-aligned silicidation of the cell plate, transistor gates, and N+ regions
US5030585A (en) * 1990-03-22 1991-07-09 Micron Technology, Inc. Split-polysilicon CMOS DRAM process incorporating selective self-aligned silicidation of conductive regions and nitride blanket protection of N-channel regions during P-channel gate spacer formation
US4996167A (en) * 1990-06-29 1991-02-26 At&T Bell Laboratories Method of making electrical contacts to gate structures in integrated circuits
US6008078A (en) 1990-07-24 1999-12-28 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a semiconductor device
GB2249217A (en) * 1990-10-23 1992-04-29 Samsung Electronics Co Ltd Semiconductor device planarisation
US5289030A (en) 1991-03-06 1994-02-22 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device with oxide layer
US6849872B1 (en) * 1991-08-26 2005-02-01 Semiconductor Energy Laboratory Co., Ltd. Thin film transistor
US5323047A (en) * 1992-01-31 1994-06-21 Sgs-Thomson Microelectronics, Inc. Structure formed by a method of patterning a submicron semiconductor layer
EP0557098B1 (fr) * 1992-02-20 1998-04-29 Matsushita Electronics Corporation Dispositif de prise de vue à l'état solide et procédé de fabrication associé
US6624450B1 (en) 1992-03-27 2003-09-23 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for forming the same
JP3065829B2 (ja) * 1992-12-25 2000-07-17 新日本製鐵株式会社 半導体装置
US5719065A (en) 1993-10-01 1998-02-17 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device with removable spacers
US6133620A (en) 1995-05-26 2000-10-17 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and process for fabricating the same
US6867432B1 (en) 1994-06-09 2005-03-15 Semiconductor Energy Lab Semiconductor device having SiOxNy gate insulating film
JP3337825B2 (ja) * 1994-06-29 2002-10-28 三菱電機株式会社 内部配線を有する半導体装置およびその製造方法
JP2755176B2 (ja) * 1994-06-30 1998-05-20 日本電気株式会社 固体撮像素子
KR0149256B1 (ko) * 1995-08-25 1998-10-01 김주용 씨모스 트랜지스터 제조방법
JP3565983B2 (ja) 1996-04-12 2004-09-15 株式会社半導体エネルギー研究所 半導体装置の作製方法
US5808353A (en) * 1996-06-20 1998-09-15 Harris Corporation Radiation hardened dielectric for EEPROM
US7041548B1 (en) 1996-07-16 2006-05-09 Micron Technology, Inc. Methods of forming a gate stack that is void of silicon clusters within a metallic silicide film thereof
US7078342B1 (en) * 1996-07-16 2006-07-18 Micron Technology, Inc. Method of forming a gate stack
JP3524326B2 (ja) * 1997-05-07 2004-05-10 キヤノン株式会社 微小短針の製造に用いる雌型基板と該雌型基板の製造方法、及び該雌型基板を用いた微小短針とプローブの製造方法
KR100253311B1 (ko) * 1997-09-02 2000-06-01 김영환 반도체 소자의 평탄화 방법
US20020000626A1 (en) * 1997-11-26 2002-01-03 Advanced Micro Devices, Inc. Improving field leakage by using a thin layer of nitride deposited by chemical vapor deposition

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3833919A (en) * 1972-10-12 1974-09-03 Ncr Multilevel conductor structure and method
US3925572A (en) * 1972-10-12 1975-12-09 Ncr Co Multilevel conductor structure and method
US4091407A (en) * 1976-11-01 1978-05-23 Rca Corporation Combination glass/low temperature deposited Siw Nx Hy O.sub.z
US4097889A (en) * 1976-11-01 1978-06-27 Rca Corporation Combination glass/low temperature deposited Siw Nx Hy O.sub.z
US4091406A (en) * 1976-11-01 1978-05-23 Rca Corporation Combination glass/low temperature deposited Siw Nx Hy O.sub.z
US4180596A (en) * 1977-06-30 1979-12-25 International Business Machines Corporation Method for providing a metal silicide layer on a substrate
US4273805A (en) * 1978-06-19 1981-06-16 Rca Corporation Passivating composite for a semiconductor device comprising a silicon nitride (Si1 3N4) layer and phosphosilicate glass (PSG) layer
US4370798A (en) * 1979-06-15 1983-02-01 Texas Instruments Incorporated Interlevel insulator for integrated circuit with implanted resistor element in second-level polycrystalline silicon
DE3131875A1 (de) * 1980-08-18 1982-03-25 Fairchild Camera and Instrument Corp., 94042 Mountain View, Calif. "verfahren zum herstellen einer halbleiterstruktur und halbleiterstruktur"
US4392150A (en) * 1980-10-27 1983-07-05 National Semiconductor Corporation MOS Integrated circuit having refractory metal or metal silicide interconnect layer
JPS5780739A (en) * 1980-11-07 1982-05-20 Hitachi Ltd Semiconductor integrated circuit device and manufacture thereof
DE3045922A1 (de) * 1980-12-05 1982-07-08 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von strukturen von aus siliziden oder aus silizid-polysilizium bestehenden schichten durch reaktives sputteraetzen
JPS57113235A (en) * 1980-12-29 1982-07-14 Nec Corp Semiconductor device
JPS57194567A (en) * 1981-05-27 1982-11-30 Hitachi Ltd Semiconductor memory device
US4476482A (en) * 1981-05-29 1984-10-09 Texas Instruments Incorporated Silicide contacts for CMOS devices
JPS57207556A (en) * 1981-06-12 1982-12-20 Nippon Denso Co Ltd Electric dust collector
US4378628A (en) * 1981-08-27 1983-04-05 Bell Telephone Laboratories, Incorporated Cobalt silicide metallization for semiconductor integrated circuits
DE3138960A1 (de) * 1981-09-30 1983-04-14 Siemens AG, 1000 Berlin und 8000 München Verfahren zur erzeugung elektrisch leitender schichten
US4420344A (en) * 1981-10-15 1983-12-13 Texas Instruments Incorporated CMOS Source/drain implant process without compensation of polysilicon doping
US4581815A (en) * 1984-03-01 1986-04-15 Advanced Micro Devices, Inc. Integrated circuit structure having intermediate metal silicide layer and method of making same
US4640004A (en) * 1984-04-13 1987-02-03 Fairchild Camera & Instrument Corp. Method and structure for inhibiting dopant out-diffusion

Also Published As

Publication number Publication date
HK84188A (en) 1988-10-28
GB2150349B (en) 1987-07-08
KR930004984B1 (ko) 1993-06-11
DE3442037A1 (de) 1985-05-30
GB8428534D0 (en) 1984-12-19
SG41888G (en) 1989-01-27
GB2150349A (en) 1985-06-26
KR850004353A (ko) 1985-07-11
FR2555364A1 (fr) 1985-05-24
US4782037A (en) 1988-11-01

Similar Documents

Publication Publication Date Title
FR2555364B1 (fr) Procede de fabrication de connexions d'un dispositif a circuits integres a semi-conducteurs comportant en particulier un mitset
FR2553576B1 (fr) Dispositif a circuits integres a semi-conducteurs et procede de fabrication d'un tel dispositif
FR2524201B1 (fr) Procede de fabrication d'un dispositif semi-conducteur du type multicouche
FR2604562B1 (fr) Dispositif semi-conducteur silicium-sur-isolant et procede de fabrication
FR2483127B1 (fr) Procede de fabrication d'un dispositif semi-conducteur
GB2128024B (en) Method of manufacturing semiconductor integrated circuit device
DE3279555D1 (en) Chip carrier for large scale integrated circuits and a method for the fabrication of the carrier
FR2499749B1 (fr) Dispositif de memoire a semiconducteurs et procede de fabrication d'un tel dispositif
GB2163901B (en) A semiconductor integrated circuit device and a process for manufacturing such a device
FR2558989B1 (fr) Procede et dispositif d'integration de circuits au niveau d'une tranche de semi-conducteur
BE890772A (fr) Procede de fabrication d'un circuit integre
FR2645681B1 (fr) Dispositif d'interconnexion verticale de pastilles de circuits integres et son procede de fabrication
KR860005450A (ko) 반도체 집적 회로장치 및 그의 제조방법
EP0180457A3 (en) Semiconductor integrated circuit device and method for producing same
EP0125133A3 (en) A method of etching for use in semiconductor device fabrication
GB2209872B (en) Fabrication method for semiconductor integrated circuits
FR2625037B1 (fr) Procede de fabrication d'un circuit integre a base de silicium
DE3165345D1 (en) Method for manufacturing a semiconductor integrated circuit device
FR2555813B1 (fr) Dispositif a semi-conducteurs et procede de fabrication d'un tel dispositif
FR2589281B1 (fr) Dispositif a laser semiconducteur et son procede de fabrication
GB2148593B (en) Process for manufacturing the isolating regions of a semiconductor integrated circuit device
FR2582676B1 (fr) Procede d'etamage des connexions exterieures d'un dispositif a semi-conducteur encapsule
GB2157495B (en) A method of producing a semiconductor integrated circuit device
FR2564241B1 (fr) Procede de fabrication de circuits integres du type silicium sur isolant
FR2513810B1 (fr) Dispositif a circuits integres a semiconducteurs et procede de fabrication de ce dispositif

Legal Events

Date Code Title Description
ST Notification of lapse
ST Notification of lapse