FR2558989B1 - Procede et dispositif d'integration de circuits au niveau d'une tranche de semi-conducteur - Google Patents

Procede et dispositif d'integration de circuits au niveau d'une tranche de semi-conducteur

Info

Publication number
FR2558989B1
FR2558989B1 FR858501463A FR8501463A FR2558989B1 FR 2558989 B1 FR2558989 B1 FR 2558989B1 FR 858501463 A FR858501463 A FR 858501463A FR 8501463 A FR8501463 A FR 8501463A FR 2558989 B1 FR2558989 B1 FR 2558989B1
Authority
FR
France
Prior art keywords
level
semiconductor wafer
integrating circuits
integrating
circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR858501463A
Other languages
English (en)
Other versions
FR2558989A1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
VARSHNEY RAMESH
Original Assignee
VARSHNEY RAMESH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by VARSHNEY RAMESH filed Critical VARSHNEY RAMESH
Publication of FR2558989A1 publication Critical patent/FR2558989A1/fr
Application granted granted Critical
Publication of FR2558989B1 publication Critical patent/FR2558989B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H01L22/22—Connection or disconnection of sub-entities or redundant parts of a device in response to a measurement
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/316—Testing of analog circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
FR858501463A 1984-02-01 1985-02-01 Procede et dispositif d'integration de circuits au niveau d'une tranche de semi-conducteur Expired - Fee Related FR2558989B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/576,066 US4703436A (en) 1984-02-01 1984-02-01 Wafer level integration technique

Publications (2)

Publication Number Publication Date
FR2558989A1 FR2558989A1 (fr) 1985-08-02
FR2558989B1 true FR2558989B1 (fr) 1990-04-06

Family

ID=24302832

Family Applications (1)

Application Number Title Priority Date Filing Date
FR858501463A Expired - Fee Related FR2558989B1 (fr) 1984-02-01 1985-02-01 Procede et dispositif d'integration de circuits au niveau d'une tranche de semi-conducteur

Country Status (6)

Country Link
US (1) US4703436A (fr)
JP (1) JPS60182151A (fr)
CA (1) CA1236918A (fr)
DE (1) DE3503433A1 (fr)
FR (1) FR2558989B1 (fr)
GB (1) GB2153590B (fr)

Families Citing this family (67)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60254626A (ja) * 1984-05-30 1985-12-16 Sharp Corp ウエハテスト方法
DE3526485A1 (de) * 1985-07-24 1987-02-05 Heinz Krug Schaltungsanordnung zum pruefen integrierter schaltungseinheiten
DE3623470A1 (de) * 1986-07-11 1988-01-21 Gerd Teepe Integrierte schaltung mit mehreren schaltungsmoduln gleicher funktion
US5367208A (en) 1986-09-19 1994-11-22 Actel Corporation Reconfigurable programmable interconnect architecture
JPS63217821A (ja) * 1987-03-06 1988-09-09 Toshiba Corp 半導体集積回路
US5684723A (en) * 1987-11-16 1997-11-04 Fujitsu Limited Device simulation method and device simulator
JPH01158758A (ja) * 1987-12-16 1989-06-21 Toshiba Corp 半導体集積回路
JP2516403B2 (ja) * 1988-06-01 1996-07-24 富士通株式会社 ウエハ・スケ―ル・メモリ
US5590349A (en) * 1988-07-11 1996-12-31 Logic Devices, Inc. Real time programmable signal processor architecture
US5068823A (en) 1988-07-11 1991-11-26 Star Semiconductor Corporation Programmable integrated circuit using topological and parametric data to selectively connect and configure different high level functional blocks thereof
JP3151203B2 (ja) * 1988-11-23 2001-04-03 テキサス インスツルメンツ インコーポレイテツド 集積回路の自己検査装置
US5276893A (en) * 1989-02-08 1994-01-04 Yvon Savaria Parallel microprocessor architecture
US4974048A (en) * 1989-03-10 1990-11-27 The Boeing Company Integrated circuit having reroutable conductive paths
JP2837433B2 (ja) * 1989-06-05 1998-12-16 三菱電機株式会社 半導体記憶装置における不良ビット救済回路
US5471427A (en) * 1989-06-05 1995-11-28 Mitsubishi Denki Kabushiki Kaisha Circuit for repairing defective bit in semiconductor memory device and repairing method
US5400262A (en) * 1989-09-20 1995-03-21 Aptix Corporation Universal interconnect matrix array
US5377124A (en) * 1989-09-20 1994-12-27 Aptix Corporation Field programmable printed circuit board
US4996670A (en) * 1989-09-28 1991-02-26 International Business Machines Corporation Zero standby power, radiation hardened, memory redundancy circuit
US5459340A (en) * 1989-10-03 1995-10-17 Trw Inc. Adaptive configurable gate array
US5217916A (en) * 1989-10-03 1993-06-08 Trw Inc. Method of making an adaptive configurable gate array
US5022011A (en) * 1989-12-28 1991-06-04 Inova Microelectronics Corporation Apparatus and method for reducing the access time after a write operation in a static memory device
US5198705A (en) * 1990-05-11 1993-03-30 Actel Corporation Logic module with configurable combinational and sequential blocks
US5214657A (en) * 1990-09-21 1993-05-25 Micron Technology, Inc. Method for fabricating wafer-scale integration wafers and method for utilizing defective wafer-scale integration wafers
DE69133311T2 (de) * 1990-10-15 2004-06-24 Aptix Corp., San Jose Verbindungssubstrat mit integrierter Schaltung zur programmierbaren Verbindung und Probenuntersuchung
US5274264A (en) * 1990-12-12 1993-12-28 Hughes Aircraft Company Defect tolerant power distribution network and method for integrated circuits
US5528600A (en) * 1991-01-28 1996-06-18 Actel Corporation Testability circuits for logic arrays
US5287311A (en) * 1991-05-31 1994-02-15 Texas Instruments Incorporated Method and apparatus for implementing ×2 parity DRAM for 16 bit systems from ×4 parity DRAM
EP0518701A3 (en) * 1991-06-14 1993-04-21 Aptix Corporation Field programmable circuit module
US5360988A (en) * 1991-06-27 1994-11-01 Hitachi, Ltd. Semiconductor integrated circuit device and methods for production thereof
DE69226150T2 (de) * 1991-11-05 1999-02-18 Hsu Fu Chieh Redundanzarchitektur für Schaltungsmodul
US5831467A (en) * 1991-11-05 1998-11-03 Monolithic System Technology, Inc. Termination circuit with power-down mode for use in circuit module architecture
US5576554A (en) * 1991-11-05 1996-11-19 Monolithic System Technology, Inc. Wafer-scale integrated circuit interconnect structure architecture
US5498990A (en) * 1991-11-05 1996-03-12 Monolithic System Technology, Inc. Reduced CMOS-swing clamping circuit for bus lines
US5301153A (en) * 1992-06-03 1994-04-05 Mips Computer Systems, Inc. Redundant element substitution apparatus
US5648661A (en) * 1992-07-02 1997-07-15 Lsi Logic Corporation Integrated circuit wafer comprising unsingulated dies, and decoder arrangement for individually testing the dies
DE69331061T2 (de) * 1992-08-10 2002-06-06 Monolithic System Tech Inc Fehlertolerantes hierarchisiertes Bussystem
US5489538A (en) * 1992-08-21 1996-02-06 Lsi Logic Corporation Method of die burn-in
US5366906A (en) * 1992-10-16 1994-11-22 Martin Marietta Corporation Wafer level integration and testing
US5355344A (en) * 1992-11-13 1994-10-11 Sgs-Thomson Microelectronics, Inc. Structure for using a portion of an integrated circuit die
US5360747A (en) * 1993-06-10 1994-11-01 Xilinx, Inc. Method of reducing dice testing with on-chip identification
US5655113A (en) 1994-07-05 1997-08-05 Monolithic System Technology, Inc. Resynchronization circuit for a memory system and method of operating same
CA2219761C (fr) * 1995-05-04 2001-08-21 Intel Corporation Plaquette de circuits imprimes presentant une configuration de routage commutable
JP3734853B2 (ja) * 1995-06-27 2006-01-11 株式会社ルネサステクノロジ 半導体記憶装置
FR2741475B1 (fr) * 1995-11-17 2000-05-12 Commissariat Energie Atomique Procede de fabrication d'un dispositif de micro-electronique comportant sur un substrat une pluralite d'elements interconnectes
US5895942A (en) * 1996-06-18 1999-04-20 Kabushiki Kaisha Toshiba Fuse selectable modules
US6167428A (en) 1996-11-29 2000-12-26 Ellis; Frampton E. Personal computer microprocessor firewalls for internet distributed processing
US6725250B1 (en) * 1996-11-29 2004-04-20 Ellis, Iii Frampton E. Global network computers
US8225003B2 (en) 1996-11-29 2012-07-17 Ellis Iii Frampton E Computers and microchips with a portion protected by an internal hardware firewall
US7506020B2 (en) 1996-11-29 2009-03-17 Frampton E Ellis Global network computers
US20050180095A1 (en) 1996-11-29 2005-08-18 Ellis Frampton E. Global network computers
US7926097B2 (en) 1996-11-29 2011-04-12 Ellis Iii Frampton E Computer or microchip protected from the internet by internal hardware
US7805756B2 (en) 1996-11-29 2010-09-28 Frampton E Ellis Microchips with inner firewalls, faraday cages, and/or photovoltaic cells
US5936426A (en) * 1997-02-03 1999-08-10 Actel Corporation Logic function module for field programmable array
US6233184B1 (en) * 1998-11-13 2001-05-15 International Business Machines Corporation Structures for wafer level test and burn-in
US6730527B1 (en) 2001-12-31 2004-05-04 Hyperchip Inc. Chip and defect tolerant method of mounting same to a substrate
US6768150B1 (en) * 2003-04-17 2004-07-27 Infineon Technologies Aktiengesellschaft Magnetic memory
US7208758B2 (en) * 2003-09-16 2007-04-24 Micron Technology, Inc. Dynamic integrated circuit clusters, modules including same and methods of fabricating
US8256147B2 (en) 2004-11-22 2012-09-04 Frampton E. Eliis Devices with internal flexibility sipes, including siped chambers for footwear
DE102005006639B4 (de) * 2005-02-14 2007-08-16 Siemens Ag Erzeugen von SiC-Packs auf Wafer-Ebene
US7579689B2 (en) * 2006-01-31 2009-08-25 Mediatek Inc. Integrated circuit package, and a method for producing an integrated circuit package having two dies with input and output terminals of integrated circuits of the dies directly addressable for testing of the package
US7987358B1 (en) 2006-06-09 2011-07-26 Xilinx, Inc. Methods of authenticating a user design in a programmable integrated circuit
US7339400B1 (en) * 2006-06-09 2008-03-04 Xilinx, Inc. Interface port for electrically programmed fuses in a programmable logic device
US8863230B1 (en) 2006-06-09 2014-10-14 Xilinx, Inc. Methods of authenticating a programmable integrated circuit in combination with a non-volatile memory device
US8125796B2 (en) 2007-11-21 2012-02-28 Frampton E. Ellis Devices with faraday cages and internal flexibility sipes
US8429735B2 (en) 2010-01-26 2013-04-23 Frampton E. Ellis Method of using one or more secure private networks to actively configure the hardware of a computer or microchip
US9568960B2 (en) 2015-02-20 2017-02-14 International Business Machines Corporation Supercomputer using wafer scale integration
US20160329312A1 (en) * 2015-05-05 2016-11-10 Sean M. O'Mullan Semiconductor chip with offloaded logic

Family Cites Families (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ES320796A1 (es) * 1964-12-21 1966-05-16 Texas Instruments Inc Un metodo de fabricacion de un sistema electrico.
US3835530A (en) * 1967-06-05 1974-09-17 Texas Instruments Inc Method of making semiconductor devices
GB1122749A (en) * 1967-06-09 1968-08-07 Standard Telephones Cables Ltd Manufacture of integrated circuits
GB1117579A (en) * 1967-06-09 1968-06-19 Standard Telephones Cables Ltd Manufacture of integrated circuits
US3633268A (en) * 1968-06-04 1972-01-11 Telefunken Patent Method of producing one or more large integrated semiconductor circuits
US3641661A (en) * 1968-06-25 1972-02-15 Texas Instruments Inc Method of fabricating integrated circuit arrays
GB1305010A (fr) * 1968-09-25 1973-01-31
GB1305319A (fr) * 1968-09-25 1973-01-31
GB1306189A (fr) * 1968-09-25 1973-02-07
GB1271243A (en) * 1968-10-08 1972-04-19 Texas Instruments Inc Integrated circuit arrays utilizing discretionary wiring and method of fabricating same
FR2045239A5 (fr) * 1969-06-26 1971-02-26 Comp Generale Electricite
US3771217A (en) * 1971-04-16 1973-11-13 Texas Instruments Inc Integrated circuit arrays utilizing discretionary wiring and method of fabricating same
US3795973A (en) * 1971-12-15 1974-03-12 Hughes Aircraft Co Multi-level large scale integrated circuit array having standard test points
US3795974A (en) * 1971-12-16 1974-03-12 Hughes Aircraft Co Repairable multi-level large scale integrated circuit
US3795975A (en) * 1971-12-17 1974-03-12 Hughes Aircraft Co Multi-level large scale complex integrated circuit having functional interconnected circuit routed to master patterns
JPS4926270A (fr) * 1972-07-04 1974-03-08
JPS529856B2 (fr) * 1972-07-27 1977-03-18
CA948705A (en) * 1972-07-28 1974-06-04 Robert C. Cook Method for making an integrated circuit apparatus
GB1377859A (en) * 1972-08-03 1974-12-18 Catt I Digital integrated circuits
US3861023A (en) * 1973-04-30 1975-01-21 Hughes Aircraft Co Fully repairable integrated circuit interconnections
US3940740A (en) * 1973-06-27 1976-02-24 Actron Industries, Inc. Method for providing reconfigurable microelectronic circuit devices and products produced thereby
US4234888A (en) * 1973-07-26 1980-11-18 Hughes Aircraft Company Multi-level large scale complex integrated circuit having functional interconnected circuit routed to master patterns
US4122540A (en) * 1974-03-18 1978-10-24 Signetics Corporation Massive monolithic integrated circuit
US4038648A (en) * 1974-06-03 1977-07-26 Chesley Gilman D Self-configurable circuit structure for achieving wafer scale integration
JPS515540A (fr) * 1974-07-03 1976-01-17 Shell Sekyu
US4007452A (en) * 1975-07-28 1977-02-08 Intel Corporation Wafer scale integration system
JPS52115193A (en) * 1976-03-23 1977-09-27 Fujitsu Ltd Lsi structure
US4092733A (en) * 1976-05-07 1978-05-30 Mcdonnell Douglas Corporation Electrically alterable interconnection
US4398248A (en) * 1980-10-20 1983-08-09 Mcdonnell Douglas Corporation Adaptive WSI/MNOS solid state memory system
GB2006522B (en) * 1977-10-03 1982-01-27 Secretary Industry Brit Wafers having microelectronic circuit chips thereon
JPS5460874A (en) * 1977-10-03 1979-05-16 Secr Defence Brit Wafer
US4188670A (en) * 1978-01-11 1980-02-12 Mcdonnell Douglas Corporation Associative interconnection circuit
US4254477A (en) * 1978-10-25 1981-03-03 Mcdonnell Douglas Corporation Reconfigurable memory circuit
JPS5847596Y2 (ja) * 1979-09-05 1983-10-29 富士通株式会社 半導体装置
US4354217A (en) * 1980-07-07 1982-10-12 Burroughs Corporation Automatic power disconnect system for wafer scale integrated circuits
US4355376A (en) * 1980-09-30 1982-10-19 Burroughs Corporation Apparatus and method for utilizing partially defective memory devices
US4532611A (en) * 1982-11-01 1985-07-30 Motorola, Inc. Redundant memory circuit
US4494220A (en) * 1982-11-24 1985-01-15 At&T Bell Laboratories Folded bit line memory with one decoder per pair of spare rows
US4523313A (en) * 1982-12-17 1985-06-11 Honeywell Information Systems Inc. Partial defective chip memory support system

Also Published As

Publication number Publication date
FR2558989A1 (fr) 1985-08-02
GB2153590A (en) 1985-08-21
JPS60182151A (ja) 1985-09-17
CA1236918A (fr) 1988-05-17
US4703436A (en) 1987-10-27
GB8502404D0 (en) 1985-03-06
GB2153590B (en) 1987-12-16
DE3503433A1 (de) 1985-08-01

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